1 #ifndef __MACH_MMP_CLK_H 2 #define __MACH_MMP_CLK_H 3 4 #include <linux/clk-provider.h> 5 #include <linux/clkdev.h> 6 7 #define APBC_NO_BUS_CTRL BIT(0) 8 #define APBC_POWER_CTRL BIT(1) 9 10 11 /* Clock type "factor" */ 12 struct mmp_clk_factor_masks { 13 unsigned int factor; 14 unsigned int num_mask; 15 unsigned int den_mask; 16 unsigned int num_shift; 17 unsigned int den_shift; 18 }; 19 20 struct mmp_clk_factor_tbl { 21 unsigned int num; 22 unsigned int den; 23 }; 24 25 struct mmp_clk_factor { 26 struct clk_hw hw; 27 void __iomem *base; 28 struct mmp_clk_factor_masks *masks; 29 struct mmp_clk_factor_tbl *ftbl; 30 unsigned int ftbl_cnt; 31 spinlock_t *lock; 32 }; 33 34 extern struct clk *mmp_clk_register_factor(const char *name, 35 const char *parent_name, unsigned long flags, 36 void __iomem *base, struct mmp_clk_factor_masks *masks, 37 struct mmp_clk_factor_tbl *ftbl, unsigned int ftbl_cnt, 38 spinlock_t *lock); 39 40 /* Clock type "mix" */ 41 #define MMP_CLK_BITS_MASK(width, shift) \ 42 (((1 << (width)) - 1) << (shift)) 43 #define MMP_CLK_BITS_GET_VAL(data, width, shift) \ 44 ((data & MMP_CLK_BITS_MASK(width, shift)) >> (shift)) 45 #define MMP_CLK_BITS_SET_VAL(val, width, shift) \ 46 (((val) << (shift)) & MMP_CLK_BITS_MASK(width, shift)) 47 48 enum { 49 MMP_CLK_MIX_TYPE_V1, 50 MMP_CLK_MIX_TYPE_V2, 51 MMP_CLK_MIX_TYPE_V3, 52 }; 53 54 /* The register layout */ 55 struct mmp_clk_mix_reg_info { 56 void __iomem *reg_clk_ctrl; 57 void __iomem *reg_clk_sel; 58 u8 width_div; 59 u8 shift_div; 60 u8 width_mux; 61 u8 shift_mux; 62 u8 bit_fc; 63 }; 64 65 /* The suggested clock table from user. */ 66 struct mmp_clk_mix_clk_table { 67 unsigned long rate; 68 u8 parent_index; 69 unsigned int divisor; 70 unsigned int valid; 71 }; 72 73 struct mmp_clk_mix_config { 74 struct mmp_clk_mix_reg_info reg_info; 75 struct mmp_clk_mix_clk_table *table; 76 unsigned int table_size; 77 u32 *mux_table; 78 struct clk_div_table *div_table; 79 u8 div_flags; 80 u8 mux_flags; 81 }; 82 83 struct mmp_clk_mix { 84 struct clk_hw hw; 85 struct mmp_clk_mix_reg_info reg_info; 86 struct mmp_clk_mix_clk_table *table; 87 u32 *mux_table; 88 struct clk_div_table *div_table; 89 unsigned int table_size; 90 u8 div_flags; 91 u8 mux_flags; 92 unsigned int type; 93 spinlock_t *lock; 94 }; 95 96 extern const struct clk_ops mmp_clk_mix_ops; 97 extern struct clk *mmp_clk_register_mix(struct device *dev, 98 const char *name, 99 const char **parent_names, 100 u8 num_parents, 101 unsigned long flags, 102 struct mmp_clk_mix_config *config, 103 spinlock_t *lock); 104 105 106 /* Clock type "gate". MMP private gate */ 107 #define MMP_CLK_GATE_NEED_DELAY BIT(0) 108 109 struct mmp_clk_gate { 110 struct clk_hw hw; 111 void __iomem *reg; 112 u32 mask; 113 u32 val_enable; 114 u32 val_disable; 115 unsigned int flags; 116 spinlock_t *lock; 117 }; 118 119 extern const struct clk_ops mmp_clk_gate_ops; 120 extern struct clk *mmp_clk_register_gate(struct device *dev, const char *name, 121 const char *parent_name, unsigned long flags, 122 void __iomem *reg, u32 mask, u32 val_enable, 123 u32 val_disable, unsigned int gate_flags, 124 spinlock_t *lock); 125 126 127 extern struct clk *mmp_clk_register_pll2(const char *name, 128 const char *parent_name, unsigned long flags); 129 extern struct clk *mmp_clk_register_apbc(const char *name, 130 const char *parent_name, void __iomem *base, 131 unsigned int delay, unsigned int apbc_flags, spinlock_t *lock); 132 extern struct clk *mmp_clk_register_apmu(const char *name, 133 const char *parent_name, void __iomem *base, u32 enable_mask, 134 spinlock_t *lock); 135 136 struct mmp_clk_unit { 137 unsigned int nr_clks; 138 struct clk **clk_table; 139 struct clk_onecell_data clk_data; 140 }; 141 142 struct mmp_param_fixed_rate_clk { 143 unsigned int id; 144 char *name; 145 const char *parent_name; 146 unsigned long flags; 147 unsigned long fixed_rate; 148 }; 149 void mmp_register_fixed_rate_clks(struct mmp_clk_unit *unit, 150 struct mmp_param_fixed_rate_clk *clks, 151 int size); 152 153 struct mmp_param_fixed_factor_clk { 154 unsigned int id; 155 char *name; 156 const char *parent_name; 157 unsigned long mult; 158 unsigned long div; 159 unsigned long flags; 160 }; 161 void mmp_register_fixed_factor_clks(struct mmp_clk_unit *unit, 162 struct mmp_param_fixed_factor_clk *clks, 163 int size); 164 165 struct mmp_param_general_gate_clk { 166 unsigned int id; 167 const char *name; 168 const char *parent_name; 169 unsigned long flags; 170 unsigned long offset; 171 u8 bit_idx; 172 u8 gate_flags; 173 spinlock_t *lock; 174 }; 175 void mmp_register_general_gate_clks(struct mmp_clk_unit *unit, 176 struct mmp_param_general_gate_clk *clks, 177 void __iomem *base, int size); 178 179 struct mmp_param_gate_clk { 180 unsigned int id; 181 char *name; 182 const char *parent_name; 183 unsigned long flags; 184 unsigned long offset; 185 u32 mask; 186 u32 val_enable; 187 u32 val_disable; 188 unsigned int gate_flags; 189 spinlock_t *lock; 190 }; 191 void mmp_register_gate_clks(struct mmp_clk_unit *unit, 192 struct mmp_param_gate_clk *clks, 193 void __iomem *base, int size); 194 195 struct mmp_param_mux_clk { 196 unsigned int id; 197 char *name; 198 const char **parent_name; 199 u8 num_parents; 200 unsigned long flags; 201 unsigned long offset; 202 u8 shift; 203 u8 width; 204 u8 mux_flags; 205 spinlock_t *lock; 206 }; 207 void mmp_register_mux_clks(struct mmp_clk_unit *unit, 208 struct mmp_param_mux_clk *clks, 209 void __iomem *base, int size); 210 211 struct mmp_param_div_clk { 212 unsigned int id; 213 char *name; 214 const char *parent_name; 215 unsigned long flags; 216 unsigned long offset; 217 u8 shift; 218 u8 width; 219 u8 div_flags; 220 spinlock_t *lock; 221 }; 222 void mmp_register_div_clks(struct mmp_clk_unit *unit, 223 struct mmp_param_div_clk *clks, 224 void __iomem *base, int size); 225 226 #define DEFINE_MIX_REG_INFO(w_d, s_d, w_m, s_m, fc) \ 227 { \ 228 .width_div = (w_d), \ 229 .shift_div = (s_d), \ 230 .width_mux = (w_m), \ 231 .shift_mux = (s_m), \ 232 .bit_fc = (fc), \ 233 } 234 235 void mmp_clk_init(struct device_node *np, struct mmp_clk_unit *unit, 236 int nr_clks); 237 void mmp_clk_add(struct mmp_clk_unit *unit, unsigned int id, 238 struct clk *clk); 239 #endif 240