1d0c175daSAlexander Müller /* 2d0c175daSAlexander Müller * Copyright (c) 2015 Endless Mobile, Inc. 3d0c175daSAlexander Müller * Author: Carlo Caione <carlo@endlessm.com> 4d0c175daSAlexander Müller * 5d0c175daSAlexander Müller * Copyright (c) 2016 BayLibre, Inc. 6d0c175daSAlexander Müller * Michael Turquette <mturquette@baylibre.com> 7d0c175daSAlexander Müller * 8d0c175daSAlexander Müller * This program is free software; you can redistribute it and/or modify it 9d0c175daSAlexander Müller * under the terms and conditions of the GNU General Public License, 10d0c175daSAlexander Müller * version 2, as published by the Free Software Foundation. 11d0c175daSAlexander Müller * 12d0c175daSAlexander Müller * This program is distributed in the hope it will be useful, but WITHOUT 13d0c175daSAlexander Müller * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14d0c175daSAlexander Müller * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 15d0c175daSAlexander Müller * more details. 16d0c175daSAlexander Müller * 17d0c175daSAlexander Müller * You should have received a copy of the GNU General Public License along with 18d0c175daSAlexander Müller * this program. If not, see <http://www.gnu.org/licenses/>. 19d0c175daSAlexander Müller */ 20d0c175daSAlexander Müller 21d0c175daSAlexander Müller #ifndef __MESON8B_H 22d0c175daSAlexander Müller #define __MESON8B_H 23d0c175daSAlexander Müller 24d0c175daSAlexander Müller /* 25d0c175daSAlexander Müller * Clock controller register offsets 26d0c175daSAlexander Müller * 27d0c175daSAlexander Müller * Register offsets from the HardKernel[0] data sheet are listed in comment 28d0c175daSAlexander Müller * blocks below. Those offsets must be multiplied by 4 before adding them to 29d0c175daSAlexander Müller * the base address to get the right value 30d0c175daSAlexander Müller * 31d0c175daSAlexander Müller * [0] http://dn.odroid.com/S805/Datasheet/S805_Datasheet%20V0.8%2020150126.pdf 32d0c175daSAlexander Müller */ 33d0c175daSAlexander Müller #define MESON8B_REG_SYS_CPU_CNTL1 0x015c /* 0x57 offset in data sheet */ 34d0c175daSAlexander Müller #define MESON8B_REG_HHI_MPEG 0x0174 /* 0x5d offset in data sheet */ 35d0c175daSAlexander Müller #define MESON8B_REG_MALI 0x01b0 /* 0x6c offset in data sheet */ 36d0c175daSAlexander Müller #define MESON8B_REG_PLL_FIXED 0x0280 37d0c175daSAlexander Müller #define MESON8B_REG_PLL_SYS 0x0300 38d0c175daSAlexander Müller #define MESON8B_REG_PLL_VID 0x0320 39d0c175daSAlexander Müller 40d0c175daSAlexander Müller #endif /* __MESON8B_H */ 41