xref: /openbmc/linux/drivers/clk/meson/clk-mpll.c (revision 293d5b43)
1 /*
2  * This file is provided under a dual BSD/GPLv2 license.  When using or
3  * redistributing this file, you may do so under either license.
4  *
5  * GPL LICENSE SUMMARY
6  *
7  * Copyright (c) 2016 AmLogic, Inc.
8  * Author: Michael Turquette <mturquette@baylibre.com>
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of version 2 of the GNU General Public License as
12  * published by the Free Software Foundation.
13  *
14  * This program is distributed in the hope that it will be useful, but
15  * WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
17  * General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, write to the Free Software
21  * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
22  * The full GNU General Public License is included in this distribution
23  * in the file called COPYING
24  *
25  * BSD LICENSE
26  *
27  * Copyright (c) 2016 AmLogic, Inc.
28  * Author: Michael Turquette <mturquette@baylibre.com>
29  *
30  * Redistribution and use in source and binary forms, with or without
31  * modification, are permitted provided that the following conditions
32  * are met:
33  *
34  *   * Redistributions of source code must retain the above copyright
35  *     notice, this list of conditions and the following disclaimer.
36  *   * Redistributions in binary form must reproduce the above copyright
37  *     notice, this list of conditions and the following disclaimer in
38  *     the documentation and/or other materials provided with the
39  *     distribution.
40  *   * Neither the name of Intel Corporation nor the names of its
41  *     contributors may be used to endorse or promote products derived
42  *     from this software without specific prior written permission.
43  *
44  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
45  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
46  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
47  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
48  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
49  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
50  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
51  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
52  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
53  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
54  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
55  */
56 
57 /*
58  * MultiPhase Locked Loops are outputs from a PLL with additional frequency
59  * scaling capabilities. MPLL rates are calculated as:
60  *
61  * f(N2_integer, SDM_IN ) = 2.0G/(N2_integer + SDM_IN/16384)
62  */
63 
64 #include <linux/clk-provider.h>
65 #include "clkc.h"
66 
67 #define SDM_MAX 16384
68 
69 #define to_meson_clk_mpll(_hw) container_of(_hw, struct meson_clk_mpll, hw)
70 
71 static unsigned long mpll_recalc_rate(struct clk_hw *hw,
72 		unsigned long parent_rate)
73 {
74 	struct meson_clk_mpll *mpll = to_meson_clk_mpll(hw);
75 	struct parm *p;
76 	unsigned long rate = 0;
77 	unsigned long reg, sdm, n2;
78 
79 	p = &mpll->sdm;
80 	reg = readl(mpll->base + p->reg_off);
81 	sdm = PARM_GET(p->width, p->shift, reg);
82 
83 	p = &mpll->n2;
84 	reg = readl(mpll->base + p->reg_off);
85 	n2 = PARM_GET(p->width, p->shift, reg);
86 
87 	rate = (parent_rate * SDM_MAX) / ((SDM_MAX * n2) + sdm);
88 
89 	return rate;
90 }
91 
92 const struct clk_ops meson_clk_mpll_ro_ops = {
93 	.recalc_rate = mpll_recalc_rate,
94 };
95