11cd50181SJerome Brunet /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ 21cd50181SJerome Brunet /* 31cd50181SJerome Brunet * Copyright (c) 2018 BayLibre, SAS. 41cd50181SJerome Brunet * Author: Jerome Brunet <jbrunet@baylibre.com> 51cd50181SJerome Brunet */ 61cd50181SJerome Brunet 71cd50181SJerome Brunet #ifndef __AXG_AUDIO_CLKC_H 81cd50181SJerome Brunet #define __AXG_AUDIO_CLKC_H 91cd50181SJerome Brunet 101cd50181SJerome Brunet /* 111cd50181SJerome Brunet * Audio Clock register offsets 121cd50181SJerome Brunet * 131cd50181SJerome Brunet * Register offsets from the datasheet must be multiplied by 4 before 141cd50181SJerome Brunet * to get the right offset 151cd50181SJerome Brunet */ 161cd50181SJerome Brunet #define AUDIO_CLK_GATE_EN 0x000 171cd50181SJerome Brunet #define AUDIO_MCLK_A_CTRL 0x004 181cd50181SJerome Brunet #define AUDIO_MCLK_B_CTRL 0x008 191cd50181SJerome Brunet #define AUDIO_MCLK_C_CTRL 0x00C 201cd50181SJerome Brunet #define AUDIO_MCLK_D_CTRL 0x010 211cd50181SJerome Brunet #define AUDIO_MCLK_E_CTRL 0x014 221cd50181SJerome Brunet #define AUDIO_MCLK_F_CTRL 0x018 2307500138SMaxime Jourdan #define AUDIO_MST_PAD_CTRL0 0x01c 2407500138SMaxime Jourdan #define AUDIO_MST_PAD_CTRL1 0x020 257cfefab6SJerome Brunet #define AUDIO_SW_RESET 0x024 261cd50181SJerome Brunet #define AUDIO_MST_A_SCLK_CTRL0 0x040 271cd50181SJerome Brunet #define AUDIO_MST_A_SCLK_CTRL1 0x044 281cd50181SJerome Brunet #define AUDIO_MST_B_SCLK_CTRL0 0x048 291cd50181SJerome Brunet #define AUDIO_MST_B_SCLK_CTRL1 0x04C 301cd50181SJerome Brunet #define AUDIO_MST_C_SCLK_CTRL0 0x050 311cd50181SJerome Brunet #define AUDIO_MST_C_SCLK_CTRL1 0x054 321cd50181SJerome Brunet #define AUDIO_MST_D_SCLK_CTRL0 0x058 331cd50181SJerome Brunet #define AUDIO_MST_D_SCLK_CTRL1 0x05C 341cd50181SJerome Brunet #define AUDIO_MST_E_SCLK_CTRL0 0x060 351cd50181SJerome Brunet #define AUDIO_MST_E_SCLK_CTRL1 0x064 361cd50181SJerome Brunet #define AUDIO_MST_F_SCLK_CTRL0 0x068 371cd50181SJerome Brunet #define AUDIO_MST_F_SCLK_CTRL1 0x06C 381cd50181SJerome Brunet #define AUDIO_CLK_TDMIN_A_CTRL 0x080 391cd50181SJerome Brunet #define AUDIO_CLK_TDMIN_B_CTRL 0x084 401cd50181SJerome Brunet #define AUDIO_CLK_TDMIN_C_CTRL 0x088 411cd50181SJerome Brunet #define AUDIO_CLK_TDMIN_LB_CTRL 0x08C 421cd50181SJerome Brunet #define AUDIO_CLK_TDMOUT_A_CTRL 0x090 431cd50181SJerome Brunet #define AUDIO_CLK_TDMOUT_B_CTRL 0x094 441cd50181SJerome Brunet #define AUDIO_CLK_TDMOUT_C_CTRL 0x098 451cd50181SJerome Brunet #define AUDIO_CLK_SPDIFIN_CTRL 0x09C 461cd50181SJerome Brunet #define AUDIO_CLK_SPDIFOUT_CTRL 0x0A0 471cd50181SJerome Brunet #define AUDIO_CLK_RESAMPLE_CTRL 0x0A4 481cd50181SJerome Brunet #define AUDIO_CLK_LOCKER_CTRL 0x0A8 491cd50181SJerome Brunet #define AUDIO_CLK_PDMIN_CTRL0 0x0AC 501cd50181SJerome Brunet #define AUDIO_CLK_PDMIN_CTRL1 0x0B0 5107500138SMaxime Jourdan #define AUDIO_CLK_SPDIFOUT_B_CTRL 0x0B4 521cd50181SJerome Brunet 531cd50181SJerome Brunet /* 541cd50181SJerome Brunet * CLKID index values 551cd50181SJerome Brunet * These indices are entirely contrived and do not map onto the hardware. 561cd50181SJerome Brunet */ 571cd50181SJerome Brunet 581cd50181SJerome Brunet #define AUD_CLKID_MST_A_MCLK_SEL 59 591cd50181SJerome Brunet #define AUD_CLKID_MST_B_MCLK_SEL 60 601cd50181SJerome Brunet #define AUD_CLKID_MST_C_MCLK_SEL 61 611cd50181SJerome Brunet #define AUD_CLKID_MST_D_MCLK_SEL 62 621cd50181SJerome Brunet #define AUD_CLKID_MST_E_MCLK_SEL 63 631cd50181SJerome Brunet #define AUD_CLKID_MST_F_MCLK_SEL 64 641cd50181SJerome Brunet #define AUD_CLKID_MST_A_MCLK_DIV 65 651cd50181SJerome Brunet #define AUD_CLKID_MST_B_MCLK_DIV 66 661cd50181SJerome Brunet #define AUD_CLKID_MST_C_MCLK_DIV 67 671cd50181SJerome Brunet #define AUD_CLKID_MST_D_MCLK_DIV 68 681cd50181SJerome Brunet #define AUD_CLKID_MST_E_MCLK_DIV 69 691cd50181SJerome Brunet #define AUD_CLKID_MST_F_MCLK_DIV 70 701cd50181SJerome Brunet #define AUD_CLKID_SPDIFOUT_CLK_SEL 71 711cd50181SJerome Brunet #define AUD_CLKID_SPDIFOUT_CLK_DIV 72 721cd50181SJerome Brunet #define AUD_CLKID_SPDIFIN_CLK_SEL 73 731cd50181SJerome Brunet #define AUD_CLKID_SPDIFIN_CLK_DIV 74 741cd50181SJerome Brunet #define AUD_CLKID_PDM_DCLK_SEL 75 751cd50181SJerome Brunet #define AUD_CLKID_PDM_DCLK_DIV 76 761cd50181SJerome Brunet #define AUD_CLKID_PDM_SYSCLK_SEL 77 771cd50181SJerome Brunet #define AUD_CLKID_PDM_SYSCLK_DIV 78 781cd50181SJerome Brunet #define AUD_CLKID_MST_A_SCLK_PRE_EN 92 791cd50181SJerome Brunet #define AUD_CLKID_MST_B_SCLK_PRE_EN 93 801cd50181SJerome Brunet #define AUD_CLKID_MST_C_SCLK_PRE_EN 94 811cd50181SJerome Brunet #define AUD_CLKID_MST_D_SCLK_PRE_EN 95 821cd50181SJerome Brunet #define AUD_CLKID_MST_E_SCLK_PRE_EN 96 831cd50181SJerome Brunet #define AUD_CLKID_MST_F_SCLK_PRE_EN 97 841cd50181SJerome Brunet #define AUD_CLKID_MST_A_SCLK_DIV 98 851cd50181SJerome Brunet #define AUD_CLKID_MST_B_SCLK_DIV 99 861cd50181SJerome Brunet #define AUD_CLKID_MST_C_SCLK_DIV 100 871cd50181SJerome Brunet #define AUD_CLKID_MST_D_SCLK_DIV 101 881cd50181SJerome Brunet #define AUD_CLKID_MST_E_SCLK_DIV 102 891cd50181SJerome Brunet #define AUD_CLKID_MST_F_SCLK_DIV 103 901cd50181SJerome Brunet #define AUD_CLKID_MST_A_SCLK_POST_EN 104 911cd50181SJerome Brunet #define AUD_CLKID_MST_B_SCLK_POST_EN 105 921cd50181SJerome Brunet #define AUD_CLKID_MST_C_SCLK_POST_EN 106 931cd50181SJerome Brunet #define AUD_CLKID_MST_D_SCLK_POST_EN 107 941cd50181SJerome Brunet #define AUD_CLKID_MST_E_SCLK_POST_EN 108 951cd50181SJerome Brunet #define AUD_CLKID_MST_F_SCLK_POST_EN 109 961cd50181SJerome Brunet #define AUD_CLKID_MST_A_LRCLK_DIV 110 971cd50181SJerome Brunet #define AUD_CLKID_MST_B_LRCLK_DIV 111 981cd50181SJerome Brunet #define AUD_CLKID_MST_C_LRCLK_DIV 112 991cd50181SJerome Brunet #define AUD_CLKID_MST_D_LRCLK_DIV 113 1001cd50181SJerome Brunet #define AUD_CLKID_MST_E_LRCLK_DIV 114 1011cd50181SJerome Brunet #define AUD_CLKID_MST_F_LRCLK_DIV 115 1021cd50181SJerome Brunet #define AUD_CLKID_TDMIN_A_SCLK_PRE_EN 137 1031cd50181SJerome Brunet #define AUD_CLKID_TDMIN_B_SCLK_PRE_EN 138 1041cd50181SJerome Brunet #define AUD_CLKID_TDMIN_C_SCLK_PRE_EN 139 1051cd50181SJerome Brunet #define AUD_CLKID_TDMIN_LB_SCLK_PRE_EN 140 1061cd50181SJerome Brunet #define AUD_CLKID_TDMOUT_A_SCLK_PRE_EN 141 1071cd50181SJerome Brunet #define AUD_CLKID_TDMOUT_B_SCLK_PRE_EN 142 1081cd50181SJerome Brunet #define AUD_CLKID_TDMOUT_C_SCLK_PRE_EN 143 1091cd50181SJerome Brunet #define AUD_CLKID_TDMIN_A_SCLK_POST_EN 144 1101cd50181SJerome Brunet #define AUD_CLKID_TDMIN_B_SCLK_POST_EN 145 1111cd50181SJerome Brunet #define AUD_CLKID_TDMIN_C_SCLK_POST_EN 146 1121cd50181SJerome Brunet #define AUD_CLKID_TDMIN_LB_SCLK_POST_EN 147 1131cd50181SJerome Brunet #define AUD_CLKID_TDMOUT_A_SCLK_POST_EN 148 1141cd50181SJerome Brunet #define AUD_CLKID_TDMOUT_B_SCLK_POST_EN 149 1151cd50181SJerome Brunet #define AUD_CLKID_TDMOUT_C_SCLK_POST_EN 150 11607500138SMaxime Jourdan #define AUD_CLKID_SPDIFOUT_B_CLK_SEL 153 11707500138SMaxime Jourdan #define AUD_CLKID_SPDIFOUT_B_CLK_DIV 154 1181cd50181SJerome Brunet 119cf52db45SJerome Brunet 1201cd50181SJerome Brunet /* include the CLKIDs which are part of the DT bindings */ 1211cd50181SJerome Brunet #include <dt-bindings/clock/axg-audio-clkc.h> 1221cd50181SJerome Brunet 123cf52db45SJerome Brunet #define NR_CLKS 164 1241cd50181SJerome Brunet 1251cd50181SJerome Brunet #endif /*__AXG_AUDIO_CLKC_H */ 126