1ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only 27b5c5720SJerome Brunetmenu "Clock support for Amlogic platforms" 37b5c5720SJerome Brunet depends on ARCH_MESON || COMPILE_TEST 47b5c5720SJerome Brunet 5889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_REGMAP 6889c2b7eSJerome Brunet tristate 7ea11dda9SJerome Brunet select REGMAP 8ea11dda9SJerome Brunet 9889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_DUALDIV 10889c2b7eSJerome Brunet tristate 11889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 12889c2b7eSJerome Brunet 13889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_MPLL 14889c2b7eSJerome Brunet tristate 15889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 16889c2b7eSJerome Brunet 17889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_PHASE 18889c2b7eSJerome Brunet tristate 19889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 20889c2b7eSJerome Brunet 21889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_PLL 22889c2b7eSJerome Brunet tristate 23889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 24889c2b7eSJerome Brunet 25889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_SCLK_DIV 26889c2b7eSJerome Brunet tristate 27889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 28889c2b7eSJerome Brunet 29889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_VID_PLL_DIV 30889c2b7eSJerome Brunet tristate 31889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 32889c2b7eSJerome Brunet 33*230b6f3aSNeil Armstrongconfig COMMON_CLK_MESON_CLKC_UTILS 34*230b6f3aSNeil Armstrong tristate 35*230b6f3aSNeil Armstrong 36889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_AO_CLKC 37889c2b7eSJerome Brunet tristate 38889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 39889c2b7eSJerome Brunet select RESET_CONTROLLER 40889c2b7eSJerome Brunet 416682bd4dSJerome Brunetconfig COMMON_CLK_MESON_EE_CLKC 426682bd4dSJerome Brunet tristate 436682bd4dSJerome Brunet select COMMON_CLK_MESON_REGMAP 446682bd4dSJerome Brunet 4526d34431SNeil Armstrongconfig COMMON_CLK_MESON_CPU_DYNDIV 4626d34431SNeil Armstrong tristate 4726d34431SNeil Armstrong select COMMON_CLK_MESON_REGMAP 4826d34431SNeil Armstrong 49cb7c47d7SMichael Turquetteconfig COMMON_CLK_MESON8B 507b5c5720SJerome Brunet bool "Meson8 SoC Clock controller support" 517b5c5720SJerome Brunet depends on ARM 527b5c5720SJerome Brunet default y 53889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 54889c2b7eSJerome Brunet select COMMON_CLK_MESON_MPLL 55889c2b7eSJerome Brunet select COMMON_CLK_MESON_PLL 56889c2b7eSJerome Brunet select MFD_SYSCON 5718962172SMartin Blumenstingl select RESET_CONTROLLER 58cb7c47d7SMichael Turquette help 59855f06a1SMartin Blumenstingl Support for the clock controller on AmLogic S802 (Meson8), 60855f06a1SMartin Blumenstingl S805 (Meson8b) and S812 (Meson8m2) devices. Say Y if you 61855f06a1SMartin Blumenstingl want peripherals and CPU frequency scaling to work. 62738f66d3SMichael Turquette 63738f66d3SMichael Turquetteconfig COMMON_CLK_GXBB 6420425f63SKevin Hilman tristate "GXBB and GXL SoC clock controllers support" 657b5c5720SJerome Brunet depends on ARM64 667b5c5720SJerome Brunet default y 67889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 68889c2b7eSJerome Brunet select COMMON_CLK_MESON_DUALDIV 69889c2b7eSJerome Brunet select COMMON_CLK_MESON_VID_PLL_DIV 70889c2b7eSJerome Brunet select COMMON_CLK_MESON_MPLL 71889c2b7eSJerome Brunet select COMMON_CLK_MESON_PLL 72889c2b7eSJerome Brunet select COMMON_CLK_MESON_AO_CLKC 736682bd4dSJerome Brunet select COMMON_CLK_MESON_EE_CLKC 744162dd5bSJerome Brunet select MFD_SYSCON 75738f66d3SMichael Turquette help 76738f66d3SMichael Turquette Support for the clock controller on AmLogic S905 devices, aka gxbb. 77738f66d3SMichael Turquette Say Y if you want peripherals and CPU frequency scaling to work. 7878b4af31SQiufang Dai 7978b4af31SQiufang Daiconfig COMMON_CLK_AXG 8020425f63SKevin Hilman tristate "AXG SoC clock controllers support" 817b5c5720SJerome Brunet depends on ARM64 827b5c5720SJerome Brunet default y 83889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 84889c2b7eSJerome Brunet select COMMON_CLK_MESON_DUALDIV 85889c2b7eSJerome Brunet select COMMON_CLK_MESON_MPLL 86889c2b7eSJerome Brunet select COMMON_CLK_MESON_PLL 87889c2b7eSJerome Brunet select COMMON_CLK_MESON_AO_CLKC 886682bd4dSJerome Brunet select COMMON_CLK_MESON_EE_CLKC 894162dd5bSJerome Brunet select MFD_SYSCON 9078b4af31SQiufang Dai help 9178b4af31SQiufang Dai Support for the clock controller on AmLogic A113D devices, aka axg. 9278b4af31SQiufang Dai Say Y if you want peripherals and CPU frequency scaling to work. 931cd50181SJerome Brunet 941cd50181SJerome Brunetconfig COMMON_CLK_AXG_AUDIO 951cd50181SJerome Brunet tristate "Meson AXG Audio Clock Controller Driver" 967b5c5720SJerome Brunet depends on ARM64 97889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 98889c2b7eSJerome Brunet select COMMON_CLK_MESON_PHASE 99889c2b7eSJerome Brunet select COMMON_CLK_MESON_SCLK_DIV 100cb78ba76SJerome Brunet select REGMAP_MMIO 1011cd50181SJerome Brunet help 1021cd50181SJerome Brunet Support for the audio clock controller on AmLogic A113D devices, 1031cd50181SJerome Brunet aka axg, Say Y if you want audio subsystem to work. 104085a4ea9SJian Hu 10528f3be51SDmitry Rokosovconfig COMMON_CLK_A1_PLL 10628f3be51SDmitry Rokosov tristate "Amlogic A1 SoC PLL controller support" 10728f3be51SDmitry Rokosov depends on ARM64 10828f3be51SDmitry Rokosov select COMMON_CLK_MESON_REGMAP 10928f3be51SDmitry Rokosov select COMMON_CLK_MESON_PLL 11028f3be51SDmitry Rokosov help 11128f3be51SDmitry Rokosov Support for the PLL clock controller on Amlogic A113L based 11228f3be51SDmitry Rokosov device, A1 SoC Family. Say Y if you want A1 PLL clock controller 11328f3be51SDmitry Rokosov to work. 11428f3be51SDmitry Rokosov 11584af9144SDmitry Rokosovconfig COMMON_CLK_A1_PERIPHERALS 11684af9144SDmitry Rokosov tristate "Amlogic A1 SoC Peripherals clock controller support" 11784af9144SDmitry Rokosov depends on ARM64 11884af9144SDmitry Rokosov select COMMON_CLK_MESON_DUALDIV 11984af9144SDmitry Rokosov select COMMON_CLK_MESON_REGMAP 12084af9144SDmitry Rokosov help 12184af9144SDmitry Rokosov Support for the Peripherals clock controller on Amlogic A113L based 12284af9144SDmitry Rokosov device, A1 SoC Family. Say Y if you want A1 Peripherals clock 12384af9144SDmitry Rokosov controller to work. 12484af9144SDmitry Rokosov 125085a4ea9SJian Huconfig COMMON_CLK_G12A 12620425f63SKevin Hilman tristate "G12 and SM1 SoC clock controllers support" 1277b5c5720SJerome Brunet depends on ARM64 1287b5c5720SJerome Brunet default y 129085a4ea9SJian Hu select COMMON_CLK_MESON_REGMAP 130042f01bbSNeil Armstrong select COMMON_CLK_MESON_DUALDIV 131085a4ea9SJian Hu select COMMON_CLK_MESON_MPLL 132085a4ea9SJian Hu select COMMON_CLK_MESON_PLL 133042f01bbSNeil Armstrong select COMMON_CLK_MESON_AO_CLKC 1346682bd4dSJerome Brunet select COMMON_CLK_MESON_EE_CLKC 13526d34431SNeil Armstrong select COMMON_CLK_MESON_CPU_DYNDIV 136bae69bfaSKevin Hilman select COMMON_CLK_MESON_VID_PLL_DIV 137085a4ea9SJian Hu select MFD_SYSCON 138085a4ea9SJian Hu help 139085a4ea9SJian Hu Support for the clock controller on Amlogic S905D2, S905X2 and S905Y2 140085a4ea9SJian Hu devices, aka g12a. Say Y if you want peripherals to work. 1417b5c5720SJerome Brunetendmenu 142