1889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_INPUT 2889c2b7eSJerome Brunet tristate 3cb7c47d7SMichael Turquette 4889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_REGMAP 5889c2b7eSJerome Brunet tristate 6ea11dda9SJerome Brunet select REGMAP 7ea11dda9SJerome Brunet 8889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_DUALDIV 9889c2b7eSJerome Brunet tristate 10889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 11889c2b7eSJerome Brunet 12889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_MPLL 13889c2b7eSJerome Brunet tristate 14889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 15889c2b7eSJerome Brunet 16889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_PHASE 17889c2b7eSJerome Brunet tristate 18889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 19889c2b7eSJerome Brunet 20889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_PLL 21889c2b7eSJerome Brunet tristate 22889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 23889c2b7eSJerome Brunet 24889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_SCLK_DIV 25889c2b7eSJerome Brunet tristate 26889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 27889c2b7eSJerome Brunet 28889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_VID_PLL_DIV 29889c2b7eSJerome Brunet tristate 30889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 31889c2b7eSJerome Brunet 32889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_AO_CLKC 33889c2b7eSJerome Brunet tristate 34889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 35889c2b7eSJerome Brunet select COMMON_CLK_MESON_INPUT 36889c2b7eSJerome Brunet select RESET_CONTROLLER 37889c2b7eSJerome Brunet 38cb7c47d7SMichael Turquetteconfig COMMON_CLK_MESON8B 39cb7c47d7SMichael Turquette bool 40889c2b7eSJerome Brunet depends on ARCH_MESON 41889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 42889c2b7eSJerome Brunet select COMMON_CLK_MESON_MPLL 43889c2b7eSJerome Brunet select COMMON_CLK_MESON_PLL 44889c2b7eSJerome Brunet select MFD_SYSCON 4518962172SMartin Blumenstingl select RESET_CONTROLLER 46cb7c47d7SMichael Turquette help 47855f06a1SMartin Blumenstingl Support for the clock controller on AmLogic S802 (Meson8), 48855f06a1SMartin Blumenstingl S805 (Meson8b) and S812 (Meson8m2) devices. Say Y if you 49855f06a1SMartin Blumenstingl want peripherals and CPU frequency scaling to work. 50738f66d3SMichael Turquette 51738f66d3SMichael Turquetteconfig COMMON_CLK_GXBB 52738f66d3SMichael Turquette bool 53889c2b7eSJerome Brunet depends on ARCH_MESON 54889c2b7eSJerome Brunet select COMMON_CLK_MESON_INPUT 55889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 56889c2b7eSJerome Brunet select COMMON_CLK_MESON_DUALDIV 57889c2b7eSJerome Brunet select COMMON_CLK_MESON_VID_PLL_DIV 58889c2b7eSJerome Brunet select COMMON_CLK_MESON_MPLL 59889c2b7eSJerome Brunet select COMMON_CLK_MESON_PLL 60889c2b7eSJerome Brunet select COMMON_CLK_MESON_AO_CLKC 614162dd5bSJerome Brunet select MFD_SYSCON 62738f66d3SMichael Turquette help 63738f66d3SMichael Turquette Support for the clock controller on AmLogic S905 devices, aka gxbb. 64738f66d3SMichael Turquette Say Y if you want peripherals and CPU frequency scaling to work. 6578b4af31SQiufang Dai 6678b4af31SQiufang Daiconfig COMMON_CLK_AXG 6778b4af31SQiufang Dai bool 68889c2b7eSJerome Brunet depends on ARCH_MESON 69889c2b7eSJerome Brunet select COMMON_CLK_MESON_INPUT 70889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 71889c2b7eSJerome Brunet select COMMON_CLK_MESON_DUALDIV 72889c2b7eSJerome Brunet select COMMON_CLK_MESON_MPLL 73889c2b7eSJerome Brunet select COMMON_CLK_MESON_PLL 74889c2b7eSJerome Brunet select COMMON_CLK_MESON_AO_CLKC 754162dd5bSJerome Brunet select MFD_SYSCON 7678b4af31SQiufang Dai help 7778b4af31SQiufang Dai Support for the clock controller on AmLogic A113D devices, aka axg. 7878b4af31SQiufang Dai Say Y if you want peripherals and CPU frequency scaling to work. 791cd50181SJerome Brunet 801cd50181SJerome Brunetconfig COMMON_CLK_AXG_AUDIO 811cd50181SJerome Brunet tristate "Meson AXG Audio Clock Controller Driver" 82889c2b7eSJerome Brunet depends on ARCH_MESON 83889c2b7eSJerome Brunet select COMMON_CLK_MESON_INPUT 84889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 85889c2b7eSJerome Brunet select COMMON_CLK_MESON_PHASE 86889c2b7eSJerome Brunet select COMMON_CLK_MESON_SCLK_DIV 87cb78ba76SJerome Brunet select REGMAP_MMIO 881cd50181SJerome Brunet help 891cd50181SJerome Brunet Support for the audio clock controller on AmLogic A113D devices, 901cd50181SJerome Brunet aka axg, Say Y if you want audio subsystem to work. 91085a4ea9SJian Hu 92085a4ea9SJian Huconfig COMMON_CLK_G12A 93085a4ea9SJian Hu bool 94085a4ea9SJian Hu depends on ARCH_MESON 95085a4ea9SJian Hu select COMMON_CLK_MESON_INPUT 96085a4ea9SJian Hu select COMMON_CLK_MESON_REGMAP 97085a4ea9SJian Hu select COMMON_CLK_MESON_MPLL 98085a4ea9SJian Hu select COMMON_CLK_MESON_PLL 99085a4ea9SJian Hu select MFD_SYSCON 100085a4ea9SJian Hu help 101085a4ea9SJian Hu Support for the clock controller on Amlogic S905D2, S905X2 and S905Y2 102085a4ea9SJian Hu devices, aka g12a. Say Y if you want peripherals to work. 103