1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2014 MediaTek Inc. 4 * Author: James Liao <jamesjj.liao@mediatek.com> 5 */ 6 7 #include <linux/bitops.h> 8 #include <linux/clk-provider.h> 9 #include <linux/err.h> 10 #include <linux/io.h> 11 #include <linux/mfd/syscon.h> 12 #include <linux/module.h> 13 #include <linux/of.h> 14 #include <linux/of_device.h> 15 #include <linux/platform_device.h> 16 #include <linux/slab.h> 17 18 #include "clk-mtk.h" 19 #include "clk-gate.h" 20 21 struct clk_hw_onecell_data *mtk_alloc_clk_data(unsigned int clk_num) 22 { 23 int i; 24 struct clk_hw_onecell_data *clk_data; 25 26 clk_data = kzalloc(struct_size(clk_data, hws, clk_num), GFP_KERNEL); 27 if (!clk_data) 28 return NULL; 29 30 clk_data->num = clk_num; 31 32 for (i = 0; i < clk_num; i++) 33 clk_data->hws[i] = ERR_PTR(-ENOENT); 34 35 return clk_data; 36 } 37 EXPORT_SYMBOL_GPL(mtk_alloc_clk_data); 38 39 void mtk_free_clk_data(struct clk_hw_onecell_data *clk_data) 40 { 41 kfree(clk_data); 42 } 43 EXPORT_SYMBOL_GPL(mtk_free_clk_data); 44 45 int mtk_clk_register_fixed_clks(const struct mtk_fixed_clk *clks, int num, 46 struct clk_hw_onecell_data *clk_data) 47 { 48 int i; 49 struct clk_hw *hw; 50 51 if (!clk_data) 52 return -ENOMEM; 53 54 for (i = 0; i < num; i++) { 55 const struct mtk_fixed_clk *rc = &clks[i]; 56 57 if (!IS_ERR_OR_NULL(clk_data->hws[rc->id])) { 58 pr_warn("Trying to register duplicate clock ID: %d\n", rc->id); 59 continue; 60 } 61 62 hw = clk_hw_register_fixed_rate(NULL, rc->name, rc->parent, 0, 63 rc->rate); 64 65 if (IS_ERR(hw)) { 66 pr_err("Failed to register clk %s: %pe\n", rc->name, 67 hw); 68 goto err; 69 } 70 71 clk_data->hws[rc->id] = hw; 72 } 73 74 return 0; 75 76 err: 77 while (--i >= 0) { 78 const struct mtk_fixed_clk *rc = &clks[i]; 79 80 if (IS_ERR_OR_NULL(clk_data->hws[rc->id])) 81 continue; 82 83 clk_unregister_fixed_rate(clk_data->hws[rc->id]->clk); 84 clk_data->hws[rc->id] = ERR_PTR(-ENOENT); 85 } 86 87 return PTR_ERR(hw); 88 } 89 EXPORT_SYMBOL_GPL(mtk_clk_register_fixed_clks); 90 91 void mtk_clk_unregister_fixed_clks(const struct mtk_fixed_clk *clks, int num, 92 struct clk_hw_onecell_data *clk_data) 93 { 94 int i; 95 96 if (!clk_data) 97 return; 98 99 for (i = num; i > 0; i--) { 100 const struct mtk_fixed_clk *rc = &clks[i - 1]; 101 102 if (IS_ERR_OR_NULL(clk_data->hws[rc->id])) 103 continue; 104 105 clk_unregister_fixed_rate(clk_data->hws[rc->id]->clk); 106 clk_data->hws[rc->id] = ERR_PTR(-ENOENT); 107 } 108 } 109 EXPORT_SYMBOL_GPL(mtk_clk_unregister_fixed_clks); 110 111 int mtk_clk_register_factors(const struct mtk_fixed_factor *clks, int num, 112 struct clk_hw_onecell_data *clk_data) 113 { 114 int i; 115 struct clk_hw *hw; 116 117 if (!clk_data) 118 return -ENOMEM; 119 120 for (i = 0; i < num; i++) { 121 const struct mtk_fixed_factor *ff = &clks[i]; 122 123 if (!IS_ERR_OR_NULL(clk_data->hws[ff->id])) { 124 pr_warn("Trying to register duplicate clock ID: %d\n", ff->id); 125 continue; 126 } 127 128 hw = clk_hw_register_fixed_factor(NULL, ff->name, ff->parent_name, 129 CLK_SET_RATE_PARENT, ff->mult, ff->div); 130 131 if (IS_ERR(hw)) { 132 pr_err("Failed to register clk %s: %pe\n", ff->name, 133 hw); 134 goto err; 135 } 136 137 clk_data->hws[ff->id] = hw; 138 } 139 140 return 0; 141 142 err: 143 while (--i >= 0) { 144 const struct mtk_fixed_factor *ff = &clks[i]; 145 146 if (IS_ERR_OR_NULL(clk_data->hws[ff->id])) 147 continue; 148 149 clk_unregister_fixed_factor(clk_data->hws[ff->id]->clk); 150 clk_data->hws[ff->id] = ERR_PTR(-ENOENT); 151 } 152 153 return PTR_ERR(hw); 154 } 155 EXPORT_SYMBOL_GPL(mtk_clk_register_factors); 156 157 void mtk_clk_unregister_factors(const struct mtk_fixed_factor *clks, int num, 158 struct clk_hw_onecell_data *clk_data) 159 { 160 int i; 161 162 if (!clk_data) 163 return; 164 165 for (i = num; i > 0; i--) { 166 const struct mtk_fixed_factor *ff = &clks[i - 1]; 167 168 if (IS_ERR_OR_NULL(clk_data->hws[ff->id])) 169 continue; 170 171 clk_unregister_fixed_factor(clk_data->hws[ff->id]->clk); 172 clk_data->hws[ff->id] = ERR_PTR(-ENOENT); 173 } 174 } 175 EXPORT_SYMBOL_GPL(mtk_clk_unregister_factors); 176 177 static struct clk_hw *mtk_clk_register_composite(const struct mtk_composite *mc, 178 void __iomem *base, spinlock_t *lock) 179 { 180 struct clk_hw *hw; 181 struct clk_mux *mux = NULL; 182 struct clk_gate *gate = NULL; 183 struct clk_divider *div = NULL; 184 struct clk_hw *mux_hw = NULL, *gate_hw = NULL, *div_hw = NULL; 185 const struct clk_ops *mux_ops = NULL, *gate_ops = NULL, *div_ops = NULL; 186 const char * const *parent_names; 187 const char *parent; 188 int num_parents; 189 int ret; 190 191 if (mc->mux_shift >= 0) { 192 mux = kzalloc(sizeof(*mux), GFP_KERNEL); 193 if (!mux) 194 return ERR_PTR(-ENOMEM); 195 196 mux->reg = base + mc->mux_reg; 197 mux->mask = BIT(mc->mux_width) - 1; 198 mux->shift = mc->mux_shift; 199 mux->lock = lock; 200 mux->flags = mc->mux_flags; 201 mux_hw = &mux->hw; 202 mux_ops = &clk_mux_ops; 203 204 parent_names = mc->parent_names; 205 num_parents = mc->num_parents; 206 } else { 207 parent = mc->parent; 208 parent_names = &parent; 209 num_parents = 1; 210 } 211 212 if (mc->gate_shift >= 0) { 213 gate = kzalloc(sizeof(*gate), GFP_KERNEL); 214 if (!gate) { 215 ret = -ENOMEM; 216 goto err_out; 217 } 218 219 gate->reg = base + mc->gate_reg; 220 gate->bit_idx = mc->gate_shift; 221 gate->flags = CLK_GATE_SET_TO_DISABLE; 222 gate->lock = lock; 223 224 gate_hw = &gate->hw; 225 gate_ops = &clk_gate_ops; 226 } 227 228 if (mc->divider_shift >= 0) { 229 div = kzalloc(sizeof(*div), GFP_KERNEL); 230 if (!div) { 231 ret = -ENOMEM; 232 goto err_out; 233 } 234 235 div->reg = base + mc->divider_reg; 236 div->shift = mc->divider_shift; 237 div->width = mc->divider_width; 238 div->lock = lock; 239 240 div_hw = &div->hw; 241 div_ops = &clk_divider_ops; 242 } 243 244 hw = clk_hw_register_composite(NULL, mc->name, parent_names, num_parents, 245 mux_hw, mux_ops, 246 div_hw, div_ops, 247 gate_hw, gate_ops, 248 mc->flags); 249 250 if (IS_ERR(hw)) { 251 ret = PTR_ERR(hw); 252 goto err_out; 253 } 254 255 return hw; 256 err_out: 257 kfree(div); 258 kfree(gate); 259 kfree(mux); 260 261 return ERR_PTR(ret); 262 } 263 264 static void mtk_clk_unregister_composite(struct clk_hw *hw) 265 { 266 struct clk_composite *composite; 267 struct clk_mux *mux = NULL; 268 struct clk_gate *gate = NULL; 269 struct clk_divider *div = NULL; 270 271 if (!hw) 272 return; 273 274 composite = to_clk_composite(hw); 275 if (composite->mux_hw) 276 mux = to_clk_mux(composite->mux_hw); 277 if (composite->gate_hw) 278 gate = to_clk_gate(composite->gate_hw); 279 if (composite->rate_hw) 280 div = to_clk_divider(composite->rate_hw); 281 282 clk_hw_unregister_composite(hw); 283 kfree(div); 284 kfree(gate); 285 kfree(mux); 286 } 287 288 int mtk_clk_register_composites(const struct mtk_composite *mcs, int num, 289 void __iomem *base, spinlock_t *lock, 290 struct clk_hw_onecell_data *clk_data) 291 { 292 struct clk_hw *hw; 293 int i; 294 295 if (!clk_data) 296 return -ENOMEM; 297 298 for (i = 0; i < num; i++) { 299 const struct mtk_composite *mc = &mcs[i]; 300 301 if (!IS_ERR_OR_NULL(clk_data->hws[mc->id])) { 302 pr_warn("Trying to register duplicate clock ID: %d\n", 303 mc->id); 304 continue; 305 } 306 307 hw = mtk_clk_register_composite(mc, base, lock); 308 309 if (IS_ERR(hw)) { 310 pr_err("Failed to register clk %s: %pe\n", mc->name, 311 hw); 312 goto err; 313 } 314 315 clk_data->hws[mc->id] = hw; 316 } 317 318 return 0; 319 320 err: 321 while (--i >= 0) { 322 const struct mtk_composite *mc = &mcs[i]; 323 324 if (IS_ERR_OR_NULL(clk_data->hws[mcs->id])) 325 continue; 326 327 mtk_clk_unregister_composite(clk_data->hws[mc->id]); 328 clk_data->hws[mc->id] = ERR_PTR(-ENOENT); 329 } 330 331 return PTR_ERR(hw); 332 } 333 EXPORT_SYMBOL_GPL(mtk_clk_register_composites); 334 335 void mtk_clk_unregister_composites(const struct mtk_composite *mcs, int num, 336 struct clk_hw_onecell_data *clk_data) 337 { 338 int i; 339 340 if (!clk_data) 341 return; 342 343 for (i = num; i > 0; i--) { 344 const struct mtk_composite *mc = &mcs[i - 1]; 345 346 if (IS_ERR_OR_NULL(clk_data->hws[mc->id])) 347 continue; 348 349 mtk_clk_unregister_composite(clk_data->hws[mc->id]); 350 clk_data->hws[mc->id] = ERR_PTR(-ENOENT); 351 } 352 } 353 EXPORT_SYMBOL_GPL(mtk_clk_unregister_composites); 354 355 int mtk_clk_register_dividers(const struct mtk_clk_divider *mcds, int num, 356 void __iomem *base, spinlock_t *lock, 357 struct clk_hw_onecell_data *clk_data) 358 { 359 struct clk_hw *hw; 360 int i; 361 362 if (!clk_data) 363 return -ENOMEM; 364 365 for (i = 0; i < num; i++) { 366 const struct mtk_clk_divider *mcd = &mcds[i]; 367 368 if (!IS_ERR_OR_NULL(clk_data->hws[mcd->id])) { 369 pr_warn("Trying to register duplicate clock ID: %d\n", 370 mcd->id); 371 continue; 372 } 373 374 hw = clk_hw_register_divider(NULL, mcd->name, mcd->parent_name, 375 mcd->flags, base + mcd->div_reg, mcd->div_shift, 376 mcd->div_width, mcd->clk_divider_flags, lock); 377 378 if (IS_ERR(hw)) { 379 pr_err("Failed to register clk %s: %pe\n", mcd->name, 380 hw); 381 goto err; 382 } 383 384 clk_data->hws[mcd->id] = hw; 385 } 386 387 return 0; 388 389 err: 390 while (--i >= 0) { 391 const struct mtk_clk_divider *mcd = &mcds[i]; 392 393 if (IS_ERR_OR_NULL(clk_data->hws[mcd->id])) 394 continue; 395 396 mtk_clk_unregister_composite(clk_data->hws[mcd->id]); 397 clk_data->hws[mcd->id] = ERR_PTR(-ENOENT); 398 } 399 400 return PTR_ERR(hw); 401 } 402 403 void mtk_clk_unregister_dividers(const struct mtk_clk_divider *mcds, int num, 404 struct clk_hw_onecell_data *clk_data) 405 { 406 int i; 407 408 if (!clk_data) 409 return; 410 411 for (i = num; i > 0; i--) { 412 const struct mtk_clk_divider *mcd = &mcds[i - 1]; 413 414 if (IS_ERR_OR_NULL(clk_data->hws[mcd->id])) 415 continue; 416 417 clk_unregister_divider(clk_data->hws[mcd->id]->clk); 418 clk_data->hws[mcd->id] = ERR_PTR(-ENOENT); 419 } 420 } 421 422 int mtk_clk_simple_probe(struct platform_device *pdev) 423 { 424 const struct mtk_clk_desc *mcd; 425 struct clk_hw_onecell_data *clk_data; 426 struct device_node *node = pdev->dev.of_node; 427 int r; 428 429 mcd = of_device_get_match_data(&pdev->dev); 430 if (!mcd) 431 return -EINVAL; 432 433 clk_data = mtk_alloc_clk_data(mcd->num_clks); 434 if (!clk_data) 435 return -ENOMEM; 436 437 r = mtk_clk_register_gates(node, mcd->clks, mcd->num_clks, clk_data); 438 if (r) 439 goto free_data; 440 441 r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); 442 if (r) 443 goto unregister_clks; 444 445 platform_set_drvdata(pdev, clk_data); 446 447 if (mcd->rst_desc) { 448 r = mtk_register_reset_controller_with_dev(&pdev->dev, 449 mcd->rst_desc); 450 if (r) 451 goto unregister_clks; 452 } 453 454 return r; 455 456 unregister_clks: 457 mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_data); 458 free_data: 459 mtk_free_clk_data(clk_data); 460 return r; 461 } 462 463 int mtk_clk_simple_remove(struct platform_device *pdev) 464 { 465 const struct mtk_clk_desc *mcd = of_device_get_match_data(&pdev->dev); 466 struct clk_hw_onecell_data *clk_data = platform_get_drvdata(pdev); 467 struct device_node *node = pdev->dev.of_node; 468 469 of_clk_del_provider(node); 470 mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_data); 471 mtk_free_clk_data(clk_data); 472 473 return 0; 474 } 475 476 MODULE_LICENSE("GPL"); 477