10360be01SChun-Jie Chen // SPDX-License-Identifier: GPL-2.0-only 20360be01SChun-Jie Chen // 30360be01SChun-Jie Chen // Copyright (c) 2021 MediaTek Inc. 40360be01SChun-Jie Chen // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com> 50360be01SChun-Jie Chen 60360be01SChun-Jie Chen #include "clk-gate.h" 70360be01SChun-Jie Chen #include "clk-mtk.h" 80360be01SChun-Jie Chen #include "clk-mux.h" 90360be01SChun-Jie Chen 100360be01SChun-Jie Chen #include <dt-bindings/clock/mt8195-clk.h> 110360be01SChun-Jie Chen #include <linux/of_device.h> 120360be01SChun-Jie Chen #include <linux/platform_device.h> 130360be01SChun-Jie Chen 140360be01SChun-Jie Chen static DEFINE_SPINLOCK(mt8195_clk_lock); 150360be01SChun-Jie Chen 160360be01SChun-Jie Chen static const struct mtk_fixed_clk top_fixed_clks[] = { 170360be01SChun-Jie Chen FIXED_CLK(CLK_TOP_IN_DGI, "in_dgi", NULL, 165000000), 180360be01SChun-Jie Chen FIXED_CLK(CLK_TOP_ULPOSC1, "ulposc1", NULL, 248000000), 190360be01SChun-Jie Chen FIXED_CLK(CLK_TOP_ULPOSC2, "ulposc2", NULL, 326000000), 200360be01SChun-Jie Chen FIXED_CLK(CLK_TOP_MEM_466M, "mem_466m", NULL, 533000000), 210360be01SChun-Jie Chen FIXED_CLK(CLK_TOP_MPHONE_SLAVE_B, "mphone_slave_b", NULL, 49152000), 220360be01SChun-Jie Chen FIXED_CLK(CLK_TOP_PEXTP_PIPE, "pextp_pipe", NULL, 250000000), 230360be01SChun-Jie Chen FIXED_CLK(CLK_TOP_UFS_RX_SYMBOL, "ufs_rx_symbol", NULL, 166000000), 240360be01SChun-Jie Chen FIXED_CLK(CLK_TOP_UFS_TX_SYMBOL, "ufs_tx_symbol", NULL, 166000000), 250360be01SChun-Jie Chen FIXED_CLK(CLK_TOP_SSUSB_U3PHY_P1_P_P0, "ssusb_u3phy_p1_p_p0", NULL, 131000000), 260360be01SChun-Jie Chen FIXED_CLK(CLK_TOP_UFS_RX_SYMBOL1, "ufs_rx_symbol1", NULL, 166000000), 270360be01SChun-Jie Chen FIXED_CLK(CLK_TOP_FPC, "fpc", NULL, 50000000), 280360be01SChun-Jie Chen FIXED_CLK(CLK_TOP_HDMIRX_P, "hdmirx_p", NULL, 594000000), 290360be01SChun-Jie Chen }; 300360be01SChun-Jie Chen 310360be01SChun-Jie Chen static const struct mtk_fixed_factor top_divs[] = { 320360be01SChun-Jie Chen FACTOR(CLK_TOP_CLK26M_D2, "clk26m_d2", "clk26m", 1, 2), 330360be01SChun-Jie Chen FACTOR(CLK_TOP_CLK26M_D52, "clk26m_d52", "clk26m", 1, 52), 340360be01SChun-Jie Chen FACTOR(CLK_TOP_IN_DGI_D2, "in_dgi_d2", "in_dgi", 1, 2), 350360be01SChun-Jie Chen FACTOR(CLK_TOP_IN_DGI_D4, "in_dgi_d4", "in_dgi", 1, 4), 360360be01SChun-Jie Chen FACTOR(CLK_TOP_IN_DGI_D6, "in_dgi_d6", "in_dgi", 1, 6), 370360be01SChun-Jie Chen FACTOR(CLK_TOP_IN_DGI_D8, "in_dgi_d8", "in_dgi", 1, 8), 38327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_MAINPLL_D3, "mainpll_d3", "mainpll", 1, 3, 0), 39327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_MAINPLL_D4, "mainpll_d4", "mainpll", 1, 4, 0), 40327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_MAINPLL_D4_D2, "mainpll_d4_d2", "mainpll_d4", 1, 2, 0), 41327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_MAINPLL_D4_D4, "mainpll_d4_d4", "mainpll_d4", 1, 4, 0), 42327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_MAINPLL_D4_D8, "mainpll_d4_d8", "mainpll_d4", 1, 8, 0), 43327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_MAINPLL_D5, "mainpll_d5", "mainpll", 1, 5, 0), 44327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_MAINPLL_D5_D2, "mainpll_d5_d2", "mainpll_d5", 1, 2, 0), 45327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_MAINPLL_D5_D4, "mainpll_d5_d4", "mainpll_d5", 1, 4, 0), 46327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_MAINPLL_D5_D8, "mainpll_d5_d8", "mainpll_d5", 1, 8, 0), 47327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_MAINPLL_D6, "mainpll_d6", "mainpll", 1, 6, 0), 48327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_MAINPLL_D6_D2, "mainpll_d6_d2", "mainpll_d6", 1, 2, 0), 49327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_MAINPLL_D6_D4, "mainpll_d6_d4", "mainpll_d6", 1, 4, 0), 50327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_MAINPLL_D6_D8, "mainpll_d6_d8", "mainpll_d6", 1, 8, 0), 51327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_MAINPLL_D7, "mainpll_d7", "mainpll", 1, 7, 0), 52327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_MAINPLL_D7_D2, "mainpll_d7_d2", "mainpll_d7", 1, 2, 0), 53327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_MAINPLL_D7_D4, "mainpll_d7_d4", "mainpll_d7", 1, 4, 0), 54327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_MAINPLL_D7_D8, "mainpll_d7_d8", "mainpll_d7", 1, 8, 0), 55327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_MAINPLL_D9, "mainpll_d9", "mainpll", 1, 9, 0), 56327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_UNIVPLL_D2, "univpll_d2", "univpll", 1, 2, 0), 57327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_UNIVPLL_D3, "univpll_d3", "univpll", 1, 3, 0), 58327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_UNIVPLL_D4, "univpll_d4", "univpll", 1, 4, 0), 59327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_UNIVPLL_D4_D2, "univpll_d4_d2", "univpll_d4", 1, 2, 0), 60327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_UNIVPLL_D4_D4, "univpll_d4_d4", "univpll_d4", 1, 4, 0), 61327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_UNIVPLL_D4_D8, "univpll_d4_d8", "univpll_d4", 1, 8, 0), 62327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_UNIVPLL_D5, "univpll_d5", "univpll", 1, 5, 0), 63327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_UNIVPLL_D5_D2, "univpll_d5_d2", "univpll_d5", 1, 2, 0), 64327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_UNIVPLL_D5_D4, "univpll_d5_d4", "univpll_d5", 1, 4, 0), 65327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_UNIVPLL_D5_D8, "univpll_d5_d8", "univpll_d5", 1, 8, 0), 66327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_UNIVPLL_D6, "univpll_d6", "univpll", 1, 6, 0), 67327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_UNIVPLL_D6_D2, "univpll_d6_d2", "univpll_d6", 1, 2, 0), 68327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_UNIVPLL_D6_D4, "univpll_d6_d4", "univpll_d6", 1, 4, 0), 69327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_UNIVPLL_D6_D8, "univpll_d6_d8", "univpll_d6", 1, 8, 0), 70327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_UNIVPLL_D6_D16, "univpll_d6_d16", "univpll_d6", 1, 16, 0), 71327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_UNIVPLL_D7, "univpll_d7", "univpll", 1, 7, 0), 72327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_UNIVPLL_192M, "univpll_192m", "univpll", 1, 13, 0), 73327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_UNIVPLL_192M_D4, "univpll_192m_d4", "univpll_192m", 1, 4, 0), 74327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_UNIVPLL_192M_D8, "univpll_192m_d8", "univpll_192m", 1, 8, 0), 75327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_UNIVPLL_192M_D16, "univpll_192m_d16", "univpll_192m", 1, 16, 0), 76327eeb6cSAngeloGioacchino Del Regno FACTOR_FLAGS(CLK_TOP_UNIVPLL_192M_D32, "univpll_192m_d32", "univpll_192m", 1, 32, 0), 770360be01SChun-Jie Chen FACTOR(CLK_TOP_APLL1_D3, "apll1_d3", "apll1", 1, 3), 780360be01SChun-Jie Chen FACTOR(CLK_TOP_APLL1_D4, "apll1_d4", "apll1", 1, 4), 790360be01SChun-Jie Chen FACTOR(CLK_TOP_APLL2_D3, "apll2_d3", "apll2", 1, 3), 800360be01SChun-Jie Chen FACTOR(CLK_TOP_APLL2_D4, "apll2_d4", "apll2", 1, 4), 810360be01SChun-Jie Chen FACTOR(CLK_TOP_APLL3_D4, "apll3_d4", "apll3", 1, 4), 820360be01SChun-Jie Chen FACTOR(CLK_TOP_APLL4_D4, "apll4_d4", "apll4", 1, 4), 830360be01SChun-Jie Chen FACTOR(CLK_TOP_APLL5_D4, "apll5_d4", "apll5", 1, 4), 840360be01SChun-Jie Chen FACTOR(CLK_TOP_HDMIRX_APLL_D3, "hdmirx_apll_d3", "hdmirx_apll", 1, 3), 850360be01SChun-Jie Chen FACTOR(CLK_TOP_HDMIRX_APLL_D4, "hdmirx_apll_d4", "hdmirx_apll", 1, 4), 860360be01SChun-Jie Chen FACTOR(CLK_TOP_HDMIRX_APLL_D6, "hdmirx_apll_d6", "hdmirx_apll", 1, 6), 870360be01SChun-Jie Chen FACTOR(CLK_TOP_MMPLL_D4, "mmpll_d4", "mmpll", 1, 4), 880360be01SChun-Jie Chen FACTOR(CLK_TOP_MMPLL_D4_D2, "mmpll_d4_d2", "mmpll_d4", 1, 2), 890360be01SChun-Jie Chen FACTOR(CLK_TOP_MMPLL_D4_D4, "mmpll_d4_d4", "mmpll_d4", 1, 4), 900360be01SChun-Jie Chen FACTOR(CLK_TOP_MMPLL_D5, "mmpll_d5", "mmpll", 1, 5), 910360be01SChun-Jie Chen FACTOR(CLK_TOP_MMPLL_D5_D2, "mmpll_d5_d2", "mmpll_d5", 1, 2), 920360be01SChun-Jie Chen FACTOR(CLK_TOP_MMPLL_D5_D4, "mmpll_d5_d4", "mmpll_d5", 1, 4), 930360be01SChun-Jie Chen FACTOR(CLK_TOP_MMPLL_D6, "mmpll_d6", "mmpll", 1, 6), 940360be01SChun-Jie Chen FACTOR(CLK_TOP_MMPLL_D6_D2, "mmpll_d6_d2", "mmpll_d6", 1, 2), 950360be01SChun-Jie Chen FACTOR(CLK_TOP_MMPLL_D7, "mmpll_d7", "mmpll", 1, 7), 960360be01SChun-Jie Chen FACTOR(CLK_TOP_MMPLL_D9, "mmpll_d9", "mmpll", 1, 9), 970360be01SChun-Jie Chen FACTOR(CLK_TOP_TVDPLL1_D2, "tvdpll1_d2", "tvdpll1", 1, 2), 980360be01SChun-Jie Chen FACTOR(CLK_TOP_TVDPLL1_D4, "tvdpll1_d4", "tvdpll1", 1, 4), 990360be01SChun-Jie Chen FACTOR(CLK_TOP_TVDPLL1_D8, "tvdpll1_d8", "tvdpll1", 1, 8), 1000360be01SChun-Jie Chen FACTOR(CLK_TOP_TVDPLL1_D16, "tvdpll1_d16", "tvdpll1", 1, 16), 1010360be01SChun-Jie Chen FACTOR(CLK_TOP_TVDPLL2_D2, "tvdpll2_d2", "tvdpll2", 1, 2), 1020360be01SChun-Jie Chen FACTOR(CLK_TOP_TVDPLL2_D4, "tvdpll2_d4", "tvdpll2", 1, 4), 1030360be01SChun-Jie Chen FACTOR(CLK_TOP_TVDPLL2_D8, "tvdpll2_d8", "tvdpll2", 1, 8), 1040360be01SChun-Jie Chen FACTOR(CLK_TOP_TVDPLL2_D16, "tvdpll2_d16", "tvdpll2", 1, 16), 1050360be01SChun-Jie Chen FACTOR(CLK_TOP_MSDCPLL_D2, "msdcpll_d2", "msdcpll", 1, 2), 1060360be01SChun-Jie Chen FACTOR(CLK_TOP_MSDCPLL_D4, "msdcpll_d4", "msdcpll", 1, 4), 1070360be01SChun-Jie Chen FACTOR(CLK_TOP_MSDCPLL_D16, "msdcpll_d16", "msdcpll", 1, 16), 1080360be01SChun-Jie Chen FACTOR(CLK_TOP_ETHPLL_D2, "ethpll_d2", "ethpll", 1, 2), 1090360be01SChun-Jie Chen FACTOR(CLK_TOP_ETHPLL_D8, "ethpll_d8", "ethpll", 1, 8), 1100360be01SChun-Jie Chen FACTOR(CLK_TOP_ETHPLL_D10, "ethpll_d10", "ethpll", 1, 10), 1110360be01SChun-Jie Chen FACTOR(CLK_TOP_DGIPLL_D2, "dgipll_d2", "dgipll", 1, 2), 1120360be01SChun-Jie Chen FACTOR(CLK_TOP_ULPOSC1_D2, "ulposc1_d2", "ulposc1", 1, 2), 1130360be01SChun-Jie Chen FACTOR(CLK_TOP_ULPOSC1_D4, "ulposc1_d4", "ulposc1", 1, 4), 1140360be01SChun-Jie Chen FACTOR(CLK_TOP_ULPOSC1_D7, "ulposc1_d7", "ulposc1", 1, 7), 1150360be01SChun-Jie Chen FACTOR(CLK_TOP_ULPOSC1_D8, "ulposc1_d8", "ulposc1", 1, 8), 1160360be01SChun-Jie Chen FACTOR(CLK_TOP_ULPOSC1_D10, "ulposc1_d10", "ulposc1", 1, 10), 1170360be01SChun-Jie Chen FACTOR(CLK_TOP_ULPOSC1_D16, "ulposc1_d16", "ulposc1", 1, 16), 1180360be01SChun-Jie Chen FACTOR(CLK_TOP_ADSPPLL_D2, "adsppll_d2", "adsppll", 1, 2), 1190360be01SChun-Jie Chen FACTOR(CLK_TOP_ADSPPLL_D4, "adsppll_d4", "adsppll", 1, 4), 1200360be01SChun-Jie Chen FACTOR(CLK_TOP_ADSPPLL_D8, "adsppll_d8", "adsppll", 1, 8), 1210360be01SChun-Jie Chen }; 1220360be01SChun-Jie Chen 1230360be01SChun-Jie Chen static const char * const axi_parents[] = { 1240360be01SChun-Jie Chen "clk26m", 1250360be01SChun-Jie Chen "mainpll_d4_d4", 1260360be01SChun-Jie Chen "mainpll_d7_d2", 1270360be01SChun-Jie Chen "mainpll_d4_d2", 1280360be01SChun-Jie Chen "mainpll_d5_d2", 1290360be01SChun-Jie Chen "mainpll_d6_d2", 1300360be01SChun-Jie Chen "ulposc1_d4" 1310360be01SChun-Jie Chen }; 1320360be01SChun-Jie Chen 1330360be01SChun-Jie Chen static const char * const spm_parents[] = { 1340360be01SChun-Jie Chen "clk26m", 1350360be01SChun-Jie Chen "ulposc1_d10", 1360360be01SChun-Jie Chen "mainpll_d7_d4", 1370360be01SChun-Jie Chen "clk32k" 1380360be01SChun-Jie Chen }; 1390360be01SChun-Jie Chen 1400360be01SChun-Jie Chen static const char * const scp_parents[] = { 1410360be01SChun-Jie Chen "clk26m", 1420360be01SChun-Jie Chen "univpll_d4", 1430360be01SChun-Jie Chen "mainpll_d6", 1440360be01SChun-Jie Chen "univpll_d6", 1450360be01SChun-Jie Chen "univpll_d4_d2", 1460360be01SChun-Jie Chen "mainpll_d4_d2", 1470360be01SChun-Jie Chen "mainpll_d4", 1480360be01SChun-Jie Chen "mainpll_d6_d2" 1490360be01SChun-Jie Chen }; 1500360be01SChun-Jie Chen 1510360be01SChun-Jie Chen static const char * const bus_aximem_parents[] = { 1520360be01SChun-Jie Chen "clk26m", 1530360be01SChun-Jie Chen "mainpll_d7_d2", 1540360be01SChun-Jie Chen "mainpll_d4_d2", 1550360be01SChun-Jie Chen "mainpll_d5_d2", 1560360be01SChun-Jie Chen "mainpll_d6" 1570360be01SChun-Jie Chen }; 1580360be01SChun-Jie Chen 1590360be01SChun-Jie Chen static const char * const vpp_parents[] = { 1600360be01SChun-Jie Chen "clk26m", 1610360be01SChun-Jie Chen "univpll_d6_d2", 1620360be01SChun-Jie Chen "mainpll_d5_d2", 1630360be01SChun-Jie Chen "mmpll_d6_d2", 1640360be01SChun-Jie Chen "univpll_d5_d2", 1650360be01SChun-Jie Chen "univpll_d4_d2", 1660360be01SChun-Jie Chen "mmpll_d4_d2", 1670360be01SChun-Jie Chen "mmpll_d7", 1680360be01SChun-Jie Chen "univpll_d6", 1690360be01SChun-Jie Chen "mainpll_d4", 1700360be01SChun-Jie Chen "mmpll_d5", 1710360be01SChun-Jie Chen "tvdpll1", 1720360be01SChun-Jie Chen "tvdpll2", 1730360be01SChun-Jie Chen "univpll_d4", 1740360be01SChun-Jie Chen "mmpll_d4" 1750360be01SChun-Jie Chen }; 1760360be01SChun-Jie Chen 1770360be01SChun-Jie Chen static const char * const ethdr_parents[] = { 1780360be01SChun-Jie Chen "clk26m", 1790360be01SChun-Jie Chen "univpll_d6_d2", 1800360be01SChun-Jie Chen "mainpll_d5_d2", 1810360be01SChun-Jie Chen "mmpll_d6_d2", 1820360be01SChun-Jie Chen "univpll_d5_d2", 1830360be01SChun-Jie Chen "univpll_d4_d2", 1840360be01SChun-Jie Chen "mmpll_d4_d2", 1850360be01SChun-Jie Chen "mmpll_d7", 1860360be01SChun-Jie Chen "univpll_d6", 1870360be01SChun-Jie Chen "mainpll_d4", 1880360be01SChun-Jie Chen "mmpll_d5_d4", 1890360be01SChun-Jie Chen "tvdpll1", 1900360be01SChun-Jie Chen "tvdpll2", 1910360be01SChun-Jie Chen "univpll_d4", 1920360be01SChun-Jie Chen "mmpll_d4" 1930360be01SChun-Jie Chen }; 1940360be01SChun-Jie Chen 1950360be01SChun-Jie Chen static const char * const ipe_parents[] = { 1960360be01SChun-Jie Chen "clk26m", 1970360be01SChun-Jie Chen "imgpll", 1980360be01SChun-Jie Chen "mainpll_d4", 1990360be01SChun-Jie Chen "mmpll_d6", 2000360be01SChun-Jie Chen "univpll_d6", 2010360be01SChun-Jie Chen "mainpll_d6", 2020360be01SChun-Jie Chen "mmpll_d4_d2", 2030360be01SChun-Jie Chen "univpll_d4_d2", 2040360be01SChun-Jie Chen "mainpll_d4_d2", 2050360be01SChun-Jie Chen "mmpll_d6_d2", 2060360be01SChun-Jie Chen "univpll_d5_d2" 2070360be01SChun-Jie Chen }; 2080360be01SChun-Jie Chen 2090360be01SChun-Jie Chen static const char * const cam_parents[] = { 2100360be01SChun-Jie Chen "clk26m", 2110360be01SChun-Jie Chen "mainpll_d4", 2120360be01SChun-Jie Chen "mmpll_d4", 2130360be01SChun-Jie Chen "univpll_d4", 2140360be01SChun-Jie Chen "univpll_d5", 2150360be01SChun-Jie Chen "univpll_d6", 2160360be01SChun-Jie Chen "mmpll_d7", 2170360be01SChun-Jie Chen "univpll_d4_d2", 2180360be01SChun-Jie Chen "mainpll_d4_d2", 2190360be01SChun-Jie Chen "imgpll" 2200360be01SChun-Jie Chen }; 2210360be01SChun-Jie Chen 2220360be01SChun-Jie Chen static const char * const ccu_parents[] = { 2230360be01SChun-Jie Chen "clk26m", 2240360be01SChun-Jie Chen "univpll_d6", 2250360be01SChun-Jie Chen "mainpll_d4_d2", 2260360be01SChun-Jie Chen "mainpll_d4", 2270360be01SChun-Jie Chen "univpll_d5", 2280360be01SChun-Jie Chen "mainpll_d6", 2290360be01SChun-Jie Chen "mmpll_d6", 2300360be01SChun-Jie Chen "mmpll_d7", 2310360be01SChun-Jie Chen "univpll_d4_d2", 2320360be01SChun-Jie Chen "univpll_d7" 2330360be01SChun-Jie Chen }; 2340360be01SChun-Jie Chen 2350360be01SChun-Jie Chen static const char * const img_parents[] = { 2360360be01SChun-Jie Chen "clk26m", 2370360be01SChun-Jie Chen "imgpll", 2380360be01SChun-Jie Chen "univpll_d4", 2390360be01SChun-Jie Chen "mainpll_d4", 2400360be01SChun-Jie Chen "univpll_d5", 2410360be01SChun-Jie Chen "mmpll_d6", 2420360be01SChun-Jie Chen "univpll_d6", 2430360be01SChun-Jie Chen "mainpll_d6", 2440360be01SChun-Jie Chen "mmpll_d4_d2", 2450360be01SChun-Jie Chen "univpll_d4_d2", 2460360be01SChun-Jie Chen "mainpll_d4_d2", 2470360be01SChun-Jie Chen "univpll_d5_d2" 2480360be01SChun-Jie Chen }; 2490360be01SChun-Jie Chen 2500360be01SChun-Jie Chen static const char * const camtm_parents[] = { 2510360be01SChun-Jie Chen "clk26m", 2520360be01SChun-Jie Chen "univpll_d4_d4", 2530360be01SChun-Jie Chen "univpll_d6_d2", 2540360be01SChun-Jie Chen "univpll_d6_d4" 2550360be01SChun-Jie Chen }; 2560360be01SChun-Jie Chen 2570360be01SChun-Jie Chen static const char * const dsp_parents[] = { 2580360be01SChun-Jie Chen "clk26m", 2590360be01SChun-Jie Chen "univpll_d6_d2", 2600360be01SChun-Jie Chen "univpll_d4_d2", 2610360be01SChun-Jie Chen "univpll_d5", 2620360be01SChun-Jie Chen "univpll_d4", 2630360be01SChun-Jie Chen "mmpll_d4", 2640360be01SChun-Jie Chen "mainpll_d3", 2650360be01SChun-Jie Chen "univpll_d3" 2660360be01SChun-Jie Chen }; 2670360be01SChun-Jie Chen 2680360be01SChun-Jie Chen static const char * const dsp1_parents[] = { 2690360be01SChun-Jie Chen "clk26m", 2700360be01SChun-Jie Chen "univpll_d6_d2", 2710360be01SChun-Jie Chen "mainpll_d4_d2", 2720360be01SChun-Jie Chen "univpll_d5", 2730360be01SChun-Jie Chen "mmpll_d5", 2740360be01SChun-Jie Chen "univpll_d4", 2750360be01SChun-Jie Chen "mainpll_d3", 2760360be01SChun-Jie Chen "univpll_d3" 2770360be01SChun-Jie Chen }; 2780360be01SChun-Jie Chen 2790360be01SChun-Jie Chen static const char * const dsp2_parents[] = { 2800360be01SChun-Jie Chen "clk26m", 2810360be01SChun-Jie Chen "univpll_d6_d2", 2820360be01SChun-Jie Chen "univpll_d4_d2", 2830360be01SChun-Jie Chen "mainpll_d4", 2840360be01SChun-Jie Chen "univpll_d4", 2850360be01SChun-Jie Chen "mmpll_d4", 2860360be01SChun-Jie Chen "mainpll_d3", 2870360be01SChun-Jie Chen "univpll_d3" 2880360be01SChun-Jie Chen }; 2890360be01SChun-Jie Chen 2900360be01SChun-Jie Chen static const char * const ipu_if_parents[] = { 2910360be01SChun-Jie Chen "clk26m", 2920360be01SChun-Jie Chen "univpll_d6_d2", 2930360be01SChun-Jie Chen "univpll_d5_d2", 2940360be01SChun-Jie Chen "mainpll_d4_d2", 2950360be01SChun-Jie Chen "mainpll_d6", 2960360be01SChun-Jie Chen "univpll_d5", 2970360be01SChun-Jie Chen "univpll_d4", 2980360be01SChun-Jie Chen "mmpll_d4" 2990360be01SChun-Jie Chen }; 3000360be01SChun-Jie Chen 30172d38ed7SAngeloGioacchino Del Regno /* 30272d38ed7SAngeloGioacchino Del Regno * MFG can be also parented to "univpll_d6" and "univpll_d7": 30372d38ed7SAngeloGioacchino Del Regno * these have been removed from the parents list to let us 30472d38ed7SAngeloGioacchino Del Regno * achieve GPU DVFS without any special clock handlers. 30572d38ed7SAngeloGioacchino Del Regno */ 3060360be01SChun-Jie Chen static const char * const mfg_parents[] = { 3070360be01SChun-Jie Chen "clk26m", 30872d38ed7SAngeloGioacchino Del Regno "mainpll_d5_d2" 3090360be01SChun-Jie Chen }; 3100360be01SChun-Jie Chen 3110360be01SChun-Jie Chen static const char * const camtg_parents[] = { 3120360be01SChun-Jie Chen "clk26m", 3130360be01SChun-Jie Chen "univpll_192m_d8", 3140360be01SChun-Jie Chen "univpll_d6_d8", 3150360be01SChun-Jie Chen "univpll_192m_d4", 3160360be01SChun-Jie Chen "univpll_d6_d16", 3170360be01SChun-Jie Chen "clk26m_d2", 3180360be01SChun-Jie Chen "univpll_192m_d16", 3190360be01SChun-Jie Chen "univpll_192m_d32" 3200360be01SChun-Jie Chen }; 3210360be01SChun-Jie Chen 3220360be01SChun-Jie Chen static const char * const uart_parents[] = { 3230360be01SChun-Jie Chen "clk26m", 3240360be01SChun-Jie Chen "univpll_d6_d8" 3250360be01SChun-Jie Chen }; 3260360be01SChun-Jie Chen 3270360be01SChun-Jie Chen static const char * const spi_parents[] = { 3280360be01SChun-Jie Chen "clk26m", 3290360be01SChun-Jie Chen "mainpll_d5_d4", 3300360be01SChun-Jie Chen "mainpll_d6_d4", 3310360be01SChun-Jie Chen "msdcpll_d4", 3320360be01SChun-Jie Chen "univpll_d6_d2", 3330360be01SChun-Jie Chen "mainpll_d6_d2", 3340360be01SChun-Jie Chen "mainpll_d4_d4", 3350360be01SChun-Jie Chen "univpll_d5_d4" 3360360be01SChun-Jie Chen }; 3370360be01SChun-Jie Chen 3380360be01SChun-Jie Chen static const char * const spis_parents[] = { 3390360be01SChun-Jie Chen "clk26m", 3400360be01SChun-Jie Chen "univpll_d6", 3410360be01SChun-Jie Chen "mainpll_d6", 3420360be01SChun-Jie Chen "univpll_d4_d2", 3430360be01SChun-Jie Chen "univpll_d6_d2", 3440360be01SChun-Jie Chen "univpll_d4_d4", 3450360be01SChun-Jie Chen "univpll_d6_d4", 3460360be01SChun-Jie Chen "mainpll_d7_d4" 3470360be01SChun-Jie Chen }; 3480360be01SChun-Jie Chen 3490360be01SChun-Jie Chen static const char * const msdc50_0_h_parents[] = { 3500360be01SChun-Jie Chen "clk26m", 3510360be01SChun-Jie Chen "mainpll_d4_d2", 3520360be01SChun-Jie Chen "mainpll_d6_d2" 3530360be01SChun-Jie Chen }; 3540360be01SChun-Jie Chen 3550360be01SChun-Jie Chen static const char * const msdc50_0_parents[] = { 3560360be01SChun-Jie Chen "clk26m", 3570360be01SChun-Jie Chen "msdcpll", 3580360be01SChun-Jie Chen "msdcpll_d2", 3590360be01SChun-Jie Chen "univpll_d4_d4", 3600360be01SChun-Jie Chen "mainpll_d6_d2", 3610360be01SChun-Jie Chen "univpll_d4_d2" 3620360be01SChun-Jie Chen }; 3630360be01SChun-Jie Chen 3640360be01SChun-Jie Chen static const char * const msdc30_parents[] = { 3650360be01SChun-Jie Chen "clk26m", 3660360be01SChun-Jie Chen "univpll_d6_d2", 3670360be01SChun-Jie Chen "mainpll_d6_d2", 3680360be01SChun-Jie Chen "mainpll_d7_d2", 3690360be01SChun-Jie Chen "msdcpll_d2" 3700360be01SChun-Jie Chen }; 3710360be01SChun-Jie Chen 3720360be01SChun-Jie Chen static const char * const intdir_parents[] = { 3730360be01SChun-Jie Chen "clk26m", 3740360be01SChun-Jie Chen "univpll_d6", 3750360be01SChun-Jie Chen "mainpll_d4", 3760360be01SChun-Jie Chen "univpll_d4" 3770360be01SChun-Jie Chen }; 3780360be01SChun-Jie Chen 3790360be01SChun-Jie Chen static const char * const aud_intbus_parents[] = { 3800360be01SChun-Jie Chen "clk26m", 3810360be01SChun-Jie Chen "mainpll_d4_d4", 3820360be01SChun-Jie Chen "mainpll_d7_d4" 3830360be01SChun-Jie Chen }; 3840360be01SChun-Jie Chen 3850360be01SChun-Jie Chen static const char * const audio_h_parents[] = { 3860360be01SChun-Jie Chen "clk26m", 3870360be01SChun-Jie Chen "univpll_d7", 3880360be01SChun-Jie Chen "apll1", 3890360be01SChun-Jie Chen "apll2" 3900360be01SChun-Jie Chen }; 3910360be01SChun-Jie Chen 3920360be01SChun-Jie Chen static const char * const pwrap_ulposc_parents[] = { 3930360be01SChun-Jie Chen "ulposc1_d10", 3940360be01SChun-Jie Chen "clk26m", 3950360be01SChun-Jie Chen "ulposc1_d4", 3960360be01SChun-Jie Chen "ulposc1_d7", 3970360be01SChun-Jie Chen "ulposc1_d8", 3980360be01SChun-Jie Chen "ulposc1_d16", 3990360be01SChun-Jie Chen "mainpll_d4_d8", 4000360be01SChun-Jie Chen "univpll_d5_d8" 4010360be01SChun-Jie Chen }; 4020360be01SChun-Jie Chen 4030360be01SChun-Jie Chen static const char * const atb_parents[] = { 4040360be01SChun-Jie Chen "clk26m", 4050360be01SChun-Jie Chen "mainpll_d4_d2", 4060360be01SChun-Jie Chen "mainpll_d5_d2" 4070360be01SChun-Jie Chen }; 4080360be01SChun-Jie Chen 4090360be01SChun-Jie Chen static const char * const pwrmcu_parents[] = { 4100360be01SChun-Jie Chen "clk26m", 4110360be01SChun-Jie Chen "mainpll_d7_d2", 4120360be01SChun-Jie Chen "mainpll_d6_d2", 4130360be01SChun-Jie Chen "mainpll_d5_d2", 4140360be01SChun-Jie Chen "mainpll_d9", 4150360be01SChun-Jie Chen "mainpll_d4_d2" 4160360be01SChun-Jie Chen }; 4170360be01SChun-Jie Chen 4180360be01SChun-Jie Chen static const char * const dp_parents[] = { 4190360be01SChun-Jie Chen "clk26m", 4200360be01SChun-Jie Chen "tvdpll1_d2", 4210360be01SChun-Jie Chen "tvdpll2_d2", 4220360be01SChun-Jie Chen "tvdpll1_d4", 4230360be01SChun-Jie Chen "tvdpll2_d4", 4240360be01SChun-Jie Chen "tvdpll1_d8", 4250360be01SChun-Jie Chen "tvdpll2_d8", 4260360be01SChun-Jie Chen "tvdpll1_d16", 4270360be01SChun-Jie Chen "tvdpll2_d16" 4280360be01SChun-Jie Chen }; 4290360be01SChun-Jie Chen 4300360be01SChun-Jie Chen static const char * const disp_pwm_parents[] = { 4310360be01SChun-Jie Chen "clk26m", 4320360be01SChun-Jie Chen "univpll_d6_d4", 4330360be01SChun-Jie Chen "ulposc1_d2", 4340360be01SChun-Jie Chen "ulposc1_d4", 4350360be01SChun-Jie Chen "ulposc1_d16" 4360360be01SChun-Jie Chen }; 4370360be01SChun-Jie Chen 4380360be01SChun-Jie Chen static const char * const usb_parents[] = { 4390360be01SChun-Jie Chen "clk26m", 4400360be01SChun-Jie Chen "univpll_d5_d4", 4410360be01SChun-Jie Chen "univpll_d6_d4", 4420360be01SChun-Jie Chen "univpll_d5_d2" 4430360be01SChun-Jie Chen }; 4440360be01SChun-Jie Chen 4450360be01SChun-Jie Chen static const char * const i2c_parents[] = { 4460360be01SChun-Jie Chen "clk26m", 4470360be01SChun-Jie Chen "mainpll_d4_d8", 4480360be01SChun-Jie Chen "univpll_d5_d4" 4490360be01SChun-Jie Chen }; 4500360be01SChun-Jie Chen 4510360be01SChun-Jie Chen static const char * const seninf_parents[] = { 4520360be01SChun-Jie Chen "clk26m", 4530360be01SChun-Jie Chen "univpll_d4_d4", 4540360be01SChun-Jie Chen "univpll_d6_d2", 4550360be01SChun-Jie Chen "univpll_d4_d2", 4560360be01SChun-Jie Chen "univpll_d7", 4570360be01SChun-Jie Chen "univpll_d6", 4580360be01SChun-Jie Chen "mmpll_d6", 4590360be01SChun-Jie Chen "univpll_d5" 4600360be01SChun-Jie Chen }; 4610360be01SChun-Jie Chen 4620360be01SChun-Jie Chen static const char * const gcpu_parents[] = { 4630360be01SChun-Jie Chen "clk26m", 4640360be01SChun-Jie Chen "mainpll_d6", 4650360be01SChun-Jie Chen "univpll_d4_d2", 4660360be01SChun-Jie Chen "mmpll_d5_d2", 4670360be01SChun-Jie Chen "univpll_d5_d2" 4680360be01SChun-Jie Chen }; 4690360be01SChun-Jie Chen 4700360be01SChun-Jie Chen static const char * const dxcc_parents[] = { 4710360be01SChun-Jie Chen "clk26m", 4720360be01SChun-Jie Chen "mainpll_d4_d2", 4730360be01SChun-Jie Chen "mainpll_d4_d4", 4740360be01SChun-Jie Chen "mainpll_d4_d8" 4750360be01SChun-Jie Chen }; 4760360be01SChun-Jie Chen 4770360be01SChun-Jie Chen static const char * const dpmaif_parents[] = { 4780360be01SChun-Jie Chen "clk26m", 4790360be01SChun-Jie Chen "univpll_d4_d4", 4800360be01SChun-Jie Chen "mainpll_d6", 4810360be01SChun-Jie Chen "mainpll_d4_d2", 4820360be01SChun-Jie Chen "univpll_d4_d2" 4830360be01SChun-Jie Chen }; 4840360be01SChun-Jie Chen 4850360be01SChun-Jie Chen static const char * const aes_fde_parents[] = { 4860360be01SChun-Jie Chen "clk26m", 4870360be01SChun-Jie Chen "mainpll_d4_d2", 4880360be01SChun-Jie Chen "mainpll_d6", 4890360be01SChun-Jie Chen "mainpll_d4_d4", 4900360be01SChun-Jie Chen "univpll_d4_d2", 4910360be01SChun-Jie Chen "univpll_d6" 4920360be01SChun-Jie Chen }; 4930360be01SChun-Jie Chen 4940360be01SChun-Jie Chen static const char * const ufs_parents[] = { 4950360be01SChun-Jie Chen "clk26m", 4960360be01SChun-Jie Chen "mainpll_d4_d4", 4970360be01SChun-Jie Chen "mainpll_d4_d8", 4980360be01SChun-Jie Chen "univpll_d4_d4", 4990360be01SChun-Jie Chen "mainpll_d6_d2", 5000360be01SChun-Jie Chen "univpll_d6_d2", 5010360be01SChun-Jie Chen "msdcpll_d2" 5020360be01SChun-Jie Chen }; 5030360be01SChun-Jie Chen 5040360be01SChun-Jie Chen static const char * const ufs_tick1us_parents[] = { 5050360be01SChun-Jie Chen "clk26m_d52", 5060360be01SChun-Jie Chen "clk26m" 5070360be01SChun-Jie Chen }; 5080360be01SChun-Jie Chen 5090360be01SChun-Jie Chen static const char * const ufs_mp_sap_parents[] = { 5100360be01SChun-Jie Chen "clk26m", 5110360be01SChun-Jie Chen "msdcpll_d16" 5120360be01SChun-Jie Chen }; 5130360be01SChun-Jie Chen 5140360be01SChun-Jie Chen static const char * const venc_parents[] = { 5150360be01SChun-Jie Chen "clk26m", 5160360be01SChun-Jie Chen "mmpll_d4_d2", 5170360be01SChun-Jie Chen "mainpll_d6", 5180360be01SChun-Jie Chen "univpll_d4_d2", 5190360be01SChun-Jie Chen "mainpll_d4_d2", 5200360be01SChun-Jie Chen "univpll_d6", 5210360be01SChun-Jie Chen "mmpll_d6", 5220360be01SChun-Jie Chen "mainpll_d5_d2", 5230360be01SChun-Jie Chen "mainpll_d6_d2", 5240360be01SChun-Jie Chen "mmpll_d9", 5250360be01SChun-Jie Chen "univpll_d4_d4", 5260360be01SChun-Jie Chen "mainpll_d4", 5270360be01SChun-Jie Chen "univpll_d4", 5280360be01SChun-Jie Chen "univpll_d5", 5290360be01SChun-Jie Chen "univpll_d5_d2", 5300360be01SChun-Jie Chen "mainpll_d5" 5310360be01SChun-Jie Chen }; 5320360be01SChun-Jie Chen 5330360be01SChun-Jie Chen static const char * const vdec_parents[] = { 5340360be01SChun-Jie Chen "clk26m", 5350360be01SChun-Jie Chen "mainpll_d5_d2", 5360360be01SChun-Jie Chen "mmpll_d6_d2", 5370360be01SChun-Jie Chen "univpll_d4_d2", 5380360be01SChun-Jie Chen "mmpll_d4_d2", 5390360be01SChun-Jie Chen "mainpll_d5", 5400360be01SChun-Jie Chen "mmpll_d6", 5410360be01SChun-Jie Chen "mmpll_d5", 5420360be01SChun-Jie Chen "vdecpll", 5430360be01SChun-Jie Chen "univpll_d4", 5440360be01SChun-Jie Chen "mmpll_d4", 5450360be01SChun-Jie Chen "univpll_d6_d2", 5460360be01SChun-Jie Chen "mmpll_d9", 5470360be01SChun-Jie Chen "univpll_d6", 5480360be01SChun-Jie Chen "univpll_d5", 5490360be01SChun-Jie Chen "mainpll_d4" 5500360be01SChun-Jie Chen }; 5510360be01SChun-Jie Chen 5520360be01SChun-Jie Chen static const char * const pwm_parents[] = { 5530360be01SChun-Jie Chen "clk26m", 5540360be01SChun-Jie Chen "univpll_d4_d8" 5550360be01SChun-Jie Chen }; 5560360be01SChun-Jie Chen 5570360be01SChun-Jie Chen static const char * const mcupm_parents[] = { 5580360be01SChun-Jie Chen "clk26m", 5590360be01SChun-Jie Chen "mainpll_d6_d2", 5600360be01SChun-Jie Chen "mainpll_d7_d4", 5610360be01SChun-Jie Chen }; 5620360be01SChun-Jie Chen 5630360be01SChun-Jie Chen static const char * const spmi_parents[] = { 5640360be01SChun-Jie Chen "clk26m", 5650360be01SChun-Jie Chen "clk26m_d2", 5660360be01SChun-Jie Chen "ulposc1_d8", 5670360be01SChun-Jie Chen "ulposc1_d10", 5680360be01SChun-Jie Chen "ulposc1_d16", 5690360be01SChun-Jie Chen "ulposc1_d7", 5700360be01SChun-Jie Chen "clk32k", 5710360be01SChun-Jie Chen "mainpll_d7_d8", 5720360be01SChun-Jie Chen "mainpll_d6_d8", 5730360be01SChun-Jie Chen "mainpll_d5_d8" 5740360be01SChun-Jie Chen }; 5750360be01SChun-Jie Chen 5760360be01SChun-Jie Chen static const char * const dvfsrc_parents[] = { 5770360be01SChun-Jie Chen "clk26m", 5780360be01SChun-Jie Chen "ulposc1_d10", 5790360be01SChun-Jie Chen "univpll_d6_d8", 5800360be01SChun-Jie Chen "msdcpll_d16" 5810360be01SChun-Jie Chen }; 5820360be01SChun-Jie Chen 5830360be01SChun-Jie Chen static const char * const tl_parents[] = { 5840360be01SChun-Jie Chen "clk26m", 5850360be01SChun-Jie Chen "univpll_d5_d4", 5860360be01SChun-Jie Chen "mainpll_d4_d4" 5870360be01SChun-Jie Chen }; 5880360be01SChun-Jie Chen 5890360be01SChun-Jie Chen static const char * const dsi_occ_parents[] = { 5900360be01SChun-Jie Chen "clk26m", 5910360be01SChun-Jie Chen "mainpll_d6_d2", 5920360be01SChun-Jie Chen "univpll_d5_d2", 5930360be01SChun-Jie Chen "univpll_d4_d2" 5940360be01SChun-Jie Chen }; 5950360be01SChun-Jie Chen 5960360be01SChun-Jie Chen static const char * const wpe_vpp_parents[] = { 5970360be01SChun-Jie Chen "clk26m", 5980360be01SChun-Jie Chen "mainpll_d5_d2", 5990360be01SChun-Jie Chen "mmpll_d6_d2", 6000360be01SChun-Jie Chen "univpll_d5_d2", 6010360be01SChun-Jie Chen "mainpll_d4_d2", 6020360be01SChun-Jie Chen "univpll_d4_d2", 6030360be01SChun-Jie Chen "mmpll_d4_d2", 6040360be01SChun-Jie Chen "mainpll_d6", 6050360be01SChun-Jie Chen "mmpll_d7", 6060360be01SChun-Jie Chen "univpll_d6", 6070360be01SChun-Jie Chen "mainpll_d5", 6080360be01SChun-Jie Chen "univpll_d5", 6090360be01SChun-Jie Chen "mainpll_d4", 6100360be01SChun-Jie Chen "tvdpll1", 6110360be01SChun-Jie Chen "univpll_d4" 6120360be01SChun-Jie Chen }; 6130360be01SChun-Jie Chen 6140360be01SChun-Jie Chen static const char * const hdcp_parents[] = { 6150360be01SChun-Jie Chen "clk26m", 6160360be01SChun-Jie Chen "univpll_d4_d8", 6170360be01SChun-Jie Chen "mainpll_d5_d8", 6180360be01SChun-Jie Chen "univpll_d6_d4" 6190360be01SChun-Jie Chen }; 6200360be01SChun-Jie Chen 6210360be01SChun-Jie Chen static const char * const hdcp_24m_parents[] = { 6220360be01SChun-Jie Chen "clk26m", 6230360be01SChun-Jie Chen "univpll_192m_d4", 6240360be01SChun-Jie Chen "univpll_192m_d8", 6250360be01SChun-Jie Chen "univpll_d6_d8" 6260360be01SChun-Jie Chen }; 6270360be01SChun-Jie Chen 6280360be01SChun-Jie Chen static const char * const hd20_dacr_ref_parents[] = { 6290360be01SChun-Jie Chen "clk26m", 6300360be01SChun-Jie Chen "univpll_d4_d2", 6310360be01SChun-Jie Chen "univpll_d4_d4", 6320360be01SChun-Jie Chen "univpll_d4_d8" 6330360be01SChun-Jie Chen }; 6340360be01SChun-Jie Chen 6350360be01SChun-Jie Chen static const char * const hd20_hdcp_c_parents[] = { 6360360be01SChun-Jie Chen "clk26m", 6370360be01SChun-Jie Chen "msdcpll_d4", 6380360be01SChun-Jie Chen "univpll_d4_d8", 6390360be01SChun-Jie Chen "univpll_d6_d8" 6400360be01SChun-Jie Chen }; 6410360be01SChun-Jie Chen 6420360be01SChun-Jie Chen static const char * const hdmi_xtal_parents[] = { 6430360be01SChun-Jie Chen "clk26m", 6440360be01SChun-Jie Chen "clk26m_d2" 6450360be01SChun-Jie Chen }; 6460360be01SChun-Jie Chen 6470360be01SChun-Jie Chen static const char * const hdmi_apb_parents[] = { 6480360be01SChun-Jie Chen "clk26m", 6490360be01SChun-Jie Chen "univpll_d6_d4", 6500360be01SChun-Jie Chen "msdcpll_d2" 6510360be01SChun-Jie Chen }; 6520360be01SChun-Jie Chen 6530360be01SChun-Jie Chen static const char * const snps_eth_250m_parents[] = { 6540360be01SChun-Jie Chen "clk26m", 6550360be01SChun-Jie Chen "ethpll_d2" 6560360be01SChun-Jie Chen }; 6570360be01SChun-Jie Chen 6580360be01SChun-Jie Chen static const char * const snps_eth_62p4m_ptp_parents[] = { 6590360be01SChun-Jie Chen "apll2_d3", 6600360be01SChun-Jie Chen "apll1_d3", 6610360be01SChun-Jie Chen "clk26m", 6620360be01SChun-Jie Chen "ethpll_d8" 6630360be01SChun-Jie Chen }; 6640360be01SChun-Jie Chen 6650360be01SChun-Jie Chen static const char * const snps_eth_50m_rmii_parents[] = { 6660360be01SChun-Jie Chen "clk26m", 6670360be01SChun-Jie Chen "ethpll_d10" 6680360be01SChun-Jie Chen }; 6690360be01SChun-Jie Chen 6700360be01SChun-Jie Chen static const char * const dgi_out_parents[] = { 6710360be01SChun-Jie Chen "clk26m", 6720360be01SChun-Jie Chen "dgipll", 6730360be01SChun-Jie Chen "dgipll_d2", 6740360be01SChun-Jie Chen "in_dgi", 6750360be01SChun-Jie Chen "in_dgi_d2", 6760360be01SChun-Jie Chen "mmpll_d4_d4" 6770360be01SChun-Jie Chen }; 6780360be01SChun-Jie Chen 6790360be01SChun-Jie Chen static const char * const nna_parents[] = { 6800360be01SChun-Jie Chen "clk26m", 6810360be01SChun-Jie Chen "nnapll", 6820360be01SChun-Jie Chen "univpll_d4", 6830360be01SChun-Jie Chen "mainpll_d4", 6840360be01SChun-Jie Chen "univpll_d5", 6850360be01SChun-Jie Chen "mmpll_d6", 6860360be01SChun-Jie Chen "univpll_d6", 6870360be01SChun-Jie Chen "mainpll_d6", 6880360be01SChun-Jie Chen "mmpll_d4_d2", 6890360be01SChun-Jie Chen "univpll_d4_d2", 6900360be01SChun-Jie Chen "mainpll_d4_d2", 6910360be01SChun-Jie Chen "mmpll_d6_d2" 6920360be01SChun-Jie Chen }; 6930360be01SChun-Jie Chen 6940360be01SChun-Jie Chen static const char * const adsp_parents[] = { 6950360be01SChun-Jie Chen "clk26m", 6960360be01SChun-Jie Chen "clk26m_d2", 6970360be01SChun-Jie Chen "mainpll_d6", 6980360be01SChun-Jie Chen "mainpll_d5_d2", 6990360be01SChun-Jie Chen "univpll_d4_d4", 7000360be01SChun-Jie Chen "univpll_d4", 7010360be01SChun-Jie Chen "univpll_d6", 7020360be01SChun-Jie Chen "ulposc1", 7030360be01SChun-Jie Chen "adsppll", 7040360be01SChun-Jie Chen "adsppll_d2", 7050360be01SChun-Jie Chen "adsppll_d4", 7060360be01SChun-Jie Chen "adsppll_d8" 7070360be01SChun-Jie Chen }; 7080360be01SChun-Jie Chen 7090360be01SChun-Jie Chen static const char * const asm_parents[] = { 7100360be01SChun-Jie Chen "clk26m", 7110360be01SChun-Jie Chen "univpll_d6_d4", 7120360be01SChun-Jie Chen "univpll_d6_d2", 7130360be01SChun-Jie Chen "mainpll_d5_d2" 7140360be01SChun-Jie Chen }; 7150360be01SChun-Jie Chen 7160360be01SChun-Jie Chen static const char * const apll1_parents[] = { 7170360be01SChun-Jie Chen "clk26m", 7180360be01SChun-Jie Chen "apll1_d4" 7190360be01SChun-Jie Chen }; 7200360be01SChun-Jie Chen 7210360be01SChun-Jie Chen static const char * const apll2_parents[] = { 7220360be01SChun-Jie Chen "clk26m", 7230360be01SChun-Jie Chen "apll2_d4" 7240360be01SChun-Jie Chen }; 7250360be01SChun-Jie Chen 7260360be01SChun-Jie Chen static const char * const apll3_parents[] = { 7270360be01SChun-Jie Chen "clk26m", 7280360be01SChun-Jie Chen "apll3_d4" 7290360be01SChun-Jie Chen }; 7300360be01SChun-Jie Chen 7310360be01SChun-Jie Chen static const char * const apll4_parents[] = { 7320360be01SChun-Jie Chen "clk26m", 7330360be01SChun-Jie Chen "apll4_d4" 7340360be01SChun-Jie Chen }; 7350360be01SChun-Jie Chen 7360360be01SChun-Jie Chen static const char * const apll5_parents[] = { 7370360be01SChun-Jie Chen "clk26m", 7380360be01SChun-Jie Chen "apll5_d4" 7390360be01SChun-Jie Chen }; 7400360be01SChun-Jie Chen 7410360be01SChun-Jie Chen static const char * const i2s_parents[] = { 7420360be01SChun-Jie Chen "clk26m", 7430360be01SChun-Jie Chen "apll1", 7440360be01SChun-Jie Chen "apll2", 7450360be01SChun-Jie Chen "apll3", 7460360be01SChun-Jie Chen "apll4", 7470360be01SChun-Jie Chen "apll5", 7480360be01SChun-Jie Chen "hdmirx_apll" 7490360be01SChun-Jie Chen }; 7500360be01SChun-Jie Chen 7510360be01SChun-Jie Chen static const char * const a1sys_hp_parents[] = { 7520360be01SChun-Jie Chen "clk26m", 7530360be01SChun-Jie Chen "apll1_d4" 7540360be01SChun-Jie Chen }; 7550360be01SChun-Jie Chen 7560360be01SChun-Jie Chen static const char * const a2sys_parents[] = { 7570360be01SChun-Jie Chen "clk26m", 7580360be01SChun-Jie Chen "apll2_d4" 7590360be01SChun-Jie Chen }; 7600360be01SChun-Jie Chen 7610360be01SChun-Jie Chen static const char * const a3sys_parents[] = { 7620360be01SChun-Jie Chen "clk26m", 7630360be01SChun-Jie Chen "apll3_d4", 7640360be01SChun-Jie Chen "apll4_d4", 7650360be01SChun-Jie Chen "apll5_d4", 7660360be01SChun-Jie Chen "hdmirx_apll_d3", 7670360be01SChun-Jie Chen "hdmirx_apll_d4", 7680360be01SChun-Jie Chen "hdmirx_apll_d6" 7690360be01SChun-Jie Chen }; 7700360be01SChun-Jie Chen 7710360be01SChun-Jie Chen static const char * const spinfi_b_parents[] = { 7720360be01SChun-Jie Chen "clk26m", 7730360be01SChun-Jie Chen "univpll_d6_d8", 7740360be01SChun-Jie Chen "univpll_d5_d8", 7750360be01SChun-Jie Chen "mainpll_d4_d8", 7760360be01SChun-Jie Chen "mainpll_d7_d4", 7770360be01SChun-Jie Chen "mainpll_d6_d4", 7780360be01SChun-Jie Chen "univpll_d6_d4", 7790360be01SChun-Jie Chen "univpll_d5_d4" 7800360be01SChun-Jie Chen }; 7810360be01SChun-Jie Chen 7820360be01SChun-Jie Chen static const char * const nfi1x_parents[] = { 7830360be01SChun-Jie Chen "clk26m", 7840360be01SChun-Jie Chen "univpll_d5_d4", 7850360be01SChun-Jie Chen "mainpll_d7_d4", 7860360be01SChun-Jie Chen "mainpll_d6_d4", 7870360be01SChun-Jie Chen "univpll_d6_d4", 7880360be01SChun-Jie Chen "mainpll_d4_d4", 7890360be01SChun-Jie Chen "mainpll_d7_d2", 7900360be01SChun-Jie Chen "mainpll_d6_d2" 7910360be01SChun-Jie Chen }; 7920360be01SChun-Jie Chen 7930360be01SChun-Jie Chen static const char * const ecc_parents[] = { 7940360be01SChun-Jie Chen "clk26m", 7950360be01SChun-Jie Chen "mainpll_d4_d4", 7960360be01SChun-Jie Chen "mainpll_d5_d2", 7970360be01SChun-Jie Chen "mainpll_d4_d2", 7980360be01SChun-Jie Chen "mainpll_d6", 7990360be01SChun-Jie Chen "univpll_d6" 8000360be01SChun-Jie Chen }; 8010360be01SChun-Jie Chen 8020360be01SChun-Jie Chen static const char * const audio_local_bus_parents[] = { 8030360be01SChun-Jie Chen "clk26m", 8040360be01SChun-Jie Chen "clk26m_d2", 8050360be01SChun-Jie Chen "mainpll_d4_d4", 8060360be01SChun-Jie Chen "mainpll_d7_d2", 8070360be01SChun-Jie Chen "mainpll_d4_d2", 8080360be01SChun-Jie Chen "mainpll_d5_d2", 8090360be01SChun-Jie Chen "mainpll_d6_d2", 8100360be01SChun-Jie Chen "mainpll_d7", 8110360be01SChun-Jie Chen "univpll_d6", 8120360be01SChun-Jie Chen "ulposc1", 8130360be01SChun-Jie Chen "ulposc1_d4", 8140360be01SChun-Jie Chen "ulposc1_d2" 8150360be01SChun-Jie Chen }; 8160360be01SChun-Jie Chen 8170360be01SChun-Jie Chen static const char * const spinor_parents[] = { 8180360be01SChun-Jie Chen "clk26m", 8190360be01SChun-Jie Chen "clk26m_d2", 8200360be01SChun-Jie Chen "mainpll_d7_d8", 8210360be01SChun-Jie Chen "univpll_d6_d8" 8220360be01SChun-Jie Chen }; 8230360be01SChun-Jie Chen 8240360be01SChun-Jie Chen static const char * const dvio_dgi_ref_parents[] = { 8250360be01SChun-Jie Chen "clk26m", 8260360be01SChun-Jie Chen "in_dgi", 8270360be01SChun-Jie Chen "in_dgi_d2", 8280360be01SChun-Jie Chen "in_dgi_d4", 8290360be01SChun-Jie Chen "in_dgi_d6", 8300360be01SChun-Jie Chen "in_dgi_d8", 8310360be01SChun-Jie Chen "mmpll_d4_d4" 8320360be01SChun-Jie Chen }; 8330360be01SChun-Jie Chen 8340360be01SChun-Jie Chen static const char * const ulposc_parents[] = { 8350360be01SChun-Jie Chen "ulposc1", 8360360be01SChun-Jie Chen "ethpll_d2", 8370360be01SChun-Jie Chen "mainpll_d4_d2", 8380360be01SChun-Jie Chen "ethpll_d10" 8390360be01SChun-Jie Chen }; 8400360be01SChun-Jie Chen 8410360be01SChun-Jie Chen static const char * const ulposc_core_parents[] = { 8420360be01SChun-Jie Chen "ulposc2", 8430360be01SChun-Jie Chen "univpll_d7", 8440360be01SChun-Jie Chen "mainpll_d6", 8450360be01SChun-Jie Chen "ethpll_d10" 8460360be01SChun-Jie Chen }; 8470360be01SChun-Jie Chen 8480360be01SChun-Jie Chen static const char * const srck_parents[] = { 8490360be01SChun-Jie Chen "ulposc1_d10", 8500360be01SChun-Jie Chen "clk26m" 8510360be01SChun-Jie Chen }; 8520360be01SChun-Jie Chen 8530360be01SChun-Jie Chen static const char * const mfg_fast_parents[] = { 8540360be01SChun-Jie Chen "top_mfg_core_tmp", 8550360be01SChun-Jie Chen "mfgpll" 8560360be01SChun-Jie Chen }; 8570360be01SChun-Jie Chen 8580360be01SChun-Jie Chen static const struct mtk_mux top_mtk_muxes[] = { 8590360be01SChun-Jie Chen /* 8600360be01SChun-Jie Chen * CLK_CFG_0 8610360be01SChun-Jie Chen * top_axi and top_bus_aximem are bus clocks, should not be closed by Linux. 8620360be01SChun-Jie Chen * top_spm and top_scp are main clocks in always-on co-processor. 8630360be01SChun-Jie Chen */ 8640360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_AXI, "top_axi", 8650360be01SChun-Jie Chen axi_parents, 0x020, 0x024, 0x028, 0, 3, 7, 0x04, 0, CLK_IS_CRITICAL), 8660360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_SPM, "top_spm", 8670360be01SChun-Jie Chen spm_parents, 0x020, 0x024, 0x028, 8, 2, 15, 0x04, 1, CLK_IS_CRITICAL), 8680360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_SCP, "top_scp", 8690360be01SChun-Jie Chen scp_parents, 0x020, 0x024, 0x028, 16, 3, 23, 0x04, 2, CLK_IS_CRITICAL), 8700360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_BUS_AXIMEM, "top_bus_aximem", 8710360be01SChun-Jie Chen bus_aximem_parents, 0x020, 0x024, 0x028, 24, 3, 31, 0x04, 3, CLK_IS_CRITICAL), 8720360be01SChun-Jie Chen /* CLK_CFG_1 */ 8730360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_VPP, "top_vpp", 8740360be01SChun-Jie Chen vpp_parents, 0x02C, 0x030, 0x034, 0, 4, 7, 0x04, 4), 8750360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_ETHDR, "top_ethdr", 8760360be01SChun-Jie Chen ethdr_parents, 0x02C, 0x030, 0x034, 8, 4, 15, 0x04, 5), 8770360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_IPE, "top_ipe", 8780360be01SChun-Jie Chen ipe_parents, 0x02C, 0x030, 0x034, 16, 4, 23, 0x04, 6), 8790360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_CAM, "top_cam", 8800360be01SChun-Jie Chen cam_parents, 0x02C, 0x030, 0x034, 24, 4, 31, 0x04, 7), 8810360be01SChun-Jie Chen /* CLK_CFG_2 */ 8820360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_CCU, "top_ccu", 8830360be01SChun-Jie Chen ccu_parents, 0x038, 0x03C, 0x040, 0, 4, 7, 0x04, 8), 8840360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_IMG, "top_img", 8850360be01SChun-Jie Chen img_parents, 0x038, 0x03C, 0x040, 8, 4, 15, 0x04, 9), 8860360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_CAMTM, "top_camtm", 8870360be01SChun-Jie Chen camtm_parents, 0x038, 0x03C, 0x040, 16, 2, 23, 0x04, 10), 8880360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_DSP, "top_dsp", 8890360be01SChun-Jie Chen dsp_parents, 0x038, 0x03C, 0x040, 24, 3, 31, 0x04, 11), 8900360be01SChun-Jie Chen /* CLK_CFG_3 */ 8910360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_DSP1, "top_dsp1", 8920360be01SChun-Jie Chen dsp1_parents, 0x044, 0x048, 0x04C, 0, 3, 7, 0x04, 12), 8930360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_DSP2, "top_dsp2", 8940360be01SChun-Jie Chen dsp1_parents, 0x044, 0x048, 0x04C, 8, 3, 15, 0x04, 13), 8950360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_DSP3, "top_dsp3", 8960360be01SChun-Jie Chen dsp1_parents, 0x044, 0x048, 0x04C, 16, 3, 23, 0x04, 14), 8970360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_DSP4, "top_dsp4", 8980360be01SChun-Jie Chen dsp2_parents, 0x044, 0x048, 0x04C, 24, 3, 31, 0x04, 15), 8990360be01SChun-Jie Chen /* CLK_CFG_4 */ 9000360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_DSP5, "top_dsp5", 9010360be01SChun-Jie Chen dsp2_parents, 0x050, 0x054, 0x058, 0, 3, 7, 0x04, 16), 9020360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_DSP6, "top_dsp6", 9030360be01SChun-Jie Chen dsp2_parents, 0x050, 0x054, 0x058, 8, 3, 15, 0x04, 17), 9040360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_DSP7, "top_dsp7", 9050360be01SChun-Jie Chen dsp_parents, 0x050, 0x054, 0x058, 16, 3, 23, 0x04, 18), 9060360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_IPU_IF, "top_ipu_if", 9070360be01SChun-Jie Chen ipu_if_parents, 0x050, 0x054, 0x058, 24, 3, 31, 0x04, 19), 9080360be01SChun-Jie Chen /* CLK_CFG_5 */ 9090360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_MFG_CORE_TMP, "top_mfg_core_tmp", 9100360be01SChun-Jie Chen mfg_parents, 0x05C, 0x060, 0x064, 0, 2, 7, 0x04, 20), 9110360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_CAMTG, "top_camtg", 9120360be01SChun-Jie Chen camtg_parents, 0x05C, 0x060, 0x064, 8, 3, 15, 0x04, 21), 9130360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_CAMTG2, "top_camtg2", 9140360be01SChun-Jie Chen camtg_parents, 0x05C, 0x060, 0x064, 16, 3, 23, 0x04, 22), 9150360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_CAMTG3, "top_camtg3", 9160360be01SChun-Jie Chen camtg_parents, 0x05C, 0x060, 0x064, 24, 3, 31, 0x04, 23), 9170360be01SChun-Jie Chen /* CLK_CFG_6 */ 9180360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_CAMTG4, "top_camtg4", 9190360be01SChun-Jie Chen camtg_parents, 0x068, 0x06C, 0x070, 0, 3, 7, 0x04, 24), 9200360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_CAMTG5, "top_camtg5", 9210360be01SChun-Jie Chen camtg_parents, 0x068, 0x06C, 0x070, 8, 3, 15, 0x04, 25), 9220360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_UART, "top_uart", 9230360be01SChun-Jie Chen uart_parents, 0x068, 0x06C, 0x070, 16, 1, 23, 0x04, 26), 9240360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_SPI, "top_spi", 9250360be01SChun-Jie Chen spi_parents, 0x068, 0x06C, 0x070, 24, 3, 31, 0x04, 27), 9260360be01SChun-Jie Chen /* CLK_CFG_7 */ 9270360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_SPIS, "top_spis", 9280360be01SChun-Jie Chen spis_parents, 0x074, 0x078, 0x07C, 0, 3, 7, 0x04, 28), 9290360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_MSDC50_0_HCLK, "top_msdc50_0_hclk", 9300360be01SChun-Jie Chen msdc50_0_h_parents, 0x074, 0x078, 0x07C, 8, 2, 15, 0x04, 29), 9310360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_MSDC50_0, "top_msdc50_0", 9320360be01SChun-Jie Chen msdc50_0_parents, 0x074, 0x078, 0x07C, 16, 3, 23, 0x04, 30), 9330360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_MSDC30_1, "top_msdc30_1", 9340360be01SChun-Jie Chen msdc30_parents, 0x074, 0x078, 0x07C, 24, 3, 31, 0x04, 31), 9350360be01SChun-Jie Chen /* CLK_CFG_8 */ 9360360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_MSDC30_2, "top_msdc30_2", 9370360be01SChun-Jie Chen msdc30_parents, 0x080, 0x084, 0x088, 0, 3, 7, 0x08, 0), 9380360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_INTDIR, "top_intdir", 9390360be01SChun-Jie Chen intdir_parents, 0x080, 0x084, 0x088, 8, 2, 15, 0x08, 1), 9400360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_INTBUS, "top_aud_intbus", 9410360be01SChun-Jie Chen aud_intbus_parents, 0x080, 0x084, 0x088, 16, 2, 23, 0x08, 2), 9420360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_AUDIO_H, "top_audio_h", 9430360be01SChun-Jie Chen audio_h_parents, 0x080, 0x084, 0x088, 24, 2, 31, 0x08, 3), 9440360be01SChun-Jie Chen /* 9450360be01SChun-Jie Chen * CLK_CFG_9 9460360be01SChun-Jie Chen * top_pwrmcu is main clock in other co-processor, should not be 9470360be01SChun-Jie Chen * handled by Linux. 9480360be01SChun-Jie Chen */ 9490360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_PWRAP_ULPOSC, "top_pwrap_ulposc", 9500360be01SChun-Jie Chen pwrap_ulposc_parents, 0x08C, 0x090, 0x094, 0, 3, 7, 0x08, 4), 9510360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_ATB, "top_atb", 9520360be01SChun-Jie Chen atb_parents, 0x08C, 0x090, 0x094, 8, 2, 15, 0x08, 5), 9530360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_PWRMCU, "top_pwrmcu", 9540360be01SChun-Jie Chen pwrmcu_parents, 0x08C, 0x090, 0x094, 16, 3, 23, 0x08, 6, CLK_IS_CRITICAL), 9550360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_DP, "top_dp", 9560360be01SChun-Jie Chen dp_parents, 0x08C, 0x090, 0x094, 24, 4, 31, 0x08, 7), 9570360be01SChun-Jie Chen /* CLK_CFG_10 */ 9580360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_EDP, "top_edp", 9590360be01SChun-Jie Chen dp_parents, 0x098, 0x09C, 0x0A0, 0, 4, 7, 0x08, 8), 9600360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_DPI, "top_dpi", 9610360be01SChun-Jie Chen dp_parents, 0x098, 0x09C, 0x0A0, 8, 4, 15, 0x08, 9), 9620360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_DISP_PWM0, "top_disp_pwm0", 9630360be01SChun-Jie Chen disp_pwm_parents, 0x098, 0x09C, 0x0A0, 16, 3, 23, 0x08, 10), 9640360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_DISP_PWM1, "top_disp_pwm1", 9650360be01SChun-Jie Chen disp_pwm_parents, 0x098, 0x09C, 0x0A0, 24, 3, 31, 0x08, 11), 9660360be01SChun-Jie Chen /* CLK_CFG_11 */ 9670360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_USB_TOP, "top_usb_top", 9680360be01SChun-Jie Chen usb_parents, 0x0A4, 0x0A8, 0x0AC, 0, 2, 7, 0x08, 12), 9690360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_SSUSB_XHCI, "top_ssusb_xhci", 9700360be01SChun-Jie Chen usb_parents, 0x0A4, 0x0A8, 0x0AC, 8, 2, 15, 0x08, 13), 9710360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_USB_TOP_1P, "top_usb_top_1p", 9720360be01SChun-Jie Chen usb_parents, 0x0A4, 0x0A8, 0x0AC, 16, 2, 23, 0x08, 14), 9730360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_SSUSB_XHCI_1P, "top_ssusb_xhci_1p", 9740360be01SChun-Jie Chen usb_parents, 0x0A4, 0x0A8, 0x0AC, 24, 2, 31, 0x08, 15), 9750360be01SChun-Jie Chen /* CLK_CFG_12 */ 9760360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_USB_TOP_2P, "top_usb_top_2p", 9770360be01SChun-Jie Chen usb_parents, 0x0B0, 0x0B4, 0x0B8, 0, 2, 7, 0x08, 16), 9780360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_SSUSB_XHCI_2P, "top_ssusb_xhci_2p", 9790360be01SChun-Jie Chen usb_parents, 0x0B0, 0x0B4, 0x0B8, 8, 2, 15, 0x08, 17), 9800360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_USB_TOP_3P, "top_usb_top_3p", 9810360be01SChun-Jie Chen usb_parents, 0x0B0, 0x0B4, 0x0B8, 16, 2, 23, 0x08, 18), 9820360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_SSUSB_XHCI_3P, "top_ssusb_xhci_3p", 9830360be01SChun-Jie Chen usb_parents, 0x0B0, 0x0B4, 0x0B8, 24, 2, 31, 0x08, 19), 9840360be01SChun-Jie Chen /* CLK_CFG_13 */ 9850360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_I2C, "top_i2c", 9860360be01SChun-Jie Chen i2c_parents, 0x0BC, 0x0C0, 0x0C4, 0, 2, 7, 0x08, 20), 9870360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF, "top_seninf", 9880360be01SChun-Jie Chen seninf_parents, 0x0BC, 0x0C0, 0x0C4, 8, 3, 15, 0x08, 21), 9890360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF1, "top_seninf1", 9900360be01SChun-Jie Chen seninf_parents, 0x0BC, 0x0C0, 0x0C4, 16, 3, 23, 0x08, 22), 9910360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF2, "top_seninf2", 9920360be01SChun-Jie Chen seninf_parents, 0x0BC, 0x0C0, 0x0C4, 24, 3, 31, 0x08, 23), 9930360be01SChun-Jie Chen /* CLK_CFG_14 */ 9940360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF3, "top_seninf3", 9950360be01SChun-Jie Chen seninf_parents, 0x0C8, 0x0CC, 0x0D0, 0, 3, 7, 0x08, 24), 9960360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_GCPU, "top_gcpu", 9970360be01SChun-Jie Chen gcpu_parents, 0x0C8, 0x0CC, 0x0D0, 8, 3, 15, 0x08, 25), 9980360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_DXCC, "top_dxcc", 9990360be01SChun-Jie Chen dxcc_parents, 0x0C8, 0x0CC, 0x0D0, 16, 2, 23, 0x08, 26), 10000360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_DPMAIF_MAIN, "top_dpmaif_main", 10010360be01SChun-Jie Chen dpmaif_parents, 0x0C8, 0x0CC, 0x0D0, 24, 3, 31, 0x08, 27), 10020360be01SChun-Jie Chen /* CLK_CFG_15 */ 10030360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_AES_UFSFDE, "top_aes_ufsfde", 10040360be01SChun-Jie Chen aes_fde_parents, 0x0D4, 0x0D8, 0x0DC, 0, 3, 7, 0x08, 28), 10050360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_UFS, "top_ufs", 10060360be01SChun-Jie Chen ufs_parents, 0x0D4, 0x0D8, 0x0DC, 8, 3, 15, 0x08, 29), 10070360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_UFS_TICK1US, "top_ufs_tick1us", 10080360be01SChun-Jie Chen ufs_tick1us_parents, 0x0D4, 0x0D8, 0x0DC, 16, 1, 23, 0x08, 30), 10090360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_UFS_MP_SAP_CFG, "top_ufs_mp_sap_cfg", 10100360be01SChun-Jie Chen ufs_mp_sap_parents, 0x0D4, 0x0D8, 0x0DC, 24, 1, 31, 0x08, 31), 10110360be01SChun-Jie Chen /* 10120360be01SChun-Jie Chen * CLK_CFG_16 10130360be01SChun-Jie Chen * top_mcupm is main clock in other co-processor, should not be 10140360be01SChun-Jie Chen * handled by Linux. 10150360be01SChun-Jie Chen */ 10160360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_VENC, "top_venc", 10170360be01SChun-Jie Chen venc_parents, 0x0E0, 0x0E4, 0x0E8, 0, 4, 7, 0x0C, 0), 10180360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_VDEC, "top_vdec", 10190360be01SChun-Jie Chen vdec_parents, 0x0E0, 0x0E4, 0x0E8, 8, 4, 15, 0x0C, 1), 10200360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM, "top_pwm", 10210360be01SChun-Jie Chen pwm_parents, 0x0E0, 0x0E4, 0x0E8, 16, 1, 23, 0x0C, 2), 10220360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_MCUPM, "top_mcupm", 10230360be01SChun-Jie Chen mcupm_parents, 0x0E0, 0x0E4, 0x0E8, 24, 2, 31, 0x0C, 3, CLK_IS_CRITICAL), 10240360be01SChun-Jie Chen /* 10250360be01SChun-Jie Chen * CLK_CFG_17 10260360be01SChun-Jie Chen * top_dvfsrc is for internal DVFS usage, should not be handled by Linux. 10270360be01SChun-Jie Chen */ 10280360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_SPMI_P_MST, "top_spmi_p_mst", 10290360be01SChun-Jie Chen spmi_parents, 0x0EC, 0x0F0, 0x0F4, 0, 4, 7, 0x0C, 4), 10300360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_SPMI_M_MST, "top_spmi_m_mst", 10310360be01SChun-Jie Chen spmi_parents, 0x0EC, 0x0F0, 0x0F4, 8, 4, 15, 0x0C, 5), 10320360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_DVFSRC, "top_dvfsrc", 10330360be01SChun-Jie Chen dvfsrc_parents, 0x0EC, 0x0F0, 0x0F4, 16, 2, 23, 0x0C, 6, CLK_IS_CRITICAL), 10340360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_TL, "top_tl", 10350360be01SChun-Jie Chen tl_parents, 0x0EC, 0x0F0, 0x0F4, 24, 2, 31, 0x0C, 7), 10360360be01SChun-Jie Chen /* CLK_CFG_18 */ 10370360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_TL_P1, "top_tl_p1", 10380360be01SChun-Jie Chen tl_parents, 0x0F8, 0x0FC, 0x0100, 0, 2, 7, 0x0C, 8), 10390360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_AES_MSDCFDE, "top_aes_msdcfde", 10400360be01SChun-Jie Chen aes_fde_parents, 0x0F8, 0x0FC, 0x0100, 8, 3, 15, 0x0C, 9), 10410360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_DSI_OCC, "top_dsi_occ", 10420360be01SChun-Jie Chen dsi_occ_parents, 0x0F8, 0x0FC, 0x0100, 16, 2, 23, 0x0C, 10), 10430360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_WPE_VPP, "top_wpe_vpp", 10440360be01SChun-Jie Chen wpe_vpp_parents, 0x0F8, 0x0FC, 0x0100, 24, 4, 31, 0x0C, 11), 10450360be01SChun-Jie Chen /* CLK_CFG_19 */ 10460360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_HDCP, "top_hdcp", 10470360be01SChun-Jie Chen hdcp_parents, 0x0104, 0x0108, 0x010C, 0, 2, 7, 0x0C, 12), 10480360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_HDCP_24M, "top_hdcp_24m", 10490360be01SChun-Jie Chen hdcp_24m_parents, 0x0104, 0x0108, 0x010C, 8, 2, 15, 0x0C, 13), 10500360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_HD20_DACR_REF_CLK, "top_hd20_dacr_ref_clk", 10510360be01SChun-Jie Chen hd20_dacr_ref_parents, 0x0104, 0x0108, 0x010C, 16, 2, 23, 0x0C, 14), 10520360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_HD20_HDCP_CCLK, "top_hd20_hdcp_cclk", 10530360be01SChun-Jie Chen hd20_hdcp_c_parents, 0x0104, 0x0108, 0x010C, 24, 2, 31, 0x0C, 15), 10540360be01SChun-Jie Chen /* CLK_CFG_20 */ 10550360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_HDMI_XTAL, "top_hdmi_xtal", 10560360be01SChun-Jie Chen hdmi_xtal_parents, 0x0110, 0x0114, 0x0118, 0, 1, 7, 0x0C, 16), 10570360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_HDMI_APB, "top_hdmi_apb", 10580360be01SChun-Jie Chen hdmi_apb_parents, 0x0110, 0x0114, 0x0118, 8, 2, 15, 0x0C, 17), 10590360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_SNPS_ETH_250M, "top_snps_eth_250m", 10600360be01SChun-Jie Chen snps_eth_250m_parents, 0x0110, 0x0114, 0x0118, 16, 1, 23, 0x0C, 18), 10610360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_SNPS_ETH_62P4M_PTP, "top_snps_eth_62p4m_ptp", 10620360be01SChun-Jie Chen snps_eth_62p4m_ptp_parents, 0x0110, 0x0114, 0x0118, 24, 2, 31, 0x0C, 19), 10630360be01SChun-Jie Chen /* CLK_CFG_21 */ 10640360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_SNPS_ETH_50M_RMII, "snps_eth_50m_rmii", 10650360be01SChun-Jie Chen snps_eth_50m_rmii_parents, 0x011C, 0x0120, 0x0124, 0, 1, 7, 0x0C, 20), 10660360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_DGI_OUT, "top_dgi_out", 10670360be01SChun-Jie Chen dgi_out_parents, 0x011C, 0x0120, 0x0124, 8, 3, 15, 0x0C, 21), 10680360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_NNA0, "top_nna0", 10690360be01SChun-Jie Chen nna_parents, 0x011C, 0x0120, 0x0124, 16, 4, 23, 0x0C, 22), 10700360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_NNA1, "top_nna1", 10710360be01SChun-Jie Chen nna_parents, 0x011C, 0x0120, 0x0124, 24, 4, 31, 0x0C, 23), 10720360be01SChun-Jie Chen /* CLK_CFG_22 */ 10730360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_ADSP, "top_adsp", 10740360be01SChun-Jie Chen adsp_parents, 0x0128, 0x012C, 0x0130, 0, 4, 7, 0x0C, 24), 10750360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_ASM_H, "top_asm_h", 10760360be01SChun-Jie Chen asm_parents, 0x0128, 0x012C, 0x0130, 8, 2, 15, 0x0C, 25), 10770360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_ASM_M, "top_asm_m", 10780360be01SChun-Jie Chen asm_parents, 0x0128, 0x012C, 0x0130, 16, 2, 23, 0x0C, 26), 10790360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_ASM_L, "top_asm_l", 10800360be01SChun-Jie Chen asm_parents, 0x0128, 0x012C, 0x0130, 24, 2, 31, 0x0C, 27), 10810360be01SChun-Jie Chen /* CLK_CFG_23 */ 10820360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_APLL1, "top_apll1", 10830360be01SChun-Jie Chen apll1_parents, 0x0134, 0x0138, 0x013C, 0, 1, 7, 0x0C, 28), 10840360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_APLL2, "top_apll2", 10850360be01SChun-Jie Chen apll2_parents, 0x0134, 0x0138, 0x013C, 8, 1, 15, 0x0C, 29), 10860360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_APLL3, "top_apll3", 10870360be01SChun-Jie Chen apll3_parents, 0x0134, 0x0138, 0x013C, 16, 1, 23, 0x0C, 30), 10880360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_APLL4, "top_apll4", 10890360be01SChun-Jie Chen apll4_parents, 0x0134, 0x0138, 0x013C, 24, 1, 31, 0x0C, 31), 10900360be01SChun-Jie Chen /* 10910360be01SChun-Jie Chen * CLK_CFG_24 10920360be01SChun-Jie Chen * i2so4_mck is not used in MT8195. 10930360be01SChun-Jie Chen */ 10940360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_APLL5, "top_apll5", 10950360be01SChun-Jie Chen apll5_parents, 0x0140, 0x0144, 0x0148, 0, 1, 7, 0x010, 0), 10960360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_I2SO1_MCK, "top_i2so1_mck", 10970360be01SChun-Jie Chen i2s_parents, 0x0140, 0x0144, 0x0148, 8, 3, 15, 0x010, 1), 10980360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_I2SO2_MCK, "top_i2so2_mck", 10990360be01SChun-Jie Chen i2s_parents, 0x0140, 0x0144, 0x0148, 16, 3, 23, 0x010, 2), 11000360be01SChun-Jie Chen /* 11010360be01SChun-Jie Chen * CLK_CFG_25 11020360be01SChun-Jie Chen * i2so5_mck and i2si4_mck are not used in MT8195. 11030360be01SChun-Jie Chen */ 11040360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_I2SI1_MCK, "top_i2si1_mck", 11050360be01SChun-Jie Chen i2s_parents, 0x014C, 0x0150, 0x0154, 8, 3, 15, 0x010, 5), 11060360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_I2SI2_MCK, "top_i2si2_mck", 11070360be01SChun-Jie Chen i2s_parents, 0x014C, 0x0150, 0x0154, 16, 3, 23, 0x010, 6), 11080360be01SChun-Jie Chen /* 11090360be01SChun-Jie Chen * CLK_CFG_26 11100360be01SChun-Jie Chen * i2si5_mck is not used in MT8195. 11110360be01SChun-Jie Chen */ 11120360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_DPTX_MCK, "top_dptx_mck", 11130360be01SChun-Jie Chen i2s_parents, 0x0158, 0x015C, 0x0160, 8, 3, 15, 0x010, 9), 11140360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_IEC_CLK, "top_aud_iec_clk", 11150360be01SChun-Jie Chen i2s_parents, 0x0158, 0x015C, 0x0160, 16, 3, 23, 0x010, 10), 11160360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_A1SYS_HP, "top_a1sys_hp", 11170360be01SChun-Jie Chen a1sys_hp_parents, 0x0158, 0x015C, 0x0160, 24, 1, 31, 0x010, 11), 11180360be01SChun-Jie Chen /* CLK_CFG_27 */ 11190360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_A2SYS_HF, "top_a2sys_hf", 11200360be01SChun-Jie Chen a2sys_parents, 0x0164, 0x0168, 0x016C, 0, 1, 7, 0x010, 12), 11210360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_A3SYS_HF, "top_a3sys_hf", 11220360be01SChun-Jie Chen a3sys_parents, 0x0164, 0x0168, 0x016C, 8, 3, 15, 0x010, 13), 11230360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_A4SYS_HF, "top_a4sys_hf", 11240360be01SChun-Jie Chen a3sys_parents, 0x0164, 0x0168, 0x016C, 16, 3, 23, 0x010, 14), 11250360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_SPINFI_BCLK, "top_spinfi_bclk", 11260360be01SChun-Jie Chen spinfi_b_parents, 0x0164, 0x0168, 0x016C, 24, 3, 31, 0x010, 15), 11270360be01SChun-Jie Chen /* CLK_CFG_28 */ 11280360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_NFI1X, "top_nfi1x", 11290360be01SChun-Jie Chen nfi1x_parents, 0x0170, 0x0174, 0x0178, 0, 3, 7, 0x010, 16), 11300360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_ECC, "top_ecc", 11310360be01SChun-Jie Chen ecc_parents, 0x0170, 0x0174, 0x0178, 8, 3, 15, 0x010, 17), 11320360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_AUDIO_LOCAL_BUS, "top_audio_local_bus", 11330360be01SChun-Jie Chen audio_local_bus_parents, 0x0170, 0x0174, 0x0178, 16, 4, 23, 0x010, 18), 11340360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_SPINOR, "top_spinor", 11350360be01SChun-Jie Chen spinor_parents, 0x0170, 0x0174, 0x0178, 24, 2, 31, 0x010, 19), 11360360be01SChun-Jie Chen /* 11370360be01SChun-Jie Chen * CLK_CFG_29 11380360be01SChun-Jie Chen * top_ulposc/top_ulposc_core/top_srck are clock source of always on co-processor, 11390360be01SChun-Jie Chen * should not be closed by Linux. 11400360be01SChun-Jie Chen */ 11410360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD(CLK_TOP_DVIO_DGI_REF, "top_dvio_dgi_ref", 11420360be01SChun-Jie Chen dvio_dgi_ref_parents, 0x017C, 0x0180, 0x0184, 0, 3, 7, 0x010, 20), 11430360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_ULPOSC, "top_ulposc", 11440360be01SChun-Jie Chen ulposc_parents, 0x017C, 0x0180, 0x0184, 8, 2, 15, 0x010, 21, CLK_IS_CRITICAL), 11450360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_ULPOSC_CORE, "top_ulposc_core", 11460360be01SChun-Jie Chen ulposc_core_parents, 0x017C, 0x0180, 0x0184, 16, 2, 23, 0x010, 22, CLK_IS_CRITICAL), 11470360be01SChun-Jie Chen MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_SRCK, "top_srck", 11480360be01SChun-Jie Chen srck_parents, 0x017C, 0x0180, 0x0184, 24, 1, 31, 0x010, 23, CLK_IS_CRITICAL), 11490360be01SChun-Jie Chen /* 11500360be01SChun-Jie Chen * the clocks in CLK_CFG_30 ~ 37 are backup clock source, no need to handled 11510360be01SChun-Jie Chen * by Linux. 11520360be01SChun-Jie Chen */ 11530360be01SChun-Jie Chen }; 11540360be01SChun-Jie Chen 11550360be01SChun-Jie Chen static const struct mtk_composite top_adj_divs[] = { 11560360be01SChun-Jie Chen DIV_GATE(CLK_TOP_APLL12_DIV0, "apll12_div0", "top_i2si1_mck", 0x0320, 0, 0x0328, 8, 0), 11570360be01SChun-Jie Chen DIV_GATE(CLK_TOP_APLL12_DIV1, "apll12_div1", "top_i2si2_mck", 0x0320, 1, 0x0328, 8, 8), 11580360be01SChun-Jie Chen DIV_GATE(CLK_TOP_APLL12_DIV2, "apll12_div2", "top_i2so1_mck", 0x0320, 2, 0x0328, 8, 16), 11590360be01SChun-Jie Chen DIV_GATE(CLK_TOP_APLL12_DIV3, "apll12_div3", "top_i2so2_mck", 0x0320, 3, 0x0328, 8, 24), 11600360be01SChun-Jie Chen DIV_GATE(CLK_TOP_APLL12_DIV4, "apll12_div4", "top_aud_iec_clk", 0x0320, 4, 0x0334, 8, 0), 11610360be01SChun-Jie Chen /* apll12_div5 ~ 8 are not used in MT8195. */ 11620360be01SChun-Jie Chen DIV_GATE(CLK_TOP_APLL12_DIV9, "apll12_div9", "top_dptx_mck", 0x0320, 9, 0x0338, 8, 8), 11630360be01SChun-Jie Chen }; 11640360be01SChun-Jie Chen 11650360be01SChun-Jie Chen static const struct mtk_gate_regs top0_cg_regs = { 11660360be01SChun-Jie Chen .set_ofs = 0x238, 11670360be01SChun-Jie Chen .clr_ofs = 0x238, 11680360be01SChun-Jie Chen .sta_ofs = 0x238, 11690360be01SChun-Jie Chen }; 11700360be01SChun-Jie Chen 11710360be01SChun-Jie Chen static const struct mtk_gate_regs top1_cg_regs = { 11720360be01SChun-Jie Chen .set_ofs = 0x250, 11730360be01SChun-Jie Chen .clr_ofs = 0x250, 11740360be01SChun-Jie Chen .sta_ofs = 0x250, 11750360be01SChun-Jie Chen }; 11760360be01SChun-Jie Chen 11770360be01SChun-Jie Chen #define GATE_TOP0_FLAGS(_id, _name, _parent, _shift, _flag) \ 11780360be01SChun-Jie Chen GATE_MTK_FLAGS(_id, _name, _parent, &top0_cg_regs, _shift, \ 11790360be01SChun-Jie Chen &mtk_clk_gate_ops_no_setclr_inv, _flag) 11800360be01SChun-Jie Chen 11810360be01SChun-Jie Chen #define GATE_TOP0(_id, _name, _parent, _shift) \ 11820360be01SChun-Jie Chen GATE_TOP0_FLAGS(_id, _name, _parent, _shift, 0) 11830360be01SChun-Jie Chen 11840360be01SChun-Jie Chen #define GATE_TOP1(_id, _name, _parent, _shift) \ 11850360be01SChun-Jie Chen GATE_MTK(_id, _name, _parent, &top1_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv) 11860360be01SChun-Jie Chen 11870360be01SChun-Jie Chen static const struct mtk_gate top_clks[] = { 11880360be01SChun-Jie Chen /* TOP0 */ 11890360be01SChun-Jie Chen GATE_TOP0(CLK_TOP_CFG_VPP0, "cfg_vpp0", "top_vpp", 0), 11900360be01SChun-Jie Chen GATE_TOP0(CLK_TOP_CFG_VPP1, "cfg_vpp1", "top_vpp", 1), 11910360be01SChun-Jie Chen GATE_TOP0(CLK_TOP_CFG_VDO0, "cfg_vdo0", "top_vpp", 2), 11920360be01SChun-Jie Chen GATE_TOP0(CLK_TOP_CFG_VDO1, "cfg_vdo1", "top_vpp", 3), 11930360be01SChun-Jie Chen GATE_TOP0(CLK_TOP_CFG_UNIPLL_SES, "cfg_unipll_ses", "univpll_d2", 4), 11940360be01SChun-Jie Chen GATE_TOP0(CLK_TOP_CFG_26M_VPP0, "cfg_26m_vpp0", "clk26m", 5), 11950360be01SChun-Jie Chen GATE_TOP0(CLK_TOP_CFG_26M_VPP1, "cfg_26m_vpp1", "clk26m", 6), 11960360be01SChun-Jie Chen GATE_TOP0(CLK_TOP_CFG_26M_AUD, "cfg_26m_aud", "clk26m", 9), 11970360be01SChun-Jie Chen /* 11980360be01SChun-Jie Chen * cfg_axi_east, cfg_axi_east_north, cfg_axi_north and cfg_axi_south 11990360be01SChun-Jie Chen * are peripheral bus clock branches. 12000360be01SChun-Jie Chen */ 12010360be01SChun-Jie Chen GATE_TOP0_FLAGS(CLK_TOP_CFG_AXI_EAST, "cfg_axi_east", "top_axi", 10, CLK_IS_CRITICAL), 12020360be01SChun-Jie Chen GATE_TOP0_FLAGS(CLK_TOP_CFG_AXI_EAST_NORTH, "cfg_axi_east_north", "top_axi", 11, 12030360be01SChun-Jie Chen CLK_IS_CRITICAL), 12040360be01SChun-Jie Chen GATE_TOP0_FLAGS(CLK_TOP_CFG_AXI_NORTH, "cfg_axi_north", "top_axi", 12, CLK_IS_CRITICAL), 12050360be01SChun-Jie Chen GATE_TOP0_FLAGS(CLK_TOP_CFG_AXI_SOUTH, "cfg_axi_south", "top_axi", 13, CLK_IS_CRITICAL), 12060360be01SChun-Jie Chen GATE_TOP0(CLK_TOP_CFG_EXT_TEST, "cfg_ext_test", "msdcpll_d2", 15), 12070360be01SChun-Jie Chen /* TOP1 */ 12080360be01SChun-Jie Chen GATE_TOP1(CLK_TOP_SSUSB_REF, "ssusb_ref", "clk26m", 0), 12090360be01SChun-Jie Chen GATE_TOP1(CLK_TOP_SSUSB_PHY_REF, "ssusb_phy_ref", "clk26m", 1), 12100360be01SChun-Jie Chen GATE_TOP1(CLK_TOP_SSUSB_P1_REF, "ssusb_p1_ref", "clk26m", 2), 12110360be01SChun-Jie Chen GATE_TOP1(CLK_TOP_SSUSB_PHY_P1_REF, "ssusb_phy_p1_ref", "clk26m", 3), 12120360be01SChun-Jie Chen GATE_TOP1(CLK_TOP_SSUSB_P2_REF, "ssusb_p2_ref", "clk26m", 4), 12130360be01SChun-Jie Chen GATE_TOP1(CLK_TOP_SSUSB_PHY_P2_REF, "ssusb_phy_p2_ref", "clk26m", 5), 12140360be01SChun-Jie Chen GATE_TOP1(CLK_TOP_SSUSB_P3_REF, "ssusb_p3_ref", "clk26m", 6), 12150360be01SChun-Jie Chen GATE_TOP1(CLK_TOP_SSUSB_PHY_P3_REF, "ssusb_phy_p3_ref", "clk26m", 7), 12160360be01SChun-Jie Chen }; 12170360be01SChun-Jie Chen 12180360be01SChun-Jie Chen static const struct of_device_id of_match_clk_mt8195_topck[] = { 12190360be01SChun-Jie Chen { .compatible = "mediatek,mt8195-topckgen", }, 12200360be01SChun-Jie Chen {} 12210360be01SChun-Jie Chen }; 12220360be01SChun-Jie Chen 1223f8fd4b55SAngeloGioacchino Del Regno /* Register mux notifier for MFG mux */ 1224f8fd4b55SAngeloGioacchino Del Regno static int clk_mt8195_reg_mfg_mux_notifier(struct device *dev, struct clk *clk) 1225f8fd4b55SAngeloGioacchino Del Regno { 1226f8fd4b55SAngeloGioacchino Del Regno struct mtk_mux_nb *mfg_mux_nb; 1227f8fd4b55SAngeloGioacchino Del Regno 1228f8fd4b55SAngeloGioacchino Del Regno mfg_mux_nb = devm_kzalloc(dev, sizeof(*mfg_mux_nb), GFP_KERNEL); 1229f8fd4b55SAngeloGioacchino Del Regno if (!mfg_mux_nb) 1230f8fd4b55SAngeloGioacchino Del Regno return -ENOMEM; 1231f8fd4b55SAngeloGioacchino Del Regno 1232f8fd4b55SAngeloGioacchino Del Regno mfg_mux_nb->ops = &clk_mux_ops; 1233f8fd4b55SAngeloGioacchino Del Regno mfg_mux_nb->bypass_index = 0; /* Bypass to TOP_MFG_CORE_TMP */ 1234f8fd4b55SAngeloGioacchino Del Regno 1235f8fd4b55SAngeloGioacchino Del Regno return devm_mtk_clk_mux_notifier_register(dev, clk, mfg_mux_nb); 1236f8fd4b55SAngeloGioacchino Del Regno } 1237f8fd4b55SAngeloGioacchino Del Regno 12380360be01SChun-Jie Chen static int clk_mt8195_topck_probe(struct platform_device *pdev) 12390360be01SChun-Jie Chen { 1240609cc5e1SChen-Yu Tsai struct clk_hw_onecell_data *top_clk_data; 12410360be01SChun-Jie Chen struct device_node *node = pdev->dev.of_node; 1242deeb2af7SAngeloGioacchino Del Regno struct clk_hw *hw; 12430360be01SChun-Jie Chen int r; 12440360be01SChun-Jie Chen void __iomem *base; 12450360be01SChun-Jie Chen 12460360be01SChun-Jie Chen top_clk_data = mtk_alloc_clk_data(CLK_TOP_NR_CLK); 12470360be01SChun-Jie Chen if (!top_clk_data) 12480360be01SChun-Jie Chen return -ENOMEM; 12490360be01SChun-Jie Chen 12500360be01SChun-Jie Chen base = devm_platform_ioremap_resource(pdev, 0); 12510360be01SChun-Jie Chen if (IS_ERR(base)) { 12520360be01SChun-Jie Chen r = PTR_ERR(base); 12530360be01SChun-Jie Chen goto free_top_data; 12540360be01SChun-Jie Chen } 12550360be01SChun-Jie Chen 1256f3e690b0SChen-Yu Tsai r = mtk_clk_register_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks), 12570360be01SChun-Jie Chen top_clk_data); 12580360be01SChun-Jie Chen if (r) 12590360be01SChun-Jie Chen goto free_top_data; 12600360be01SChun-Jie Chen 1261f3e690b0SChen-Yu Tsai r = mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), top_clk_data); 1262f3e690b0SChen-Yu Tsai if (r) 1263f3e690b0SChen-Yu Tsai goto unregister_fixed_clks; 1264f3e690b0SChen-Yu Tsai 1265f3e690b0SChen-Yu Tsai r = mtk_clk_register_muxes(top_mtk_muxes, ARRAY_SIZE(top_mtk_muxes), node, 1266f3e690b0SChen-Yu Tsai &mt8195_clk_lock, top_clk_data); 1267f3e690b0SChen-Yu Tsai if (r) 1268f3e690b0SChen-Yu Tsai goto unregister_factors; 1269f3e690b0SChen-Yu Tsai 1270deeb2af7SAngeloGioacchino Del Regno hw = devm_clk_hw_register_mux(&pdev->dev, "mfg_ck_fast_ref", mfg_fast_parents, 1271deeb2af7SAngeloGioacchino Del Regno ARRAY_SIZE(mfg_fast_parents), CLK_SET_RATE_PARENT, 1272deeb2af7SAngeloGioacchino Del Regno (base + 0x250), 8, 1, 0, &mt8195_clk_lock); 12738fbf8636SYang Yingliang if (IS_ERR(hw)) { 12748fbf8636SYang Yingliang r = PTR_ERR(hw); 1275f3e690b0SChen-Yu Tsai goto unregister_muxes; 12768fbf8636SYang Yingliang } 1277deeb2af7SAngeloGioacchino Del Regno top_clk_data->hws[CLK_TOP_MFG_CK_FAST_REF] = hw; 1278f3e690b0SChen-Yu Tsai 1279f8fd4b55SAngeloGioacchino Del Regno r = clk_mt8195_reg_mfg_mux_notifier(&pdev->dev, 1280f8fd4b55SAngeloGioacchino Del Regno top_clk_data->hws[CLK_TOP_MFG_CK_FAST_REF]->clk); 1281f8fd4b55SAngeloGioacchino Del Regno if (r) 1282f8fd4b55SAngeloGioacchino Del Regno goto unregister_muxes; 1283f8fd4b55SAngeloGioacchino Del Regno 1284f3e690b0SChen-Yu Tsai r = mtk_clk_register_composites(top_adj_divs, ARRAY_SIZE(top_adj_divs), base, 1285f3e690b0SChen-Yu Tsai &mt8195_clk_lock, top_clk_data); 1286f3e690b0SChen-Yu Tsai if (r) 1287deeb2af7SAngeloGioacchino Del Regno goto unregister_muxes; 1288f3e690b0SChen-Yu Tsai 1289*20498d52SAngeloGioacchino Del Regno r = mtk_clk_register_gates(&pdev->dev, node, top_clks, 1290*20498d52SAngeloGioacchino Del Regno ARRAY_SIZE(top_clks), top_clk_data); 1291f3e690b0SChen-Yu Tsai if (r) 1292f3e690b0SChen-Yu Tsai goto unregister_composite_divs; 1293f3e690b0SChen-Yu Tsai 1294609cc5e1SChen-Yu Tsai r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, top_clk_data); 12950360be01SChun-Jie Chen if (r) 1296f3e690b0SChen-Yu Tsai goto unregister_gates; 12970360be01SChun-Jie Chen 1298cf8a482aSChen-Yu Tsai platform_set_drvdata(pdev, top_clk_data); 1299cf8a482aSChen-Yu Tsai 13000360be01SChun-Jie Chen return r; 13010360be01SChun-Jie Chen 1302f3e690b0SChen-Yu Tsai unregister_gates: 1303f3e690b0SChen-Yu Tsai mtk_clk_unregister_gates(top_clks, ARRAY_SIZE(top_clks), top_clk_data); 1304f3e690b0SChen-Yu Tsai unregister_composite_divs: 1305f3e690b0SChen-Yu Tsai mtk_clk_unregister_composites(top_adj_divs, ARRAY_SIZE(top_adj_divs), top_clk_data); 1306f3e690b0SChen-Yu Tsai unregister_muxes: 1307f3e690b0SChen-Yu Tsai mtk_clk_unregister_muxes(top_mtk_muxes, ARRAY_SIZE(top_mtk_muxes), top_clk_data); 1308f3e690b0SChen-Yu Tsai unregister_factors: 1309f3e690b0SChen-Yu Tsai mtk_clk_unregister_factors(top_divs, ARRAY_SIZE(top_divs), top_clk_data); 1310f3e690b0SChen-Yu Tsai unregister_fixed_clks: 1311f3e690b0SChen-Yu Tsai mtk_clk_unregister_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks), top_clk_data); 13120360be01SChun-Jie Chen free_top_data: 13130360be01SChun-Jie Chen mtk_free_clk_data(top_clk_data); 13140360be01SChun-Jie Chen return r; 13150360be01SChun-Jie Chen } 13160360be01SChun-Jie Chen 1317cf8a482aSChen-Yu Tsai static int clk_mt8195_topck_remove(struct platform_device *pdev) 1318cf8a482aSChen-Yu Tsai { 1319609cc5e1SChen-Yu Tsai struct clk_hw_onecell_data *top_clk_data = platform_get_drvdata(pdev); 1320cf8a482aSChen-Yu Tsai struct device_node *node = pdev->dev.of_node; 1321cf8a482aSChen-Yu Tsai 1322cf8a482aSChen-Yu Tsai of_clk_del_provider(node); 1323cf8a482aSChen-Yu Tsai mtk_clk_unregister_gates(top_clks, ARRAY_SIZE(top_clks), top_clk_data); 1324cf8a482aSChen-Yu Tsai mtk_clk_unregister_composites(top_adj_divs, ARRAY_SIZE(top_adj_divs), top_clk_data); 1325cf8a482aSChen-Yu Tsai mtk_clk_unregister_muxes(top_mtk_muxes, ARRAY_SIZE(top_mtk_muxes), top_clk_data); 1326cf8a482aSChen-Yu Tsai mtk_clk_unregister_factors(top_divs, ARRAY_SIZE(top_divs), top_clk_data); 1327cf8a482aSChen-Yu Tsai mtk_clk_unregister_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks), top_clk_data); 1328cf8a482aSChen-Yu Tsai mtk_free_clk_data(top_clk_data); 1329cf8a482aSChen-Yu Tsai 1330cf8a482aSChen-Yu Tsai return 0; 1331cf8a482aSChen-Yu Tsai } 1332cf8a482aSChen-Yu Tsai 13330360be01SChun-Jie Chen static struct platform_driver clk_mt8195_topck_drv = { 13340360be01SChun-Jie Chen .probe = clk_mt8195_topck_probe, 1335cf8a482aSChen-Yu Tsai .remove = clk_mt8195_topck_remove, 13360360be01SChun-Jie Chen .driver = { 13370360be01SChun-Jie Chen .name = "clk-mt8195-topck", 13380360be01SChun-Jie Chen .of_match_table = of_match_clk_mt8195_topck, 13390360be01SChun-Jie Chen }, 13400360be01SChun-Jie Chen }; 13410360be01SChun-Jie Chen builtin_platform_driver(clk_mt8195_topck_drv); 1342