1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // Copyright (c) 2021 MediaTek Inc.
4 // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
5 
6 #include "clk-gate.h"
7 #include "clk-mtk.h"
8 
9 #include <dt-bindings/clock/mt8195-clk.h>
10 #include <linux/clk-provider.h>
11 #include <linux/platform_device.h>
12 
13 static const struct mtk_gate_regs mfg_cg_regs = {
14 	.set_ofs = 0x4,
15 	.clr_ofs = 0x8,
16 	.sta_ofs = 0x0,
17 };
18 
19 #define GATE_MFG(_id, _name, _parent, _shift)			\
20 	GATE_MTK(_id, _name, _parent, &mfg_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
21 
22 static const struct mtk_gate mfg_clks[] = {
23 	GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d", "top_mfg_core_tmp", 0),
24 };
25 
26 static const struct mtk_clk_desc mfg_desc = {
27 	.clks = mfg_clks,
28 	.num_clks = ARRAY_SIZE(mfg_clks),
29 };
30 
31 static const struct of_device_id of_match_clk_mt8195_mfg[] = {
32 	{
33 		.compatible = "mediatek,mt8195-mfgcfg",
34 		.data = &mfg_desc,
35 	}, {
36 		/* sentinel */
37 	}
38 };
39 
40 static struct platform_driver clk_mt8195_mfg_drv = {
41 	.probe = mtk_clk_simple_probe,
42 	.driver = {
43 		.name = "clk-mt8195-mfg",
44 		.of_match_table = of_match_clk_mt8195_mfg,
45 	},
46 };
47 builtin_platform_driver(clk_mt8195_mfg_drv);
48