1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // Copyright (c) 2021 MediaTek Inc.
4 // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
5 
6 #include <linux/clk-provider.h>
7 #include <linux/of_device.h>
8 #include <linux/platform_device.h>
9 
10 #include "clk-mtk.h"
11 #include "clk-gate.h"
12 
13 #include <dt-bindings/clock/mt8192-clk.h>
14 
15 static const struct mtk_gate_regs img_cg_regs = {
16 	.set_ofs = 0x4,
17 	.clr_ofs = 0x8,
18 	.sta_ofs = 0x0,
19 };
20 
21 #define GATE_IMG(_id, _name, _parent, _shift)	\
22 	GATE_MTK(_id, _name, _parent, &img_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
23 
24 static const struct mtk_gate img_clks[] = {
25 	GATE_IMG(CLK_IMG_LARB9, "img_larb9", "img1_sel", 0),
26 	GATE_IMG(CLK_IMG_LARB10, "img_larb10", "img1_sel", 1),
27 	GATE_IMG(CLK_IMG_DIP, "img_dip", "img1_sel", 2),
28 	GATE_IMG(CLK_IMG_GALS, "img_gals", "img1_sel", 12),
29 };
30 
31 static const struct mtk_gate img2_clks[] = {
32 	GATE_IMG(CLK_IMG2_LARB11, "img2_larb11", "img1_sel", 0),
33 	GATE_IMG(CLK_IMG2_LARB12, "img2_larb12", "img1_sel", 1),
34 	GATE_IMG(CLK_IMG2_MFB, "img2_mfb", "img1_sel", 6),
35 	GATE_IMG(CLK_IMG2_WPE, "img2_wpe", "img1_sel", 7),
36 	GATE_IMG(CLK_IMG2_MSS, "img2_mss", "img1_sel", 8),
37 	GATE_IMG(CLK_IMG2_GALS, "img2_gals", "img1_sel", 12),
38 };
39 
40 static const struct mtk_clk_desc img_desc = {
41 	.clks = img_clks,
42 	.num_clks = ARRAY_SIZE(img_clks),
43 };
44 
45 static const struct mtk_clk_desc img2_desc = {
46 	.clks = img2_clks,
47 	.num_clks = ARRAY_SIZE(img2_clks),
48 };
49 
50 static const struct of_device_id of_match_clk_mt8192_img[] = {
51 	{
52 		.compatible = "mediatek,mt8192-imgsys",
53 		.data = &img_desc,
54 	}, {
55 		.compatible = "mediatek,mt8192-imgsys2",
56 		.data = &img2_desc,
57 	}, {
58 		/* sentinel */
59 	}
60 };
61 MODULE_DEVICE_TABLE(of, of_match_clk_mt8192_img);
62 
63 static struct platform_driver clk_mt8192_img_drv = {
64 	.probe = mtk_clk_simple_probe,
65 	.remove_new = mtk_clk_simple_remove,
66 	.driver = {
67 		.name = "clk-mt8192-img",
68 		.of_match_table = of_match_clk_mt8192_img,
69 	},
70 };
71 module_platform_driver(clk_mt8192_img_drv);
72 MODULE_LICENSE("GPL");
73