1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // Copyright (c) 2021 MediaTek Inc.
4 // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
5 
6 #include <linux/clk-provider.h>
7 #include <linux/of_device.h>
8 #include <linux/platform_device.h>
9 
10 #include "clk-mtk.h"
11 #include "clk-gate.h"
12 
13 #include <dt-bindings/clock/mt8192-clk.h>
14 
15 static const struct mtk_gate_regs cam_cg_regs = {
16 	.set_ofs = 0x4,
17 	.clr_ofs = 0x8,
18 	.sta_ofs = 0x0,
19 };
20 
21 #define GATE_CAM(_id, _name, _parent, _shift)	\
22 	GATE_MTK(_id, _name, _parent, &cam_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
23 
24 static const struct mtk_gate cam_clks[] = {
25 	GATE_CAM(CLK_CAM_LARB13, "cam_larb13", "cam_sel", 0),
26 	GATE_CAM(CLK_CAM_DFP_VAD, "cam_dfp_vad", "cam_sel", 1),
27 	GATE_CAM(CLK_CAM_LARB14, "cam_larb14", "cam_sel", 2),
28 	GATE_CAM(CLK_CAM_CAM, "cam_cam", "cam_sel", 6),
29 	GATE_CAM(CLK_CAM_CAMTG, "cam_camtg", "cam_sel", 7),
30 	GATE_CAM(CLK_CAM_SENINF, "cam_seninf", "cam_sel", 8),
31 	GATE_CAM(CLK_CAM_CAMSV0, "cam_camsv0", "cam_sel", 9),
32 	GATE_CAM(CLK_CAM_CAMSV1, "cam_camsv1", "cam_sel", 10),
33 	GATE_CAM(CLK_CAM_CAMSV2, "cam_camsv2", "cam_sel", 11),
34 	GATE_CAM(CLK_CAM_CAMSV3, "cam_camsv3", "cam_sel", 12),
35 	GATE_CAM(CLK_CAM_CCU0, "cam_ccu0", "cam_sel", 13),
36 	GATE_CAM(CLK_CAM_CCU1, "cam_ccu1", "cam_sel", 14),
37 	GATE_CAM(CLK_CAM_MRAW0, "cam_mraw0", "cam_sel", 15),
38 	GATE_CAM(CLK_CAM_FAKE_ENG, "cam_fake_eng", "cam_sel", 17),
39 	GATE_CAM(CLK_CAM_CCU_GALS, "cam_ccu_gals", "cam_sel", 18),
40 	GATE_CAM(CLK_CAM_CAM2MM_GALS, "cam2mm_gals", "cam_sel", 19),
41 };
42 
43 static const struct mtk_gate cam_rawa_clks[] = {
44 	GATE_CAM(CLK_CAM_RAWA_LARBX, "cam_rawa_larbx", "cam_sel", 0),
45 	GATE_CAM(CLK_CAM_RAWA_CAM, "cam_rawa_cam", "cam_sel", 1),
46 	GATE_CAM(CLK_CAM_RAWA_CAMTG, "cam_rawa_camtg", "cam_sel", 2),
47 };
48 
49 static const struct mtk_gate cam_rawb_clks[] = {
50 	GATE_CAM(CLK_CAM_RAWB_LARBX, "cam_rawb_larbx", "cam_sel", 0),
51 	GATE_CAM(CLK_CAM_RAWB_CAM, "cam_rawb_cam", "cam_sel", 1),
52 	GATE_CAM(CLK_CAM_RAWB_CAMTG, "cam_rawb_camtg", "cam_sel", 2),
53 };
54 
55 static const struct mtk_gate cam_rawc_clks[] = {
56 	GATE_CAM(CLK_CAM_RAWC_LARBX, "cam_rawc_larbx", "cam_sel", 0),
57 	GATE_CAM(CLK_CAM_RAWC_CAM, "cam_rawc_cam", "cam_sel", 1),
58 	GATE_CAM(CLK_CAM_RAWC_CAMTG, "cam_rawc_camtg", "cam_sel", 2),
59 };
60 
61 static const struct mtk_clk_desc cam_desc = {
62 	.clks = cam_clks,
63 	.num_clks = ARRAY_SIZE(cam_clks),
64 };
65 
66 static const struct mtk_clk_desc cam_rawa_desc = {
67 	.clks = cam_rawa_clks,
68 	.num_clks = ARRAY_SIZE(cam_rawa_clks),
69 };
70 
71 static const struct mtk_clk_desc cam_rawb_desc = {
72 	.clks = cam_rawb_clks,
73 	.num_clks = ARRAY_SIZE(cam_rawb_clks),
74 };
75 
76 static const struct mtk_clk_desc cam_rawc_desc = {
77 	.clks = cam_rawc_clks,
78 	.num_clks = ARRAY_SIZE(cam_rawc_clks),
79 };
80 
81 static const struct of_device_id of_match_clk_mt8192_cam[] = {
82 	{
83 		.compatible = "mediatek,mt8192-camsys",
84 		.data = &cam_desc,
85 	}, {
86 		.compatible = "mediatek,mt8192-camsys_rawa",
87 		.data = &cam_rawa_desc,
88 	}, {
89 		.compatible = "mediatek,mt8192-camsys_rawb",
90 		.data = &cam_rawb_desc,
91 	}, {
92 		.compatible = "mediatek,mt8192-camsys_rawc",
93 		.data = &cam_rawc_desc,
94 	}, {
95 		/* sentinel */
96 	}
97 };
98 
99 static struct platform_driver clk_mt8192_cam_drv = {
100 	.probe = mtk_clk_simple_probe,
101 	.driver = {
102 		.name = "clk-mt8192-cam",
103 		.of_match_table = of_match_clk_mt8192_cam,
104 	},
105 };
106 
107 builtin_platform_driver(clk_mt8192_cam_drv);
108