1f61e8348SChun-Jie Chen // SPDX-License-Identifier: GPL-2.0-only 2f61e8348SChun-Jie Chen // 3f61e8348SChun-Jie Chen // Copyright (c) 2021 MediaTek Inc. 4f61e8348SChun-Jie Chen // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com> 5f61e8348SChun-Jie Chen 6f61e8348SChun-Jie Chen #include <linux/clk-provider.h> 7f61e8348SChun-Jie Chen #include <linux/of_platform.h> 8f61e8348SChun-Jie Chen #include <linux/platform_device.h> 9f61e8348SChun-Jie Chen 10f61e8348SChun-Jie Chen #include "clk-mtk.h" 11f61e8348SChun-Jie Chen #include "clk-gate.h" 12f61e8348SChun-Jie Chen 13f61e8348SChun-Jie Chen #include <dt-bindings/clock/mt8192-clk.h> 14f61e8348SChun-Jie Chen 15f61e8348SChun-Jie Chen static const struct mtk_gate_regs aud0_cg_regs = { 16f61e8348SChun-Jie Chen .set_ofs = 0x0, 17f61e8348SChun-Jie Chen .clr_ofs = 0x0, 18f61e8348SChun-Jie Chen .sta_ofs = 0x0, 19f61e8348SChun-Jie Chen }; 20f61e8348SChun-Jie Chen 21f61e8348SChun-Jie Chen static const struct mtk_gate_regs aud1_cg_regs = { 22f61e8348SChun-Jie Chen .set_ofs = 0x4, 23f61e8348SChun-Jie Chen .clr_ofs = 0x4, 24f61e8348SChun-Jie Chen .sta_ofs = 0x4, 25f61e8348SChun-Jie Chen }; 26f61e8348SChun-Jie Chen 27f61e8348SChun-Jie Chen static const struct mtk_gate_regs aud2_cg_regs = { 28f61e8348SChun-Jie Chen .set_ofs = 0x8, 29f61e8348SChun-Jie Chen .clr_ofs = 0x8, 30f61e8348SChun-Jie Chen .sta_ofs = 0x8, 31f61e8348SChun-Jie Chen }; 32f61e8348SChun-Jie Chen 33f61e8348SChun-Jie Chen #define GATE_AUD0(_id, _name, _parent, _shift) \ 34f61e8348SChun-Jie Chen GATE_MTK(_id, _name, _parent, &aud0_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr) 35f61e8348SChun-Jie Chen 36f61e8348SChun-Jie Chen #define GATE_AUD1(_id, _name, _parent, _shift) \ 37f61e8348SChun-Jie Chen GATE_MTK(_id, _name, _parent, &aud1_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr) 38f61e8348SChun-Jie Chen 39f61e8348SChun-Jie Chen #define GATE_AUD2(_id, _name, _parent, _shift) \ 40f61e8348SChun-Jie Chen GATE_MTK(_id, _name, _parent, &aud2_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr) 41f61e8348SChun-Jie Chen 42f61e8348SChun-Jie Chen static const struct mtk_gate aud_clks[] = { 43f61e8348SChun-Jie Chen /* AUD0 */ 44f61e8348SChun-Jie Chen GATE_AUD0(CLK_AUD_AFE, "aud_afe", "audio_sel", 2), 45f61e8348SChun-Jie Chen GATE_AUD0(CLK_AUD_22M, "aud_22m", "aud_engen1_sel", 8), 46f61e8348SChun-Jie Chen GATE_AUD0(CLK_AUD_24M, "aud_24m", "aud_engen2_sel", 9), 47f61e8348SChun-Jie Chen GATE_AUD0(CLK_AUD_APLL2_TUNER, "aud_apll2_tuner", "aud_engen2_sel", 18), 48f61e8348SChun-Jie Chen GATE_AUD0(CLK_AUD_APLL_TUNER, "aud_apll_tuner", "aud_engen1_sel", 19), 49f61e8348SChun-Jie Chen GATE_AUD0(CLK_AUD_TDM, "aud_tdm", "aud_1_sel", 20), 50f61e8348SChun-Jie Chen GATE_AUD0(CLK_AUD_ADC, "aud_adc", "audio_sel", 24), 51f61e8348SChun-Jie Chen GATE_AUD0(CLK_AUD_DAC, "aud_dac", "audio_sel", 25), 52f61e8348SChun-Jie Chen GATE_AUD0(CLK_AUD_DAC_PREDIS, "aud_dac_predis", "audio_sel", 26), 53f61e8348SChun-Jie Chen GATE_AUD0(CLK_AUD_TML, "aud_tml", "audio_sel", 27), 54f61e8348SChun-Jie Chen GATE_AUD0(CLK_AUD_NLE, "aud_nle", "audio_sel", 28), 55f61e8348SChun-Jie Chen /* AUD1 */ 56f61e8348SChun-Jie Chen GATE_AUD1(CLK_AUD_I2S1_B, "aud_i2s1_b", "audio_sel", 4), 57f61e8348SChun-Jie Chen GATE_AUD1(CLK_AUD_I2S2_B, "aud_i2s2_b", "audio_sel", 5), 58f61e8348SChun-Jie Chen GATE_AUD1(CLK_AUD_I2S3_B, "aud_i2s3_b", "audio_sel", 6), 59f61e8348SChun-Jie Chen GATE_AUD1(CLK_AUD_I2S4_B, "aud_i2s4_b", "audio_sel", 7), 60f61e8348SChun-Jie Chen GATE_AUD1(CLK_AUD_CONNSYS_I2S_ASRC, "aud_connsys_i2s_asrc", "audio_sel", 12), 61f61e8348SChun-Jie Chen GATE_AUD1(CLK_AUD_GENERAL1_ASRC, "aud_general1_asrc", "audio_sel", 13), 62f61e8348SChun-Jie Chen GATE_AUD1(CLK_AUD_GENERAL2_ASRC, "aud_general2_asrc", "audio_sel", 14), 63f61e8348SChun-Jie Chen GATE_AUD1(CLK_AUD_DAC_HIRES, "aud_dac_hires", "audio_h_sel", 15), 64f61e8348SChun-Jie Chen GATE_AUD1(CLK_AUD_ADC_HIRES, "aud_adc_hires", "audio_h_sel", 16), 65f61e8348SChun-Jie Chen GATE_AUD1(CLK_AUD_ADC_HIRES_TML, "aud_adc_hires_tml", "audio_h_sel", 17), 66f61e8348SChun-Jie Chen GATE_AUD1(CLK_AUD_ADDA6_ADC, "aud_adda6_adc", "audio_sel", 20), 67f61e8348SChun-Jie Chen GATE_AUD1(CLK_AUD_ADDA6_ADC_HIRES, "aud_adda6_adc_hires", "audio_h_sel", 21), 68f61e8348SChun-Jie Chen GATE_AUD1(CLK_AUD_3RD_DAC, "aud_3rd_dac", "audio_sel", 28), 69f61e8348SChun-Jie Chen GATE_AUD1(CLK_AUD_3RD_DAC_PREDIS, "aud_3rd_dac_predis", "audio_sel", 29), 70f61e8348SChun-Jie Chen GATE_AUD1(CLK_AUD_3RD_DAC_TML, "aud_3rd_dac_tml", "audio_sel", 30), 71f61e8348SChun-Jie Chen GATE_AUD1(CLK_AUD_3RD_DAC_HIRES, "aud_3rd_dac_hires", "audio_h_sel", 31), 72f61e8348SChun-Jie Chen /* AUD2 */ 73f61e8348SChun-Jie Chen GATE_AUD2(CLK_AUD_I2S5_B, "aud_i2s5_b", "audio_sel", 0), 74f61e8348SChun-Jie Chen GATE_AUD2(CLK_AUD_I2S6_B, "aud_i2s6_b", "audio_sel", 1), 75f61e8348SChun-Jie Chen GATE_AUD2(CLK_AUD_I2S7_B, "aud_i2s7_b", "audio_sel", 2), 76f61e8348SChun-Jie Chen GATE_AUD2(CLK_AUD_I2S8_B, "aud_i2s8_b", "audio_sel", 3), 77f61e8348SChun-Jie Chen GATE_AUD2(CLK_AUD_I2S9_B, "aud_i2s9_b", "audio_sel", 4), 78f61e8348SChun-Jie Chen }; 79f61e8348SChun-Jie Chen 80*0f69a423SAngeloGioacchino Del Regno static const struct mtk_clk_desc aud_desc = { 81*0f69a423SAngeloGioacchino Del Regno .clks = aud_clks, 82*0f69a423SAngeloGioacchino Del Regno .num_clks = ARRAY_SIZE(aud_clks), 83*0f69a423SAngeloGioacchino Del Regno }; 84*0f69a423SAngeloGioacchino Del Regno 85f61e8348SChun-Jie Chen static int clk_mt8192_aud_probe(struct platform_device *pdev) 86f61e8348SChun-Jie Chen { 87f61e8348SChun-Jie Chen int r; 88f61e8348SChun-Jie Chen 89*0f69a423SAngeloGioacchino Del Regno r = mtk_clk_simple_probe(pdev); 90f61e8348SChun-Jie Chen if (r) 91f61e8348SChun-Jie Chen return r; 92f61e8348SChun-Jie Chen 93f61e8348SChun-Jie Chen r = devm_of_platform_populate(&pdev->dev); 94f61e8348SChun-Jie Chen if (r) 95*0f69a423SAngeloGioacchino Del Regno mtk_clk_simple_remove(pdev); 96f61e8348SChun-Jie Chen 97f61e8348SChun-Jie Chen return r; 98f61e8348SChun-Jie Chen } 99f61e8348SChun-Jie Chen 100*0f69a423SAngeloGioacchino Del Regno static int clk_mt8192_aud_remove(struct platform_device *pdev) 101*0f69a423SAngeloGioacchino Del Regno { 102*0f69a423SAngeloGioacchino Del Regno of_platform_depopulate(&pdev->dev); 103*0f69a423SAngeloGioacchino Del Regno return mtk_clk_simple_remove(pdev); 104*0f69a423SAngeloGioacchino Del Regno } 105*0f69a423SAngeloGioacchino Del Regno 106f61e8348SChun-Jie Chen static const struct of_device_id of_match_clk_mt8192_aud[] = { 107*0f69a423SAngeloGioacchino Del Regno { .compatible = "mediatek,mt8192-audsys", .data = &aud_desc }, 108*0f69a423SAngeloGioacchino Del Regno { /* sentinel */ } 109f61e8348SChun-Jie Chen }; 110f61e8348SChun-Jie Chen 111f61e8348SChun-Jie Chen static struct platform_driver clk_mt8192_aud_drv = { 112f61e8348SChun-Jie Chen .probe = clk_mt8192_aud_probe, 113*0f69a423SAngeloGioacchino Del Regno .remove = clk_mt8192_aud_remove, 114f61e8348SChun-Jie Chen .driver = { 115f61e8348SChun-Jie Chen .name = "clk-mt8192-aud", 116f61e8348SChun-Jie Chen .of_match_table = of_match_clk_mt8192_aud, 117f61e8348SChun-Jie Chen }, 118f61e8348SChun-Jie Chen }; 119f61e8348SChun-Jie Chen 120f61e8348SChun-Jie Chen builtin_platform_driver(clk_mt8192_aud_drv); 121