1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2022 MediaTek Inc. 4 * Author: Garmin Chang <garmin.chang@mediatek.com> 5 */ 6 7 #include <linux/clk-provider.h> 8 #include <linux/mod_devicetable.h> 9 #include <linux/platform_device.h> 10 11 #include <dt-bindings/clock/mediatek,mt8188-clk.h> 12 13 #include "clk-gate.h" 14 #include "clk-mtk.h" 15 16 static const struct mtk_gate_regs imp_iic_wrap_cg_regs = { 17 .set_ofs = 0xe08, 18 .clr_ofs = 0xe04, 19 .sta_ofs = 0xe00, 20 }; 21 22 #define GATE_IMP_IIC_WRAP(_id, _name, _parent, _shift) \ 23 GATE_MTK_FLAGS(_id, _name, _parent, &imp_iic_wrap_cg_regs, _shift, \ 24 &mtk_clk_gate_ops_setclr, CLK_OPS_PARENT_ENABLE) 25 26 static const struct mtk_gate imp_iic_wrap_c_clks[] = { 27 GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_C_AP_CLOCK_I2C0, 28 "imp_iic_wrap_c_ap_clock_i2c0", "top_i2c", 0), 29 GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_C_AP_CLOCK_I2C2, 30 "imp_iic_wrap_c_ap_clock_i2c2", "top_i2c", 1), 31 GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_C_AP_CLOCK_I2C3, 32 "imp_iic_wrap_c_ap_clock_i2c3", "top_i2c", 2), 33 }; 34 35 static const struct mtk_gate imp_iic_wrap_w_clks[] = { 36 GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_W_AP_CLOCK_I2C1, 37 "imp_iic_wrap_w_ap_clock_i2c1", "top_i2c", 0), 38 GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_W_AP_CLOCK_I2C4, 39 "imp_iic_wrap_w_ap_clock_i2c4", "top_i2c", 1), 40 }; 41 42 static const struct mtk_gate imp_iic_wrap_en_clks[] = { 43 GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_EN_AP_CLOCK_I2C5, 44 "imp_iic_wrap_en_ap_clock_i2c5", "top_i2c", 0), 45 GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_EN_AP_CLOCK_I2C6, 46 "imp_iic_wrap_en_ap_clock_i2c6", "top_i2c", 1), 47 }; 48 49 static const struct mtk_clk_desc imp_iic_wrap_c_desc = { 50 .clks = imp_iic_wrap_c_clks, 51 .num_clks = ARRAY_SIZE(imp_iic_wrap_c_clks), 52 }; 53 54 static const struct mtk_clk_desc imp_iic_wrap_w_desc = { 55 .clks = imp_iic_wrap_w_clks, 56 .num_clks = ARRAY_SIZE(imp_iic_wrap_w_clks), 57 }; 58 59 static const struct mtk_clk_desc imp_iic_wrap_en_desc = { 60 .clks = imp_iic_wrap_en_clks, 61 .num_clks = ARRAY_SIZE(imp_iic_wrap_en_clks), 62 }; 63 64 static const struct of_device_id of_match_clk_mt8188_imp_iic_wrap[] = { 65 { .compatible = "mediatek,mt8188-imp-iic-wrap-c", .data = &imp_iic_wrap_c_desc }, 66 { .compatible = "mediatek,mt8188-imp-iic-wrap-w", .data = &imp_iic_wrap_w_desc }, 67 { .compatible = "mediatek,mt8188-imp-iic-wrap-en", .data = &imp_iic_wrap_en_desc }, 68 { /* sentinel */ } 69 }; 70 MODULE_DEVICE_TABLE(of, of_match_clk_mt8188_imp_iic_wrap); 71 72 static struct platform_driver clk_mt8188_imp_iic_wrap_drv = { 73 .probe = mtk_clk_simple_probe, 74 .remove_new = mtk_clk_simple_remove, 75 .driver = { 76 .name = "clk-mt8188-imp_iic_wrap", 77 .of_match_table = of_match_clk_mt8188_imp_iic_wrap, 78 }, 79 }; 80 81 module_platform_driver(clk_mt8188_imp_iic_wrap_drv); 82 MODULE_LICENSE("GPL"); 83