1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // Copyright (c) 2022 MediaTek Inc.
4 // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
5 
6 #include <linux/clk-provider.h>
7 #include <linux/module.h>
8 #include <linux/platform_device.h>
9 
10 #include "clk-mtk.h"
11 #include "clk-gate.h"
12 
13 #include <dt-bindings/clock/mt8186-clk.h>
14 
15 static const struct mtk_gate_regs vdec0_cg_regs = {
16 	.set_ofs = 0x0,
17 	.clr_ofs = 0x4,
18 	.sta_ofs = 0x0,
19 };
20 
21 static const struct mtk_gate_regs vdec1_cg_regs = {
22 	.set_ofs = 0x190,
23 	.clr_ofs = 0x190,
24 	.sta_ofs = 0x190,
25 };
26 
27 static const struct mtk_gate_regs vdec2_cg_regs = {
28 	.set_ofs = 0x200,
29 	.clr_ofs = 0x204,
30 	.sta_ofs = 0x200,
31 };
32 
33 static const struct mtk_gate_regs vdec3_cg_regs = {
34 	.set_ofs = 0x8,
35 	.clr_ofs = 0xc,
36 	.sta_ofs = 0x8,
37 };
38 
39 #define GATE_VDEC0(_id, _name, _parent, _shift)			\
40 	GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
41 
42 #define GATE_VDEC1(_id, _name, _parent, _shift)			\
43 	GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
44 
45 #define GATE_VDEC2(_id, _name, _parent, _shift)			\
46 	GATE_MTK(_id, _name, _parent, &vdec2_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
47 
48 #define GATE_VDEC3(_id, _name, _parent, _shift)			\
49 	GATE_MTK(_id, _name, _parent, &vdec3_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
50 
51 static const struct mtk_gate vdec_clks[] = {
52 	/* VDEC0 */
53 	GATE_VDEC0(CLK_VDEC_CKEN, "vdec_cken", "top_vdec", 0),
54 	GATE_VDEC0(CLK_VDEC_ACTIVE, "vdec_active", "top_vdec", 4),
55 	GATE_VDEC0(CLK_VDEC_CKEN_ENG, "vdec_cken_eng", "top_vdec", 8),
56 	/* VDEC1 */
57 	GATE_VDEC1(CLK_VDEC_MINI_MDP_CKEN_CFG_RG, "vdec_mini_mdp_cken_cfg_rg", "top_vdec", 0),
58 	/* VDEC2 */
59 	GATE_VDEC2(CLK_VDEC_LAT_CKEN, "vdec_lat_cken", "top_vdec", 0),
60 	GATE_VDEC2(CLK_VDEC_LAT_ACTIVE, "vdec_lat_active", "top_vdec", 4),
61 	GATE_VDEC2(CLK_VDEC_LAT_CKEN_ENG, "vdec_lat_cken_eng", "top_vdec", 8),
62 	/* VDEC3 */
63 	GATE_VDEC3(CLK_VDEC_LARB1_CKEN, "vdec_larb1_cken", "top_vdec", 0),
64 };
65 
66 static const struct mtk_clk_desc vdec_desc = {
67 	.clks = vdec_clks,
68 	.num_clks = ARRAY_SIZE(vdec_clks),
69 };
70 
71 static const struct of_device_id of_match_clk_mt8186_vdec[] = {
72 	{
73 		.compatible = "mediatek,mt8186-vdecsys",
74 		.data = &vdec_desc,
75 	}, {
76 		/* sentinel */
77 	}
78 };
79 MODULE_DEVICE_TABLE(of, of_match_clk_mt8186_vdec);
80 
81 static struct platform_driver clk_mt8186_vdec_drv = {
82 	.probe = mtk_clk_simple_probe,
83 	.remove_new = mtk_clk_simple_remove,
84 	.driver = {
85 		.name = "clk-mt8186-vdec",
86 		.of_match_table = of_match_clk_mt8186_vdec,
87 	},
88 };
89 module_platform_driver(clk_mt8186_vdec_drv);
90 MODULE_LICENSE("GPL");
91