17e23620dSChun-Jie Chen // SPDX-License-Identifier: GPL-2.0-only
27e23620dSChun-Jie Chen //
37e23620dSChun-Jie Chen // Copyright (c) 2022 MediaTek Inc.
47e23620dSChun-Jie Chen // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
57e23620dSChun-Jie Chen 
67e23620dSChun-Jie Chen #include <linux/clk-provider.h>
77e23620dSChun-Jie Chen #include <linux/module.h>
87e23620dSChun-Jie Chen #include <linux/platform_device.h>
97e23620dSChun-Jie Chen 
107e23620dSChun-Jie Chen #include "clk-mtk.h"
117e23620dSChun-Jie Chen #include "clk-gate.h"
127e23620dSChun-Jie Chen 
137e23620dSChun-Jie Chen #include <dt-bindings/clock/mt8186-clk.h>
147e23620dSChun-Jie Chen 
157e23620dSChun-Jie Chen static const struct mtk_gate_regs vdec0_cg_regs = {
167e23620dSChun-Jie Chen 	.set_ofs = 0x0,
177e23620dSChun-Jie Chen 	.clr_ofs = 0x4,
187e23620dSChun-Jie Chen 	.sta_ofs = 0x0,
197e23620dSChun-Jie Chen };
207e23620dSChun-Jie Chen 
217e23620dSChun-Jie Chen static const struct mtk_gate_regs vdec1_cg_regs = {
227e23620dSChun-Jie Chen 	.set_ofs = 0x190,
237e23620dSChun-Jie Chen 	.clr_ofs = 0x190,
247e23620dSChun-Jie Chen 	.sta_ofs = 0x190,
257e23620dSChun-Jie Chen };
267e23620dSChun-Jie Chen 
277e23620dSChun-Jie Chen static const struct mtk_gate_regs vdec2_cg_regs = {
287e23620dSChun-Jie Chen 	.set_ofs = 0x200,
297e23620dSChun-Jie Chen 	.clr_ofs = 0x204,
307e23620dSChun-Jie Chen 	.sta_ofs = 0x200,
317e23620dSChun-Jie Chen };
327e23620dSChun-Jie Chen 
337e23620dSChun-Jie Chen static const struct mtk_gate_regs vdec3_cg_regs = {
347e23620dSChun-Jie Chen 	.set_ofs = 0x8,
357e23620dSChun-Jie Chen 	.clr_ofs = 0xc,
367e23620dSChun-Jie Chen 	.sta_ofs = 0x8,
377e23620dSChun-Jie Chen };
387e23620dSChun-Jie Chen 
397e23620dSChun-Jie Chen #define GATE_VDEC0(_id, _name, _parent, _shift)			\
407e23620dSChun-Jie Chen 	GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
417e23620dSChun-Jie Chen 
427e23620dSChun-Jie Chen #define GATE_VDEC1(_id, _name, _parent, _shift)			\
437e23620dSChun-Jie Chen 	GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
447e23620dSChun-Jie Chen 
457e23620dSChun-Jie Chen #define GATE_VDEC2(_id, _name, _parent, _shift)			\
467e23620dSChun-Jie Chen 	GATE_MTK(_id, _name, _parent, &vdec2_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
477e23620dSChun-Jie Chen 
487e23620dSChun-Jie Chen #define GATE_VDEC3(_id, _name, _parent, _shift)			\
497e23620dSChun-Jie Chen 	GATE_MTK(_id, _name, _parent, &vdec3_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
507e23620dSChun-Jie Chen 
517e23620dSChun-Jie Chen static const struct mtk_gate vdec_clks[] = {
527e23620dSChun-Jie Chen 	/* VDEC0 */
537e23620dSChun-Jie Chen 	GATE_VDEC0(CLK_VDEC_CKEN, "vdec_cken", "top_vdec", 0),
547e23620dSChun-Jie Chen 	GATE_VDEC0(CLK_VDEC_ACTIVE, "vdec_active", "top_vdec", 4),
557e23620dSChun-Jie Chen 	GATE_VDEC0(CLK_VDEC_CKEN_ENG, "vdec_cken_eng", "top_vdec", 8),
567e23620dSChun-Jie Chen 	/* VDEC1 */
577e23620dSChun-Jie Chen 	GATE_VDEC1(CLK_VDEC_MINI_MDP_CKEN_CFG_RG, "vdec_mini_mdp_cken_cfg_rg", "top_vdec", 0),
587e23620dSChun-Jie Chen 	/* VDEC2 */
597e23620dSChun-Jie Chen 	GATE_VDEC2(CLK_VDEC_LAT_CKEN, "vdec_lat_cken", "top_vdec", 0),
607e23620dSChun-Jie Chen 	GATE_VDEC2(CLK_VDEC_LAT_ACTIVE, "vdec_lat_active", "top_vdec", 4),
617e23620dSChun-Jie Chen 	GATE_VDEC2(CLK_VDEC_LAT_CKEN_ENG, "vdec_lat_cken_eng", "top_vdec", 8),
627e23620dSChun-Jie Chen 	/* VDEC3 */
637e23620dSChun-Jie Chen 	GATE_VDEC3(CLK_VDEC_LARB1_CKEN, "vdec_larb1_cken", "top_vdec", 0),
647e23620dSChun-Jie Chen };
657e23620dSChun-Jie Chen 
667e23620dSChun-Jie Chen static const struct mtk_clk_desc vdec_desc = {
677e23620dSChun-Jie Chen 	.clks = vdec_clks,
687e23620dSChun-Jie Chen 	.num_clks = ARRAY_SIZE(vdec_clks),
697e23620dSChun-Jie Chen };
707e23620dSChun-Jie Chen 
717e23620dSChun-Jie Chen static const struct of_device_id of_match_clk_mt8186_vdec[] = {
727e23620dSChun-Jie Chen 	{
737e23620dSChun-Jie Chen 		.compatible = "mediatek,mt8186-vdecsys",
747e23620dSChun-Jie Chen 		.data = &vdec_desc,
757e23620dSChun-Jie Chen 	}, {
767e23620dSChun-Jie Chen 		/* sentinel */
777e23620dSChun-Jie Chen 	}
787e23620dSChun-Jie Chen };
7965c9ad77SAngeloGioacchino Del Regno MODULE_DEVICE_TABLE(of, of_match_clk_mt8186_vdec);
807e23620dSChun-Jie Chen 
817e23620dSChun-Jie Chen static struct platform_driver clk_mt8186_vdec_drv = {
827e23620dSChun-Jie Chen 	.probe = mtk_clk_simple_probe,
83*61ca6ee7SUwe Kleine-König 	.remove_new = mtk_clk_simple_remove,
847e23620dSChun-Jie Chen 	.driver = {
857e23620dSChun-Jie Chen 		.name = "clk-mt8186-vdec",
867e23620dSChun-Jie Chen 		.of_match_table = of_match_clk_mt8186_vdec,
877e23620dSChun-Jie Chen 	},
887e23620dSChun-Jie Chen };
89164d240dSAngeloGioacchino Del Regno module_platform_driver(clk_mt8186_vdec_drv);
90a451da86SAngeloGioacchino Del Regno MODULE_LICENSE("GPL");
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