1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (c) 2020 MediaTek Inc.
4  * Copyright (c) 2020 BayLibre, SAS
5  * Author: James Liao <jamesjj.liao@mediatek.com>
6  *         Fabien Parent <fparent@baylibre.com>
7  */
8 
9 #include <linux/clk-provider.h>
10 #include <linux/of.h>
11 #include <linux/of_address.h>
12 #include <linux/of_device.h>
13 #include <linux/platform_device.h>
14 
15 #include "clk-mtk.h"
16 #include "clk-gate.h"
17 
18 #include <dt-bindings/clock/mt8167-clk.h>
19 
20 static const struct mtk_gate_regs vdec0_cg_regs = {
21 	.set_ofs = 0x0,
22 	.clr_ofs = 0x4,
23 	.sta_ofs = 0x0,
24 };
25 
26 static const struct mtk_gate_regs vdec1_cg_regs = {
27 	.set_ofs = 0x8,
28 	.clr_ofs = 0xc,
29 	.sta_ofs = 0x8,
30 };
31 
32 #define GATE_VDEC0_I(_id, _name, _parent, _shift)			\
33 	GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
34 
35 #define GATE_VDEC1_I(_id, _name, _parent, _shift)			\
36 	GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
37 
38 static const struct mtk_gate vdec_clks[] = {
39 	/* VDEC0 */
40 	GATE_VDEC0_I(CLK_VDEC_CKEN, "vdec_cken", "rg_vdec", 0),
41 	/* VDEC1 */
42 	GATE_VDEC1_I(CLK_VDEC_LARB1_CKEN, "vdec_larb1_cken", "smi_mm", 0),
43 };
44 
45 static const struct mtk_clk_desc vdec_desc = {
46 	.clks = vdec_clks,
47 	.num_clks = ARRAY_SIZE(vdec_clks),
48 };
49 
50 static const struct of_device_id of_match_clk_mt8167_vdec[] = {
51 	{ .compatible = "mediatek,mt8167-vdecsys", .data = &vdec_desc },
52 	{ /* sentinel */ }
53 };
54 MODULE_DEVICE_TABLE(of, of_match_clk_mt8167_vdec);
55 
56 static struct platform_driver clk_mt8167_vdec_drv = {
57 	.probe = mtk_clk_simple_probe,
58 	.remove = mtk_clk_simple_remove,
59 	.driver = {
60 		.name = "clk-mt8167-vdecsys",
61 		.of_match_table = of_match_clk_mt8167_vdec,
62 	},
63 };
64 module_platform_driver(clk_mt8167_vdec_drv);
65 MODULE_LICENSE("GPL");
66