1a6822483SFabien Parent // SPDX-License-Identifier: GPL-2.0 2a6822483SFabien Parent /* 3a6822483SFabien Parent * Copyright (c) 2020 MediaTek Inc. 4a6822483SFabien Parent * Copyright (c) 2020 BayLibre, SAS 5a6822483SFabien Parent * Author: James Liao <jamesjj.liao@mediatek.com> 6a6822483SFabien Parent * Fabien Parent <fparent@baylibre.com> 7a6822483SFabien Parent */ 8a6822483SFabien Parent 9a6822483SFabien Parent #include <linux/clk-provider.h> 10a6822483SFabien Parent #include <linux/of.h> 11a6822483SFabien Parent #include <linux/of_address.h> 12a6822483SFabien Parent #include <linux/of_device.h> 13a6822483SFabien Parent #include <linux/platform_device.h> 14a6822483SFabien Parent 15a6822483SFabien Parent #include "clk-mtk.h" 16a6822483SFabien Parent #include "clk-gate.h" 17a6822483SFabien Parent 18a6822483SFabien Parent #include <dt-bindings/clock/mt8167-clk.h> 19a6822483SFabien Parent 20a6822483SFabien Parent static const struct mtk_gate_regs aud_cg_regs = { 21a6822483SFabien Parent .set_ofs = 0x0, 22a6822483SFabien Parent .clr_ofs = 0x0, 23a6822483SFabien Parent .sta_ofs = 0x0, 24a6822483SFabien Parent }; 25a6822483SFabien Parent 264c85e20bSAngeloGioacchino Del Regno #define GATE_AUD(_id, _name, _parent, _shift) \ 274c85e20bSAngeloGioacchino Del Regno GATE_MTK(_id, _name, _parent, &aud_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr) 284c85e20bSAngeloGioacchino Del Regno 29a6822483SFabien Parent 30b4bd678fSAngeloGioacchino Del Regno static const struct mtk_gate aud_clks[] = { 31a6822483SFabien Parent GATE_AUD(CLK_AUD_AFE, "aud_afe", "clk26m_ck", 2), 32a6822483SFabien Parent GATE_AUD(CLK_AUD_I2S, "aud_i2s", "i2s_infra_bck", 6), 33a6822483SFabien Parent GATE_AUD(CLK_AUD_22M, "aud_22m", "rg_aud_engen1", 8), 34a6822483SFabien Parent GATE_AUD(CLK_AUD_24M, "aud_24m", "rg_aud_engen2", 9), 35a6822483SFabien Parent GATE_AUD(CLK_AUD_INTDIR, "aud_intdir", "rg_aud_spdif_in", 15), 36a6822483SFabien Parent GATE_AUD(CLK_AUD_APLL2_TUNER, "aud_apll2_tuner", "rg_aud_engen2", 18), 37a6822483SFabien Parent GATE_AUD(CLK_AUD_APLL_TUNER, "aud_apll_tuner", "rg_aud_engen1", 19), 38a6822483SFabien Parent GATE_AUD(CLK_AUD_HDMI, "aud_hdmi", "apll12_div4", 20), 39a6822483SFabien Parent GATE_AUD(CLK_AUD_SPDF, "aud_spdf", "apll12_div6", 21), 40a6822483SFabien Parent GATE_AUD(CLK_AUD_ADC, "aud_adc", "aud_afe", 24), 41a6822483SFabien Parent GATE_AUD(CLK_AUD_DAC, "aud_dac", "aud_afe", 25), 42a6822483SFabien Parent GATE_AUD(CLK_AUD_DAC_PREDIS, "aud_dac_predis", "aud_afe", 26), 43a6822483SFabien Parent GATE_AUD(CLK_AUD_TML, "aud_tml", "aud_afe", 27), 44a6822483SFabien Parent }; 45a6822483SFabien Parent 46beb47f19SAngeloGioacchino Del Regno static const struct mtk_clk_desc aud_desc = { 47beb47f19SAngeloGioacchino Del Regno .clks = aud_clks, 48beb47f19SAngeloGioacchino Del Regno .num_clks = ARRAY_SIZE(aud_clks), 49beb47f19SAngeloGioacchino Del Regno }; 50a6822483SFabien Parent 51beb47f19SAngeloGioacchino Del Regno static const struct of_device_id of_match_clk_mt8167_audsys[] = { 52beb47f19SAngeloGioacchino Del Regno { .compatible = "mediatek,mt8167-audsys", .data = &aud_desc }, 53beb47f19SAngeloGioacchino Del Regno { /* sentinel */ } 54beb47f19SAngeloGioacchino Del Regno }; 55*65c9ad77SAngeloGioacchino Del Regno MODULE_DEVICE_TABLE(of, of_match_clk_mt8167_audsys); 56a6822483SFabien Parent 57beb47f19SAngeloGioacchino Del Regno static struct platform_driver clk_mt8167_audsys_drv = { 58beb47f19SAngeloGioacchino Del Regno .probe = mtk_clk_simple_probe, 59beb47f19SAngeloGioacchino Del Regno .remove = mtk_clk_simple_remove, 60beb47f19SAngeloGioacchino Del Regno .driver = { 61beb47f19SAngeloGioacchino Del Regno .name = "clk-mt8167-audsys", 62beb47f19SAngeloGioacchino Del Regno .of_match_table = of_match_clk_mt8167_audsys, 63beb47f19SAngeloGioacchino Del Regno }, 64beb47f19SAngeloGioacchino Del Regno }; 65beb47f19SAngeloGioacchino Del Regno module_platform_driver(clk_mt8167_audsys_drv); 66a451da86SAngeloGioacchino Del Regno MODULE_LICENSE("GPL"); 67