11802d0beSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 22fc0a509SSean Wang /* 32fc0a509SSean Wang * Copyright (c) 2017 MediaTek Inc. 42fc0a509SSean Wang * Author: Chen Zhong <chen.zhong@mediatek.com> 52fc0a509SSean Wang * Sean Wang <sean.wang@mediatek.com> 62fc0a509SSean Wang */ 72fc0a509SSean Wang 82fc0a509SSean Wang #include <linux/clk-provider.h> 92fc0a509SSean Wang #include <linux/of.h> 102fc0a509SSean Wang #include <linux/of_address.h> 112fc0a509SSean Wang #include <linux/of_device.h> 122fc0a509SSean Wang #include <linux/platform_device.h> 132fc0a509SSean Wang 142fc0a509SSean Wang #include "clk-mtk.h" 152fc0a509SSean Wang #include "clk-gate.h" 162fc0a509SSean Wang 172fc0a509SSean Wang #include <dt-bindings/clock/mt7622-clk.h> 182fc0a509SSean Wang 194c85e20bSAngeloGioacchino Del Regno #define GATE_ETH(_id, _name, _parent, _shift) \ 204c85e20bSAngeloGioacchino Del Regno GATE_MTK(_id, _name, _parent, ð_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv) 212fc0a509SSean Wang 222fc0a509SSean Wang static const struct mtk_gate_regs eth_cg_regs = { 232fc0a509SSean Wang .set_ofs = 0x30, 242fc0a509SSean Wang .clr_ofs = 0x30, 252fc0a509SSean Wang .sta_ofs = 0x30, 262fc0a509SSean Wang }; 272fc0a509SSean Wang 282fc0a509SSean Wang static const struct mtk_gate eth_clks[] = { 292fc0a509SSean Wang GATE_ETH(CLK_ETH_HSDMA_EN, "eth_hsdma_en", "eth_sel", 5), 302fc0a509SSean Wang GATE_ETH(CLK_ETH_ESW_EN, "eth_esw_en", "eth_500m", 6), 312fc0a509SSean Wang GATE_ETH(CLK_ETH_GP2_EN, "eth_gp2_en", "txclk_src_pre", 7), 322fc0a509SSean Wang GATE_ETH(CLK_ETH_GP1_EN, "eth_gp1_en", "txclk_src_pre", 8), 332fc0a509SSean Wang GATE_ETH(CLK_ETH_GP0_EN, "eth_gp0_en", "txclk_src_pre", 9), 342fc0a509SSean Wang }; 352fc0a509SSean Wang 362fc0a509SSean Wang static const struct mtk_gate_regs sgmii_cg_regs = { 372fc0a509SSean Wang .set_ofs = 0xE4, 382fc0a509SSean Wang .clr_ofs = 0xE4, 392fc0a509SSean Wang .sta_ofs = 0xE4, 402fc0a509SSean Wang }; 412fc0a509SSean Wang 424c85e20bSAngeloGioacchino Del Regno #define GATE_SGMII(_id, _name, _parent, _shift) \ 434c85e20bSAngeloGioacchino Del Regno GATE_MTK(_id, _name, _parent, &sgmii_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv) 442fc0a509SSean Wang 452fc0a509SSean Wang static const struct mtk_gate sgmii_clks[] = { 462fc0a509SSean Wang GATE_SGMII(CLK_SGMII_TX250M_EN, "sgmii_tx250m_en", 472fc0a509SSean Wang "ssusb_tx250m", 2), 482fc0a509SSean Wang GATE_SGMII(CLK_SGMII_RX250M_EN, "sgmii_rx250m_en", 492fc0a509SSean Wang "ssusb_eq_rx250m", 3), 502fc0a509SSean Wang GATE_SGMII(CLK_SGMII_CDR_REF, "sgmii_cdr_ref", 512fc0a509SSean Wang "ssusb_cdr_ref", 4), 522fc0a509SSean Wang GATE_SGMII(CLK_SGMII_CDR_FB, "sgmii_cdr_fb", 532fc0a509SSean Wang "ssusb_cdr_fb", 5), 542fc0a509SSean Wang }; 552fc0a509SSean Wang 56723e3671SRex-BC Chen static u16 rst_ofs[] = { 0x34, }; 57723e3671SRex-BC Chen 582d2a2900SRex-BC Chen static const struct mtk_clk_rst_desc clk_rst_desc = { 592d2a2900SRex-BC Chen .version = MTK_RST_SIMPLE, 60723e3671SRex-BC Chen .rst_bank_ofs = rst_ofs, 61723e3671SRex-BC Chen .rst_bank_nr = ARRAY_SIZE(rst_ofs), 622d2a2900SRex-BC Chen }; 632d2a2900SRex-BC Chen 640f69a423SAngeloGioacchino Del Regno static const struct mtk_clk_desc eth_desc = { 650f69a423SAngeloGioacchino Del Regno .clks = eth_clks, 660f69a423SAngeloGioacchino Del Regno .num_clks = ARRAY_SIZE(eth_clks), 670f69a423SAngeloGioacchino Del Regno .rst_desc = &clk_rst_desc, 682fc0a509SSean Wang }; 692fc0a509SSean Wang 700f69a423SAngeloGioacchino Del Regno static const struct mtk_clk_desc sgmii_desc = { 710f69a423SAngeloGioacchino Del Regno .clks = sgmii_clks, 720f69a423SAngeloGioacchino Del Regno .num_clks = ARRAY_SIZE(sgmii_clks), 730f69a423SAngeloGioacchino Del Regno }; 742fc0a509SSean Wang 750f69a423SAngeloGioacchino Del Regno static const struct of_device_id of_match_clk_mt7622_eth[] = { 760f69a423SAngeloGioacchino Del Regno { .compatible = "mediatek,mt7622-ethsys", .data = ð_desc }, 770f69a423SAngeloGioacchino Del Regno { .compatible = "mediatek,mt7622-sgmiisys", .data = &sgmii_desc }, 780f69a423SAngeloGioacchino Del Regno { /* sentinel */ } 790f69a423SAngeloGioacchino Del Regno }; 802fc0a509SSean Wang 812fc0a509SSean Wang static struct platform_driver clk_mt7622_eth_drv = { 820f69a423SAngeloGioacchino Del Regno .probe = mtk_clk_simple_probe, 830f69a423SAngeloGioacchino Del Regno .remove = mtk_clk_simple_remove, 842fc0a509SSean Wang .driver = { 852fc0a509SSean Wang .name = "clk-mt7622-eth", 862fc0a509SSean Wang .of_match_table = of_match_clk_mt7622_eth, 872fc0a509SSean Wang }, 882fc0a509SSean Wang }; 89*164d240dSAngeloGioacchino Del Regno module_platform_driver(clk_mt7622_eth_drv); 90