11802d0beSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
296596aa0SKevin-CW Chen /*
396596aa0SKevin-CW Chen  * Copyright (c) 2017 MediaTek Inc.
496596aa0SKevin-CW Chen  * Author: Kevin-CW Chen <kevin-cw.chen@mediatek.com>
596596aa0SKevin-CW Chen  */
696596aa0SKevin-CW Chen 
796596aa0SKevin-CW Chen #include <linux/clk-provider.h>
896596aa0SKevin-CW Chen #include <linux/platform_device.h>
996596aa0SKevin-CW Chen 
1096596aa0SKevin-CW Chen #include "clk-mtk.h"
1196596aa0SKevin-CW Chen #include "clk-gate.h"
1296596aa0SKevin-CW Chen 
1396596aa0SKevin-CW Chen #include <dt-bindings/clock/mt6797-clk.h>
1496596aa0SKevin-CW Chen 
1596596aa0SKevin-CW Chen static const struct mtk_gate_regs vdec0_cg_regs = {
1696596aa0SKevin-CW Chen 	.set_ofs = 0x0000,
1796596aa0SKevin-CW Chen 	.clr_ofs = 0x0004,
1896596aa0SKevin-CW Chen 	.sta_ofs = 0x0000,
1996596aa0SKevin-CW Chen };
2096596aa0SKevin-CW Chen 
2196596aa0SKevin-CW Chen static const struct mtk_gate_regs vdec1_cg_regs = {
2296596aa0SKevin-CW Chen 	.set_ofs = 0x0008,
2396596aa0SKevin-CW Chen 	.clr_ofs = 0x000c,
2496596aa0SKevin-CW Chen 	.sta_ofs = 0x0008,
2596596aa0SKevin-CW Chen };
2696596aa0SKevin-CW Chen 
2796596aa0SKevin-CW Chen #define GATE_VDEC0(_id, _name, _parent, _shift) {		\
2896596aa0SKevin-CW Chen 	.id = _id,					\
2996596aa0SKevin-CW Chen 	.name = _name,					\
3096596aa0SKevin-CW Chen 	.parent_name = _parent,				\
3196596aa0SKevin-CW Chen 	.regs = &vdec0_cg_regs,				\
3296596aa0SKevin-CW Chen 	.shift = _shift,				\
3396596aa0SKevin-CW Chen 	.ops = &mtk_clk_gate_ops_setclr_inv,		\
3496596aa0SKevin-CW Chen }
3596596aa0SKevin-CW Chen 
3696596aa0SKevin-CW Chen #define GATE_VDEC1(_id, _name, _parent, _shift) {		\
3796596aa0SKevin-CW Chen 	.id = _id,					\
3896596aa0SKevin-CW Chen 	.name = _name,					\
3996596aa0SKevin-CW Chen 	.parent_name = _parent,				\
4096596aa0SKevin-CW Chen 	.regs = &vdec1_cg_regs,				\
4196596aa0SKevin-CW Chen 	.shift = _shift,				\
4296596aa0SKevin-CW Chen 	.ops = &mtk_clk_gate_ops_setclr_inv,		\
4396596aa0SKevin-CW Chen }
4496596aa0SKevin-CW Chen 
4596596aa0SKevin-CW Chen static const struct mtk_gate vdec_clks[] = {
4696596aa0SKevin-CW Chen 	GATE_VDEC0(CLK_VDEC_CKEN_ENG, "vdec_cken_eng", "vdec_sel", 8),
4796596aa0SKevin-CW Chen 	GATE_VDEC0(CLK_VDEC_ACTIVE, "vdec_active", "vdec_sel", 4),
4896596aa0SKevin-CW Chen 	GATE_VDEC0(CLK_VDEC_CKEN, "vdec_cken", "vdec_sel", 0),
4996596aa0SKevin-CW Chen 	GATE_VDEC1(CLK_VDEC_LARB1_CKEN, "vdec_larb1_cken", "mm_sel", 0),
5096596aa0SKevin-CW Chen };
5196596aa0SKevin-CW Chen 
52*a481c6c7SMiles Chen static const struct mtk_clk_desc vdec_desc = {
53*a481c6c7SMiles Chen 	.clks = vdec_clks,
54*a481c6c7SMiles Chen 	.num_clks = ARRAY_SIZE(vdec_clks),
5596596aa0SKevin-CW Chen };
5696596aa0SKevin-CW Chen 
57*a481c6c7SMiles Chen static const struct of_device_id of_match_clk_mt6797_vdec[] = {
5896596aa0SKevin-CW Chen 	{
59*a481c6c7SMiles Chen 		.compatible = "mediatek,mt6797-vdecsys",
60*a481c6c7SMiles Chen 		.data = &vdec_desc,
61*a481c6c7SMiles Chen 	}, {
62*a481c6c7SMiles Chen 		/* sentinel */
6396596aa0SKevin-CW Chen 	}
64*a481c6c7SMiles Chen };
6596596aa0SKevin-CW Chen 
6696596aa0SKevin-CW Chen static struct platform_driver clk_mt6797_vdec_drv = {
67*a481c6c7SMiles Chen 	.probe = mtk_clk_simple_probe,
68*a481c6c7SMiles Chen 	.remove = mtk_clk_simple_remove,
6996596aa0SKevin-CW Chen 	.driver = {
7096596aa0SKevin-CW Chen 		.name = "clk-mt6797-vdec",
7196596aa0SKevin-CW Chen 		.of_match_table = of_match_clk_mt6797_vdec,
7296596aa0SKevin-CW Chen 	},
7396596aa0SKevin-CW Chen };
7496596aa0SKevin-CW Chen 
7596596aa0SKevin-CW Chen builtin_platform_driver(clk_mt6797_vdec_drv);
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