196596aa0SKevin-CW Chen /*
296596aa0SKevin-CW Chen  * Copyright (c) 2017 MediaTek Inc.
396596aa0SKevin-CW Chen  * Author: Kevin-CW Chen <kevin-cw.chen@mediatek.com>
496596aa0SKevin-CW Chen  *
596596aa0SKevin-CW Chen  * This program is free software; you can redistribute it and/or modify
696596aa0SKevin-CW Chen  * it under the terms of the GNU General Public License version 2 as
796596aa0SKevin-CW Chen  * published by the Free Software Foundation.
896596aa0SKevin-CW Chen  *
996596aa0SKevin-CW Chen  * This program is distributed in the hope that it will be useful,
1096596aa0SKevin-CW Chen  * but WITHOUT ANY WARRANTY; without even the implied warranty of
1196596aa0SKevin-CW Chen  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
1296596aa0SKevin-CW Chen  * GNU General Public License for more details.
1396596aa0SKevin-CW Chen  */
1496596aa0SKevin-CW Chen 
1596596aa0SKevin-CW Chen #include <linux/clk-provider.h>
1696596aa0SKevin-CW Chen #include <linux/platform_device.h>
1796596aa0SKevin-CW Chen 
1896596aa0SKevin-CW Chen #include "clk-mtk.h"
1996596aa0SKevin-CW Chen #include "clk-gate.h"
2096596aa0SKevin-CW Chen 
2196596aa0SKevin-CW Chen #include <dt-bindings/clock/mt6797-clk.h>
2296596aa0SKevin-CW Chen 
2396596aa0SKevin-CW Chen static const struct mtk_gate_regs vdec0_cg_regs = {
2496596aa0SKevin-CW Chen 	.set_ofs = 0x0000,
2596596aa0SKevin-CW Chen 	.clr_ofs = 0x0004,
2696596aa0SKevin-CW Chen 	.sta_ofs = 0x0000,
2796596aa0SKevin-CW Chen };
2896596aa0SKevin-CW Chen 
2996596aa0SKevin-CW Chen static const struct mtk_gate_regs vdec1_cg_regs = {
3096596aa0SKevin-CW Chen 	.set_ofs = 0x0008,
3196596aa0SKevin-CW Chen 	.clr_ofs = 0x000c,
3296596aa0SKevin-CW Chen 	.sta_ofs = 0x0008,
3396596aa0SKevin-CW Chen };
3496596aa0SKevin-CW Chen 
3596596aa0SKevin-CW Chen #define GATE_VDEC0(_id, _name, _parent, _shift) {		\
3696596aa0SKevin-CW Chen 	.id = _id,					\
3796596aa0SKevin-CW Chen 	.name = _name,					\
3896596aa0SKevin-CW Chen 	.parent_name = _parent,				\
3996596aa0SKevin-CW Chen 	.regs = &vdec0_cg_regs,				\
4096596aa0SKevin-CW Chen 	.shift = _shift,				\
4196596aa0SKevin-CW Chen 	.ops = &mtk_clk_gate_ops_setclr_inv,		\
4296596aa0SKevin-CW Chen }
4396596aa0SKevin-CW Chen 
4496596aa0SKevin-CW Chen #define GATE_VDEC1(_id, _name, _parent, _shift) {		\
4596596aa0SKevin-CW Chen 	.id = _id,					\
4696596aa0SKevin-CW Chen 	.name = _name,					\
4796596aa0SKevin-CW Chen 	.parent_name = _parent,				\
4896596aa0SKevin-CW Chen 	.regs = &vdec1_cg_regs,				\
4996596aa0SKevin-CW Chen 	.shift = _shift,				\
5096596aa0SKevin-CW Chen 	.ops = &mtk_clk_gate_ops_setclr_inv,		\
5196596aa0SKevin-CW Chen }
5296596aa0SKevin-CW Chen 
5396596aa0SKevin-CW Chen static const struct mtk_gate vdec_clks[] = {
5496596aa0SKevin-CW Chen 	GATE_VDEC0(CLK_VDEC_CKEN_ENG, "vdec_cken_eng", "vdec_sel", 8),
5596596aa0SKevin-CW Chen 	GATE_VDEC0(CLK_VDEC_ACTIVE, "vdec_active", "vdec_sel", 4),
5696596aa0SKevin-CW Chen 	GATE_VDEC0(CLK_VDEC_CKEN, "vdec_cken", "vdec_sel", 0),
5796596aa0SKevin-CW Chen 	GATE_VDEC1(CLK_VDEC_LARB1_CKEN, "vdec_larb1_cken", "mm_sel", 0),
5896596aa0SKevin-CW Chen };
5996596aa0SKevin-CW Chen 
6096596aa0SKevin-CW Chen static const struct of_device_id of_match_clk_mt6797_vdec[] = {
6196596aa0SKevin-CW Chen 	{ .compatible = "mediatek,mt6797-vdecsys", },
6296596aa0SKevin-CW Chen 	{}
6396596aa0SKevin-CW Chen };
6496596aa0SKevin-CW Chen 
6596596aa0SKevin-CW Chen static int clk_mt6797_vdec_probe(struct platform_device *pdev)
6696596aa0SKevin-CW Chen {
6796596aa0SKevin-CW Chen 	struct clk_onecell_data *clk_data;
6896596aa0SKevin-CW Chen 	int r;
6996596aa0SKevin-CW Chen 	struct device_node *node = pdev->dev.of_node;
7096596aa0SKevin-CW Chen 
7196596aa0SKevin-CW Chen 	clk_data = mtk_alloc_clk_data(CLK_VDEC_NR);
7296596aa0SKevin-CW Chen 
7396596aa0SKevin-CW Chen 	mtk_clk_register_gates(node, vdec_clks, ARRAY_SIZE(vdec_clks),
7496596aa0SKevin-CW Chen 			       clk_data);
7596596aa0SKevin-CW Chen 
7696596aa0SKevin-CW Chen 	r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
7796596aa0SKevin-CW Chen 	if (r)
7896596aa0SKevin-CW Chen 		dev_err(&pdev->dev,
7996596aa0SKevin-CW Chen 			"could not register clock provider: %s: %d\n",
8096596aa0SKevin-CW Chen 			pdev->name, r);
8196596aa0SKevin-CW Chen 
8296596aa0SKevin-CW Chen 	return r;
8396596aa0SKevin-CW Chen }
8496596aa0SKevin-CW Chen 
8596596aa0SKevin-CW Chen static struct platform_driver clk_mt6797_vdec_drv = {
8696596aa0SKevin-CW Chen 	.probe = clk_mt6797_vdec_probe,
8796596aa0SKevin-CW Chen 	.driver = {
8896596aa0SKevin-CW Chen 		.name = "clk-mt6797-vdec",
8996596aa0SKevin-CW Chen 		.of_match_table = of_match_clk_mt6797_vdec,
9096596aa0SKevin-CW Chen 	},
9196596aa0SKevin-CW Chen };
9296596aa0SKevin-CW Chen 
9396596aa0SKevin-CW Chen builtin_platform_driver(clk_mt6797_vdec_drv);
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