196596aa0SKevin-CW Chen /* Copyright (c) 2017 MediaTek Inc. 296596aa0SKevin-CW Chen * Author: Kevin Chen <kevin-cw.chen@mediatek.com> 396596aa0SKevin-CW Chen * 496596aa0SKevin-CW Chen * This program is free software; you can redistribute it and/or modify 596596aa0SKevin-CW Chen * it under the terms of the GNU General Public License version 2 as 696596aa0SKevin-CW Chen * published by the Free Software Foundation. 796596aa0SKevin-CW Chen * 896596aa0SKevin-CW Chen * This program is distributed in the hope that it will be useful, 996596aa0SKevin-CW Chen * but WITHOUT ANY WARRANTY; without even the implied warranty of 1096596aa0SKevin-CW Chen * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1196596aa0SKevin-CW Chen * GNU General Public License for more details. 1296596aa0SKevin-CW Chen */ 1396596aa0SKevin-CW Chen 1496596aa0SKevin-CW Chen #include <linux/clk-provider.h> 1596596aa0SKevin-CW Chen #include <linux/platform_device.h> 1696596aa0SKevin-CW Chen #include <dt-bindings/clock/mt6797-clk.h> 1796596aa0SKevin-CW Chen 1896596aa0SKevin-CW Chen #include "clk-mtk.h" 1996596aa0SKevin-CW Chen #include "clk-gate.h" 2096596aa0SKevin-CW Chen 2196596aa0SKevin-CW Chen static const struct mtk_gate_regs img_cg_regs = { 2296596aa0SKevin-CW Chen .set_ofs = 0x0004, 2396596aa0SKevin-CW Chen .clr_ofs = 0x0008, 2496596aa0SKevin-CW Chen .sta_ofs = 0x0000, 2596596aa0SKevin-CW Chen }; 2696596aa0SKevin-CW Chen 2796596aa0SKevin-CW Chen #define GATE_IMG(_id, _name, _parent, _shift) { \ 2896596aa0SKevin-CW Chen .id = _id, \ 2996596aa0SKevin-CW Chen .name = _name, \ 3096596aa0SKevin-CW Chen .parent_name = _parent, \ 3196596aa0SKevin-CW Chen .regs = &img_cg_regs, \ 3296596aa0SKevin-CW Chen .shift = _shift, \ 3396596aa0SKevin-CW Chen .ops = &mtk_clk_gate_ops_setclr, \ 3496596aa0SKevin-CW Chen } 3596596aa0SKevin-CW Chen 3696596aa0SKevin-CW Chen static const struct mtk_gate img_clks[] = { 3796596aa0SKevin-CW Chen GATE_IMG(CLK_IMG_FDVT, "img_fdvt", "mm_sel", 11), 3896596aa0SKevin-CW Chen GATE_IMG(CLK_IMG_DPE, "img_dpe", "mm_sel", 10), 3996596aa0SKevin-CW Chen GATE_IMG(CLK_IMG_DIP, "img_dip", "mm_sel", 6), 4096596aa0SKevin-CW Chen GATE_IMG(CLK_IMG_LARB6, "img_larb6", "mm_sel", 0), 4196596aa0SKevin-CW Chen }; 4296596aa0SKevin-CW Chen 4396596aa0SKevin-CW Chen static const struct of_device_id of_match_clk_mt6797_img[] = { 4496596aa0SKevin-CW Chen { .compatible = "mediatek,mt6797-imgsys", }, 4596596aa0SKevin-CW Chen {} 4696596aa0SKevin-CW Chen }; 4796596aa0SKevin-CW Chen 4896596aa0SKevin-CW Chen static int clk_mt6797_img_probe(struct platform_device *pdev) 4996596aa0SKevin-CW Chen { 5096596aa0SKevin-CW Chen struct clk_onecell_data *clk_data; 5196596aa0SKevin-CW Chen int r; 5296596aa0SKevin-CW Chen struct device_node *node = pdev->dev.of_node; 5396596aa0SKevin-CW Chen 5496596aa0SKevin-CW Chen clk_data = mtk_alloc_clk_data(CLK_IMG_NR); 5596596aa0SKevin-CW Chen 5696596aa0SKevin-CW Chen mtk_clk_register_gates(node, img_clks, ARRAY_SIZE(img_clks), 5796596aa0SKevin-CW Chen clk_data); 5896596aa0SKevin-CW Chen 5996596aa0SKevin-CW Chen r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); 6096596aa0SKevin-CW Chen if (r) 6196596aa0SKevin-CW Chen dev_err(&pdev->dev, 6296596aa0SKevin-CW Chen "could not register clock provider: %s: %d\n", 6396596aa0SKevin-CW Chen pdev->name, r); 6496596aa0SKevin-CW Chen 6596596aa0SKevin-CW Chen return r; 6696596aa0SKevin-CW Chen } 6796596aa0SKevin-CW Chen 6896596aa0SKevin-CW Chen static struct platform_driver clk_mt6797_img_drv = { 6996596aa0SKevin-CW Chen .probe = clk_mt6797_img_probe, 7096596aa0SKevin-CW Chen .driver = { 7196596aa0SKevin-CW Chen .name = "clk-mt6797-img", 7296596aa0SKevin-CW Chen .of_match_table = of_match_clk_mt6797_img, 7396596aa0SKevin-CW Chen }, 7496596aa0SKevin-CW Chen }; 7596596aa0SKevin-CW Chen 7696596aa0SKevin-CW Chen builtin_platform_driver(clk_mt6797_img_drv); 77