1710774e0Smtk01761 // SPDX-License-Identifier: GPL-2.0 2710774e0Smtk01761 /* 3710774e0Smtk01761 * Copyright (c) 2019 MediaTek Inc. 4710774e0Smtk01761 * Author: Wendell Lin <wendell.lin@mediatek.com> 5710774e0Smtk01761 */ 6710774e0Smtk01761 7710774e0Smtk01761 #include <linux/clk-provider.h> 8710774e0Smtk01761 #include <linux/of.h> 9710774e0Smtk01761 #include <linux/of_address.h> 10710774e0Smtk01761 #include <linux/of_device.h> 11710774e0Smtk01761 #include <linux/platform_device.h> 12710774e0Smtk01761 13710774e0Smtk01761 #include "clk-mtk.h" 14710774e0Smtk01761 #include "clk-gate.h" 15710774e0Smtk01761 16710774e0Smtk01761 #include <dt-bindings/clock/mt6779-clk.h> 17710774e0Smtk01761 18710774e0Smtk01761 static const struct mtk_gate_regs audio0_cg_regs = { 19710774e0Smtk01761 .set_ofs = 0x0, 20710774e0Smtk01761 .clr_ofs = 0x0, 21710774e0Smtk01761 .sta_ofs = 0x0, 22710774e0Smtk01761 }; 23710774e0Smtk01761 24710774e0Smtk01761 static const struct mtk_gate_regs audio1_cg_regs = { 25710774e0Smtk01761 .set_ofs = 0x4, 26710774e0Smtk01761 .clr_ofs = 0x4, 27710774e0Smtk01761 .sta_ofs = 0x4, 28710774e0Smtk01761 }; 29710774e0Smtk01761 30710774e0Smtk01761 #define GATE_AUDIO0(_id, _name, _parent, _shift) \ 31710774e0Smtk01761 GATE_MTK(_id, _name, _parent, &audio0_cg_regs, _shift, \ 32710774e0Smtk01761 &mtk_clk_gate_ops_no_setclr) 33710774e0Smtk01761 #define GATE_AUDIO1(_id, _name, _parent, _shift) \ 34710774e0Smtk01761 GATE_MTK(_id, _name, _parent, &audio1_cg_regs, _shift, \ 35710774e0Smtk01761 &mtk_clk_gate_ops_no_setclr) 36710774e0Smtk01761 37710774e0Smtk01761 static const struct mtk_gate audio_clks[] = { 38710774e0Smtk01761 /* AUDIO0 */ 39710774e0Smtk01761 GATE_AUDIO0(CLK_AUD_AFE, "aud_afe", "audio_sel", 2), 40710774e0Smtk01761 GATE_AUDIO0(CLK_AUD_22M, "aud_22m", "aud_eng1_sel", 8), 41710774e0Smtk01761 GATE_AUDIO0(CLK_AUD_24M, "aud_24m", "aud_eng2_sel", 9), 42710774e0Smtk01761 GATE_AUDIO0(CLK_AUD_APLL2_TUNER, "aud_apll2_tuner", 43710774e0Smtk01761 "aud_eng2_sel", 18), 44710774e0Smtk01761 GATE_AUDIO0(CLK_AUD_APLL_TUNER, "aud_apll_tuner", 45710774e0Smtk01761 "aud_eng1_sel", 19), 46710774e0Smtk01761 GATE_AUDIO0(CLK_AUD_TDM, "aud_tdm", "aud_eng1_sel", 20), 47710774e0Smtk01761 GATE_AUDIO0(CLK_AUD_ADC, "aud_adc", "audio_sel", 24), 48710774e0Smtk01761 GATE_AUDIO0(CLK_AUD_DAC, "aud_dac", "audio_sel", 25), 49710774e0Smtk01761 GATE_AUDIO0(CLK_AUD_DAC_PREDIS, "aud_dac_predis", 50710774e0Smtk01761 "audio_sel", 26), 51710774e0Smtk01761 GATE_AUDIO0(CLK_AUD_TML, "aud_tml", "audio_sel", 27), 52710774e0Smtk01761 GATE_AUDIO0(CLK_AUD_NLE, "aud_nle", "audio_sel", 28), 53710774e0Smtk01761 /* AUDIO1 */ 54710774e0Smtk01761 GATE_AUDIO1(CLK_AUD_I2S1_BCLK_SW, "aud_i2s1_bclk", 55710774e0Smtk01761 "audio_sel", 4), 56710774e0Smtk01761 GATE_AUDIO1(CLK_AUD_I2S2_BCLK_SW, "aud_i2s2_bclk", 57710774e0Smtk01761 "audio_sel", 5), 58710774e0Smtk01761 GATE_AUDIO1(CLK_AUD_I2S3_BCLK_SW, "aud_i2s3_bclk", 59710774e0Smtk01761 "audio_sel", 6), 60710774e0Smtk01761 GATE_AUDIO1(CLK_AUD_I2S4_BCLK_SW, "aud_i2s4_bclk", 61710774e0Smtk01761 "audio_sel", 7), 62710774e0Smtk01761 GATE_AUDIO1(CLK_AUD_I2S5_BCLK_SW, "aud_i2s5_bclk", 63710774e0Smtk01761 "audio_sel", 8), 64710774e0Smtk01761 GATE_AUDIO1(CLK_AUD_CONN_I2S_ASRC, "aud_conn_i2s", 65710774e0Smtk01761 "audio_sel", 12), 66710774e0Smtk01761 GATE_AUDIO1(CLK_AUD_GENERAL1_ASRC, "aud_general1", 67710774e0Smtk01761 "audio_sel", 13), 68710774e0Smtk01761 GATE_AUDIO1(CLK_AUD_GENERAL2_ASRC, "aud_general2", 69710774e0Smtk01761 "audio_sel", 14), 70710774e0Smtk01761 GATE_AUDIO1(CLK_AUD_DAC_HIRES, "aud_dac_hires", 71710774e0Smtk01761 "audio_h_sel", 15), 72710774e0Smtk01761 GATE_AUDIO1(CLK_AUD_ADC_HIRES, "aud_adc_hires", 73710774e0Smtk01761 "audio_h_sel", 16), 74710774e0Smtk01761 GATE_AUDIO1(CLK_AUD_ADC_HIRES_TML, "aud_adc_hires_tml", 75710774e0Smtk01761 "audio_h_sel", 17), 76710774e0Smtk01761 GATE_AUDIO1(CLK_AUD_PDN_ADDA6_ADC, "aud_pdn_adda6_adc", 77710774e0Smtk01761 "audio_sel", 20), 78710774e0Smtk01761 GATE_AUDIO1(CLK_AUD_ADDA6_ADC_HIRES, "aud_adda6_adc_hires", 79710774e0Smtk01761 "audio_h_sel", 80710774e0Smtk01761 21), 81710774e0Smtk01761 GATE_AUDIO1(CLK_AUD_3RD_DAC, "aud_3rd_dac", "audio_sel", 82710774e0Smtk01761 28), 83710774e0Smtk01761 GATE_AUDIO1(CLK_AUD_3RD_DAC_PREDIS, "aud_3rd_dac_predis", 84710774e0Smtk01761 "audio_sel", 29), 85710774e0Smtk01761 GATE_AUDIO1(CLK_AUD_3RD_DAC_TML, "aud_3rd_dac_tml", 86710774e0Smtk01761 "audio_sel", 30), 87710774e0Smtk01761 GATE_AUDIO1(CLK_AUD_3RD_DAC_HIRES, "aud_3rd_dac_hires", 88710774e0Smtk01761 "audio_h_sel", 31), 89710774e0Smtk01761 }; 90710774e0Smtk01761 91710774e0Smtk01761 static const struct of_device_id of_match_clk_mt6779_aud[] = { 92710774e0Smtk01761 { .compatible = "mediatek,mt6779-audio", }, 93710774e0Smtk01761 {} 94710774e0Smtk01761 }; 95710774e0Smtk01761 96710774e0Smtk01761 static int clk_mt6779_aud_probe(struct platform_device *pdev) 97710774e0Smtk01761 { 98710774e0Smtk01761 struct clk_onecell_data *clk_data; 99710774e0Smtk01761 struct device_node *node = pdev->dev.of_node; 100710774e0Smtk01761 101710774e0Smtk01761 clk_data = mtk_alloc_clk_data(CLK_AUD_NR_CLK); 102710774e0Smtk01761 103710774e0Smtk01761 mtk_clk_register_gates(node, audio_clks, ARRAY_SIZE(audio_clks), 104710774e0Smtk01761 clk_data); 105710774e0Smtk01761 106710774e0Smtk01761 return of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); 107710774e0Smtk01761 } 108710774e0Smtk01761 109710774e0Smtk01761 static struct platform_driver clk_mt6779_aud_drv = { 110710774e0Smtk01761 .probe = clk_mt6779_aud_probe, 111710774e0Smtk01761 .driver = { 112710774e0Smtk01761 .name = "clk-mt6779-aud", 113710774e0Smtk01761 .of_match_table = of_match_clk_mt6779_aud, 114710774e0Smtk01761 }, 115710774e0Smtk01761 }; 116710774e0Smtk01761 117710774e0Smtk01761 builtin_platform_driver(clk_mt6779_aud_drv); 118