1 /*
2  * Copyright (c) 2017 MediaTek Inc.
3  * Author: Weiyi Lu <weiyi.lu@mediatek.com>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  */
14 
15 #include <linux/clk-provider.h>
16 #include <linux/platform_device.h>
17 
18 #include "clk-mtk.h"
19 #include "clk-gate.h"
20 
21 #include <dt-bindings/clock/mt2712-clk.h>
22 
23 static const struct mtk_gate_regs vdec0_cg_regs = {
24 	.set_ofs = 0x0,
25 	.clr_ofs = 0x4,
26 	.sta_ofs = 0x0,
27 };
28 
29 static const struct mtk_gate_regs vdec1_cg_regs = {
30 	.set_ofs = 0x8,
31 	.clr_ofs = 0xc,
32 	.sta_ofs = 0x8,
33 };
34 
35 #define GATE_VDEC0(_id, _name, _parent, _shift) {	\
36 		.id = _id,				\
37 		.name = _name,				\
38 		.parent_name = _parent,			\
39 		.regs = &vdec0_cg_regs,			\
40 		.shift = _shift,			\
41 		.ops = &mtk_clk_gate_ops_setclr_inv,	\
42 	}
43 
44 #define GATE_VDEC1(_id, _name, _parent, _shift) {	\
45 		.id = _id,				\
46 		.name = _name,				\
47 		.parent_name = _parent,			\
48 		.regs = &vdec1_cg_regs,			\
49 		.shift = _shift,			\
50 		.ops = &mtk_clk_gate_ops_setclr_inv,	\
51 	}
52 
53 static const struct mtk_gate vdec_clks[] = {
54 	/* VDEC0 */
55 	GATE_VDEC0(CLK_VDEC_CKEN, "vdec_cken", "vdec_sel", 0),
56 	/* VDEC1 */
57 	GATE_VDEC1(CLK_VDEC_LARB1_CKEN, "vdec_larb1_cken", "vdec_sel", 0),
58 	GATE_VDEC1(CLK_VDEC_IMGRZ_CKEN, "vdec_imgrz_cken", "vdec_sel", 1),
59 };
60 
61 static int clk_mt2712_vdec_probe(struct platform_device *pdev)
62 {
63 	struct clk_onecell_data *clk_data;
64 	int r;
65 	struct device_node *node = pdev->dev.of_node;
66 
67 	clk_data = mtk_alloc_clk_data(CLK_VDEC_NR_CLK);
68 
69 	mtk_clk_register_gates(node, vdec_clks, ARRAY_SIZE(vdec_clks),
70 			clk_data);
71 
72 	r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
73 
74 	if (r != 0)
75 		pr_err("%s(): could not register clock provider: %d\n",
76 			__func__, r);
77 
78 	return r;
79 }
80 
81 static const struct of_device_id of_match_clk_mt2712_vdec[] = {
82 	{ .compatible = "mediatek,mt2712-vdecsys", },
83 	{}
84 };
85 
86 static struct platform_driver clk_mt2712_vdec_drv = {
87 	.probe = clk_mt2712_vdec_probe,
88 	.driver = {
89 		.name = "clk-mt2712-vdec",
90 		.of_match_table = of_match_clk_mt2712_vdec,
91 	},
92 };
93 
94 builtin_platform_driver(clk_mt2712_vdec_drv);
95