11802d0beSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2e2f744a8Sweiyi.lu@mediatek.com /*
3e2f744a8Sweiyi.lu@mediatek.com  * Copyright (c) 2017 MediaTek Inc.
4e2f744a8Sweiyi.lu@mediatek.com  * Author: Weiyi Lu <weiyi.lu@mediatek.com>
5e2f744a8Sweiyi.lu@mediatek.com  */
6e2f744a8Sweiyi.lu@mediatek.com 
7e2f744a8Sweiyi.lu@mediatek.com #include <linux/clk-provider.h>
8e2f744a8Sweiyi.lu@mediatek.com #include <linux/platform_device.h>
9e2f744a8Sweiyi.lu@mediatek.com 
10e2f744a8Sweiyi.lu@mediatek.com #include "clk-mtk.h"
11e2f744a8Sweiyi.lu@mediatek.com #include "clk-gate.h"
12e2f744a8Sweiyi.lu@mediatek.com 
13e2f744a8Sweiyi.lu@mediatek.com #include <dt-bindings/clock/mt2712-clk.h>
14e2f744a8Sweiyi.lu@mediatek.com 
15e2f744a8Sweiyi.lu@mediatek.com static const struct mtk_gate_regs vdec0_cg_regs = {
16e2f744a8Sweiyi.lu@mediatek.com 	.set_ofs = 0x0,
17e2f744a8Sweiyi.lu@mediatek.com 	.clr_ofs = 0x4,
18e2f744a8Sweiyi.lu@mediatek.com 	.sta_ofs = 0x0,
19e2f744a8Sweiyi.lu@mediatek.com };
20e2f744a8Sweiyi.lu@mediatek.com 
21e2f744a8Sweiyi.lu@mediatek.com static const struct mtk_gate_regs vdec1_cg_regs = {
22e2f744a8Sweiyi.lu@mediatek.com 	.set_ofs = 0x8,
23e2f744a8Sweiyi.lu@mediatek.com 	.clr_ofs = 0xc,
24e2f744a8Sweiyi.lu@mediatek.com 	.sta_ofs = 0x8,
25e2f744a8Sweiyi.lu@mediatek.com };
26e2f744a8Sweiyi.lu@mediatek.com 
274c85e20bSAngeloGioacchino Del Regno #define GATE_VDEC0(_id, _name, _parent, _shift)				\
284c85e20bSAngeloGioacchino Del Regno 	GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
29e2f744a8Sweiyi.lu@mediatek.com 
304c85e20bSAngeloGioacchino Del Regno #define GATE_VDEC1(_id, _name, _parent, _shift)				\
314c85e20bSAngeloGioacchino Del Regno 	GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
32e2f744a8Sweiyi.lu@mediatek.com 
33e2f744a8Sweiyi.lu@mediatek.com static const struct mtk_gate vdec_clks[] = {
34e2f744a8Sweiyi.lu@mediatek.com 	/* VDEC0 */
35e2f744a8Sweiyi.lu@mediatek.com 	GATE_VDEC0(CLK_VDEC_CKEN, "vdec_cken", "vdec_sel", 0),
36e2f744a8Sweiyi.lu@mediatek.com 	/* VDEC1 */
37e2f744a8Sweiyi.lu@mediatek.com 	GATE_VDEC1(CLK_VDEC_LARB1_CKEN, "vdec_larb1_cken", "vdec_sel", 0),
38e2f744a8Sweiyi.lu@mediatek.com 	GATE_VDEC1(CLK_VDEC_IMGRZ_CKEN, "vdec_imgrz_cken", "vdec_sel", 1),
39e2f744a8Sweiyi.lu@mediatek.com };
40e2f744a8Sweiyi.lu@mediatek.com 
41f3e4e735SMiles Chen static const struct mtk_clk_desc vdec_desc = {
42f3e4e735SMiles Chen 	.clks = vdec_clks,
43f3e4e735SMiles Chen 	.num_clks = ARRAY_SIZE(vdec_clks),
44f3e4e735SMiles Chen };
45e2f744a8Sweiyi.lu@mediatek.com 
46e2f744a8Sweiyi.lu@mediatek.com static const struct of_device_id of_match_clk_mt2712_vdec[] = {
47f3e4e735SMiles Chen 	{
48f3e4e735SMiles Chen 		.compatible = "mediatek,mt2712-vdecsys",
49f3e4e735SMiles Chen 		.data = &vdec_desc,
50f3e4e735SMiles Chen 	}, {
51f3e4e735SMiles Chen 		/* sentinel */
52f3e4e735SMiles Chen 	}
53e2f744a8Sweiyi.lu@mediatek.com };
5465c9ad77SAngeloGioacchino Del Regno MODULE_DEVICE_TABLE(of, of_match_clk_mt2712_vdec);
55e2f744a8Sweiyi.lu@mediatek.com 
56e2f744a8Sweiyi.lu@mediatek.com static struct platform_driver clk_mt2712_vdec_drv = {
57f3e4e735SMiles Chen 	.probe = mtk_clk_simple_probe,
58*61ca6ee7SUwe Kleine-König 	.remove_new = mtk_clk_simple_remove,
59e2f744a8Sweiyi.lu@mediatek.com 	.driver = {
60e2f744a8Sweiyi.lu@mediatek.com 		.name = "clk-mt2712-vdec",
61e2f744a8Sweiyi.lu@mediatek.com 		.of_match_table = of_match_clk_mt2712_vdec,
62e2f744a8Sweiyi.lu@mediatek.com 	},
63e2f744a8Sweiyi.lu@mediatek.com };
64164d240dSAngeloGioacchino Del Regno module_platform_driver(clk_mt2712_vdec_drv);
65a451da86SAngeloGioacchino Del Regno MODULE_LICENSE("GPL");
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