1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (c) 2017 MediaTek Inc.
4  * Author: Weiyi Lu <weiyi.lu@mediatek.com>
5  */
6 
7 #include <linux/clk-provider.h>
8 #include <linux/platform_device.h>
9 
10 #include "clk-mtk.h"
11 #include "clk-gate.h"
12 
13 #include <dt-bindings/clock/mt2712-clk.h>
14 
15 static const struct mtk_gate_regs img_cg_regs = {
16 	.set_ofs = 0x0,
17 	.clr_ofs = 0x0,
18 	.sta_ofs = 0x0,
19 };
20 
21 #define GATE_IMG(_id, _name, _parent, _shift) {	\
22 		.id = _id,				\
23 		.name = _name,				\
24 		.parent_name = _parent,			\
25 		.regs = &img_cg_regs,			\
26 		.shift = _shift,			\
27 		.ops = &mtk_clk_gate_ops_no_setclr,	\
28 	}
29 
30 static const struct mtk_gate img_clks[] = {
31 	GATE_IMG(CLK_IMG_SMI_LARB2, "img_smi_larb2", "mm_sel", 0),
32 	GATE_IMG(CLK_IMG_SENINF_SCAM_EN, "img_scam_en", "csi0", 3),
33 	GATE_IMG(CLK_IMG_SENINF_CAM_EN, "img_cam_en", "mm_sel", 8),
34 	GATE_IMG(CLK_IMG_CAM_SV_EN, "img_cam_sv_en", "mm_sel", 9),
35 	GATE_IMG(CLK_IMG_CAM_SV1_EN, "img_cam_sv1_en", "mm_sel", 10),
36 	GATE_IMG(CLK_IMG_CAM_SV2_EN, "img_cam_sv2_en", "mm_sel", 11),
37 };
38 
39 static int clk_mt2712_img_probe(struct platform_device *pdev)
40 {
41 	struct clk_hw_onecell_data *clk_data;
42 	int r;
43 	struct device_node *node = pdev->dev.of_node;
44 
45 	clk_data = mtk_alloc_clk_data(CLK_IMG_NR_CLK);
46 
47 	mtk_clk_register_gates(node, img_clks, ARRAY_SIZE(img_clks),
48 			clk_data);
49 
50 	r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
51 
52 	if (r != 0)
53 		pr_err("%s(): could not register clock provider: %d\n",
54 			__func__, r);
55 
56 	return r;
57 }
58 
59 static const struct of_device_id of_match_clk_mt2712_img[] = {
60 	{ .compatible = "mediatek,mt2712-imgsys", },
61 	{}
62 };
63 
64 static struct platform_driver clk_mt2712_img_drv = {
65 	.probe = clk_mt2712_img_probe,
66 	.driver = {
67 		.name = "clk-mt2712-img",
68 		.of_match_table = of_match_clk_mt2712_img,
69 	},
70 };
71 
72 builtin_platform_driver(clk_mt2712_img_drv);
73