1e2f744a8Sweiyi.lu@mediatek.com /*
2e2f744a8Sweiyi.lu@mediatek.com  * Copyright (c) 2017 MediaTek Inc.
3e2f744a8Sweiyi.lu@mediatek.com  * Author: Weiyi Lu <weiyi.lu@mediatek.com>
4e2f744a8Sweiyi.lu@mediatek.com  *
5e2f744a8Sweiyi.lu@mediatek.com  * This program is free software; you can redistribute it and/or modify
6e2f744a8Sweiyi.lu@mediatek.com  * it under the terms of the GNU General Public License version 2 as
7e2f744a8Sweiyi.lu@mediatek.com  * published by the Free Software Foundation.
8e2f744a8Sweiyi.lu@mediatek.com  *
9e2f744a8Sweiyi.lu@mediatek.com  * This program is distributed in the hope that it will be useful,
10e2f744a8Sweiyi.lu@mediatek.com  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11e2f744a8Sweiyi.lu@mediatek.com  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12e2f744a8Sweiyi.lu@mediatek.com  * GNU General Public License for more details.
13e2f744a8Sweiyi.lu@mediatek.com  */
14e2f744a8Sweiyi.lu@mediatek.com 
15e2f744a8Sweiyi.lu@mediatek.com #include <linux/clk-provider.h>
16e2f744a8Sweiyi.lu@mediatek.com #include <linux/platform_device.h>
17e2f744a8Sweiyi.lu@mediatek.com 
18e2f744a8Sweiyi.lu@mediatek.com #include "clk-mtk.h"
19e2f744a8Sweiyi.lu@mediatek.com #include "clk-gate.h"
20e2f744a8Sweiyi.lu@mediatek.com 
21e2f744a8Sweiyi.lu@mediatek.com #include <dt-bindings/clock/mt2712-clk.h>
22e2f744a8Sweiyi.lu@mediatek.com 
23e2f744a8Sweiyi.lu@mediatek.com static const struct mtk_gate_regs img_cg_regs = {
24e2f744a8Sweiyi.lu@mediatek.com 	.set_ofs = 0x0,
25e2f744a8Sweiyi.lu@mediatek.com 	.clr_ofs = 0x0,
26e2f744a8Sweiyi.lu@mediatek.com 	.sta_ofs = 0x0,
27e2f744a8Sweiyi.lu@mediatek.com };
28e2f744a8Sweiyi.lu@mediatek.com 
29e2f744a8Sweiyi.lu@mediatek.com #define GATE_IMG(_id, _name, _parent, _shift) {	\
30e2f744a8Sweiyi.lu@mediatek.com 		.id = _id,				\
31e2f744a8Sweiyi.lu@mediatek.com 		.name = _name,				\
32e2f744a8Sweiyi.lu@mediatek.com 		.parent_name = _parent,			\
33e2f744a8Sweiyi.lu@mediatek.com 		.regs = &img_cg_regs,			\
34e2f744a8Sweiyi.lu@mediatek.com 		.shift = _shift,			\
35e2f744a8Sweiyi.lu@mediatek.com 		.ops = &mtk_clk_gate_ops_no_setclr,	\
36e2f744a8Sweiyi.lu@mediatek.com 	}
37e2f744a8Sweiyi.lu@mediatek.com 
38e2f744a8Sweiyi.lu@mediatek.com static const struct mtk_gate img_clks[] = {
39e2f744a8Sweiyi.lu@mediatek.com 	GATE_IMG(CLK_IMG_SMI_LARB2, "img_smi_larb2", "mm_sel", 0),
40e2f744a8Sweiyi.lu@mediatek.com 	GATE_IMG(CLK_IMG_SENINF_SCAM_EN, "img_scam_en", "csi0", 3),
41e2f744a8Sweiyi.lu@mediatek.com 	GATE_IMG(CLK_IMG_SENINF_CAM_EN, "img_cam_en", "mm_sel", 8),
42e2f744a8Sweiyi.lu@mediatek.com 	GATE_IMG(CLK_IMG_CAM_SV_EN, "img_cam_sv_en", "mm_sel", 9),
43e2f744a8Sweiyi.lu@mediatek.com 	GATE_IMG(CLK_IMG_CAM_SV1_EN, "img_cam_sv1_en", "mm_sel", 10),
44e2f744a8Sweiyi.lu@mediatek.com 	GATE_IMG(CLK_IMG_CAM_SV2_EN, "img_cam_sv2_en", "mm_sel", 11),
45e2f744a8Sweiyi.lu@mediatek.com };
46e2f744a8Sweiyi.lu@mediatek.com 
47e2f744a8Sweiyi.lu@mediatek.com static int clk_mt2712_img_probe(struct platform_device *pdev)
48e2f744a8Sweiyi.lu@mediatek.com {
49e2f744a8Sweiyi.lu@mediatek.com 	struct clk_onecell_data *clk_data;
50e2f744a8Sweiyi.lu@mediatek.com 	int r;
51e2f744a8Sweiyi.lu@mediatek.com 	struct device_node *node = pdev->dev.of_node;
52e2f744a8Sweiyi.lu@mediatek.com 
53e2f744a8Sweiyi.lu@mediatek.com 	clk_data = mtk_alloc_clk_data(CLK_IMG_NR_CLK);
54e2f744a8Sweiyi.lu@mediatek.com 
55e2f744a8Sweiyi.lu@mediatek.com 	mtk_clk_register_gates(node, img_clks, ARRAY_SIZE(img_clks),
56e2f744a8Sweiyi.lu@mediatek.com 			clk_data);
57e2f744a8Sweiyi.lu@mediatek.com 
58e2f744a8Sweiyi.lu@mediatek.com 	r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
59e2f744a8Sweiyi.lu@mediatek.com 
60e2f744a8Sweiyi.lu@mediatek.com 	if (r != 0)
61e2f744a8Sweiyi.lu@mediatek.com 		pr_err("%s(): could not register clock provider: %d\n",
62e2f744a8Sweiyi.lu@mediatek.com 			__func__, r);
63e2f744a8Sweiyi.lu@mediatek.com 
64e2f744a8Sweiyi.lu@mediatek.com 	return r;
65e2f744a8Sweiyi.lu@mediatek.com }
66e2f744a8Sweiyi.lu@mediatek.com 
67e2f744a8Sweiyi.lu@mediatek.com static const struct of_device_id of_match_clk_mt2712_img[] = {
68e2f744a8Sweiyi.lu@mediatek.com 	{ .compatible = "mediatek,mt2712-imgsys", },
69e2f744a8Sweiyi.lu@mediatek.com 	{}
70e2f744a8Sweiyi.lu@mediatek.com };
71e2f744a8Sweiyi.lu@mediatek.com 
72e2f744a8Sweiyi.lu@mediatek.com static struct platform_driver clk_mt2712_img_drv = {
73e2f744a8Sweiyi.lu@mediatek.com 	.probe = clk_mt2712_img_probe,
74e2f744a8Sweiyi.lu@mediatek.com 	.driver = {
75e2f744a8Sweiyi.lu@mediatek.com 		.name = "clk-mt2712-img",
76e2f744a8Sweiyi.lu@mediatek.com 		.of_match_table = of_match_clk_mt2712_img,
77e2f744a8Sweiyi.lu@mediatek.com 	},
78e2f744a8Sweiyi.lu@mediatek.com };
79e2f744a8Sweiyi.lu@mediatek.com 
80e2f744a8Sweiyi.lu@mediatek.com builtin_platform_driver(clk_mt2712_img_drv);
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