11802d0beSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2e9862118SShunli Wang /*
3e9862118SShunli Wang  * Copyright (c) 2014 MediaTek Inc.
4e9862118SShunli Wang  * Author: Shunli Wang <shunli.wang@mediatek.com>
5e9862118SShunli Wang  */
6e9862118SShunli Wang 
7e9862118SShunli Wang #include <linux/clk-provider.h>
8e9862118SShunli Wang #include <linux/platform_device.h>
9e9862118SShunli Wang 
10e9862118SShunli Wang #include "clk-mtk.h"
11e9862118SShunli Wang #include "clk-gate.h"
12e9862118SShunli Wang 
13e9862118SShunli Wang #include <dt-bindings/clock/mt2701-clk.h>
14e9862118SShunli Wang 
15e9862118SShunli Wang static const struct mtk_gate_regs hif_cg_regs = {
16e9862118SShunli Wang 	.sta_ofs = 0x0030,
17e9862118SShunli Wang };
18e9862118SShunli Wang 
19e9862118SShunli Wang #define GATE_HIF(_id, _name, _parent, _shift) {		\
20e9862118SShunli Wang 		.id = _id,				\
21e9862118SShunli Wang 		.name = _name,				\
22e9862118SShunli Wang 		.parent_name = _parent,			\
23e9862118SShunli Wang 		.regs = &hif_cg_regs,			\
24e9862118SShunli Wang 		.shift = _shift,			\
25e9862118SShunli Wang 		.ops = &mtk_clk_gate_ops_no_setclr_inv,	\
26e9862118SShunli Wang 	}
27e9862118SShunli Wang 
28e9862118SShunli Wang static const struct mtk_gate hif_clks[] = {
29*0f69a423SAngeloGioacchino Del Regno 	GATE_DUMMY(CLK_DUMMY, "hif_dummy"),
30e9862118SShunli Wang 	GATE_HIF(CLK_HIFSYS_USB0PHY, "usb0_phy_clk", "ethpll_500m_ck", 21),
31e9862118SShunli Wang 	GATE_HIF(CLK_HIFSYS_USB1PHY, "usb1_phy_clk", "ethpll_500m_ck", 22),
32e9862118SShunli Wang 	GATE_HIF(CLK_HIFSYS_PCIE0, "pcie0_clk", "ethpll_500m_ck", 24),
33e9862118SShunli Wang 	GATE_HIF(CLK_HIFSYS_PCIE1, "pcie1_clk", "ethpll_500m_ck", 25),
34e9862118SShunli Wang 	GATE_HIF(CLK_HIFSYS_PCIE2, "pcie2_clk", "ethpll_500m_ck", 26),
35e9862118SShunli Wang };
36e9862118SShunli Wang 
37723e3671SRex-BC Chen static u16 rst_ofs[] = { 0x34, };
38723e3671SRex-BC Chen 
392d2a2900SRex-BC Chen static const struct mtk_clk_rst_desc clk_rst_desc = {
402d2a2900SRex-BC Chen 	.version = MTK_RST_SIMPLE,
41723e3671SRex-BC Chen 	.rst_bank_ofs = rst_ofs,
42723e3671SRex-BC Chen 	.rst_bank_nr = ARRAY_SIZE(rst_ofs),
432d2a2900SRex-BC Chen };
442d2a2900SRex-BC Chen 
45*0f69a423SAngeloGioacchino Del Regno static const struct mtk_clk_desc hif_desc = {
46*0f69a423SAngeloGioacchino Del Regno 	.clks = hif_clks,
47*0f69a423SAngeloGioacchino Del Regno 	.num_clks = ARRAY_SIZE(hif_clks),
48*0f69a423SAngeloGioacchino Del Regno 	.rst_desc = &clk_rst_desc,
49e9862118SShunli Wang };
50e9862118SShunli Wang 
51*0f69a423SAngeloGioacchino Del Regno static const struct of_device_id of_match_clk_mt2701_hif[] = {
52*0f69a423SAngeloGioacchino Del Regno 	{ .compatible = "mediatek,mt2701-hifsys", .data = &hif_desc },
53*0f69a423SAngeloGioacchino Del Regno 	{ /* sentinel */ }
54*0f69a423SAngeloGioacchino Del Regno };
558c1ee96aSShunli Wang 
56e9862118SShunli Wang static struct platform_driver clk_mt2701_hif_drv = {
57*0f69a423SAngeloGioacchino Del Regno 	.probe = mtk_clk_simple_probe,
58*0f69a423SAngeloGioacchino Del Regno 	.remove = mtk_clk_simple_remove,
59e9862118SShunli Wang 	.driver = {
60e9862118SShunli Wang 		.name = "clk-mt2701-hif",
61e9862118SShunli Wang 		.of_match_table = of_match_clk_mt2701_hif,
62e9862118SShunli Wang 	},
63e9862118SShunli Wang };
64e9862118SShunli Wang 
65e9862118SShunli Wang builtin_platform_driver(clk_mt2701_hif_drv);
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