11802d0beSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2e9862118SShunli Wang /*
3e9862118SShunli Wang  * Copyright (c) 2014 MediaTek Inc.
4e9862118SShunli Wang  * Author: Shunli Wang <shunli.wang@mediatek.com>
5e9862118SShunli Wang  */
6e9862118SShunli Wang 
7e9862118SShunli Wang #include <linux/clk-provider.h>
8e9862118SShunli Wang #include <linux/platform_device.h>
9e9862118SShunli Wang 
10e9862118SShunli Wang #include "clk-mtk.h"
11e9862118SShunli Wang #include "clk-gate.h"
12e9862118SShunli Wang 
13e9862118SShunli Wang #include <dt-bindings/clock/mt2701-clk.h>
14e9862118SShunli Wang 
15e9862118SShunli Wang static const struct mtk_gate_regs hif_cg_regs = {
16e9862118SShunli Wang 	.sta_ofs = 0x0030,
17e9862118SShunli Wang };
18e9862118SShunli Wang 
194c85e20bSAngeloGioacchino Del Regno #define GATE_HIF(_id, _name, _parent, _shift)				\
204c85e20bSAngeloGioacchino Del Regno 	GATE_MTK(_id, _name, _parent, &hif_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
21e9862118SShunli Wang 
22e9862118SShunli Wang static const struct mtk_gate hif_clks[] = {
230f69a423SAngeloGioacchino Del Regno 	GATE_DUMMY(CLK_DUMMY, "hif_dummy"),
24e9862118SShunli Wang 	GATE_HIF(CLK_HIFSYS_USB0PHY, "usb0_phy_clk", "ethpll_500m_ck", 21),
25e9862118SShunli Wang 	GATE_HIF(CLK_HIFSYS_USB1PHY, "usb1_phy_clk", "ethpll_500m_ck", 22),
26e9862118SShunli Wang 	GATE_HIF(CLK_HIFSYS_PCIE0, "pcie0_clk", "ethpll_500m_ck", 24),
27e9862118SShunli Wang 	GATE_HIF(CLK_HIFSYS_PCIE1, "pcie1_clk", "ethpll_500m_ck", 25),
28e9862118SShunli Wang 	GATE_HIF(CLK_HIFSYS_PCIE2, "pcie2_clk", "ethpll_500m_ck", 26),
29e9862118SShunli Wang };
30e9862118SShunli Wang 
31723e3671SRex-BC Chen static u16 rst_ofs[] = { 0x34, };
32723e3671SRex-BC Chen 
332d2a2900SRex-BC Chen static const struct mtk_clk_rst_desc clk_rst_desc = {
342d2a2900SRex-BC Chen 	.version = MTK_RST_SIMPLE,
35723e3671SRex-BC Chen 	.rst_bank_ofs = rst_ofs,
36723e3671SRex-BC Chen 	.rst_bank_nr = ARRAY_SIZE(rst_ofs),
372d2a2900SRex-BC Chen };
382d2a2900SRex-BC Chen 
390f69a423SAngeloGioacchino Del Regno static const struct mtk_clk_desc hif_desc = {
400f69a423SAngeloGioacchino Del Regno 	.clks = hif_clks,
410f69a423SAngeloGioacchino Del Regno 	.num_clks = ARRAY_SIZE(hif_clks),
420f69a423SAngeloGioacchino Del Regno 	.rst_desc = &clk_rst_desc,
43e9862118SShunli Wang };
44e9862118SShunli Wang 
450f69a423SAngeloGioacchino Del Regno static const struct of_device_id of_match_clk_mt2701_hif[] = {
460f69a423SAngeloGioacchino Del Regno 	{ .compatible = "mediatek,mt2701-hifsys", .data = &hif_desc },
470f69a423SAngeloGioacchino Del Regno 	{ /* sentinel */ }
480f69a423SAngeloGioacchino Del Regno };
4965c9ad77SAngeloGioacchino Del Regno MODULE_DEVICE_TABLE(of, of_match_clk_mt2701_hif);
508c1ee96aSShunli Wang 
51e9862118SShunli Wang static struct platform_driver clk_mt2701_hif_drv = {
520f69a423SAngeloGioacchino Del Regno 	.probe = mtk_clk_simple_probe,
53*61ca6ee7SUwe Kleine-König 	.remove_new = mtk_clk_simple_remove,
54e9862118SShunli Wang 	.driver = {
55e9862118SShunli Wang 		.name = "clk-mt2701-hif",
56e9862118SShunli Wang 		.of_match_table = of_match_clk_mt2701_hif,
57e9862118SShunli Wang 	},
58e9862118SShunli Wang };
59164d240dSAngeloGioacchino Del Regno module_platform_driver(clk_mt2701_hif_drv);
60a451da86SAngeloGioacchino Del Regno MODULE_LICENSE("GPL");
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