xref: /openbmc/linux/drivers/clk/mediatek/clk-fhctl.h (revision 8da312d6)
1d7964de8SJohnson Wang /* SPDX-License-Identifier: GPL-2.0-only */
2d7964de8SJohnson Wang /*
3d7964de8SJohnson Wang  * Copyright (c) 2022 MediaTek Inc.
4d7964de8SJohnson Wang  * Author: Edward-JW Yang <edward-jw.yang@mediatek.com>
5d7964de8SJohnson Wang  */
6d7964de8SJohnson Wang 
7d7964de8SJohnson Wang #ifndef __CLK_FHCTL_H
8d7964de8SJohnson Wang #define __CLK_FHCTL_H
9d7964de8SJohnson Wang 
10*8da312d6SAngeloGioacchino Del Regno #include "clk-pllfh.h"
11*8da312d6SAngeloGioacchino Del Regno 
12*8da312d6SAngeloGioacchino Del Regno enum fhctl_variant {
13*8da312d6SAngeloGioacchino Del Regno 	FHCTL_PLLFH_V1,
14*8da312d6SAngeloGioacchino Del Regno 	FHCTL_PLLFH_V2,
15*8da312d6SAngeloGioacchino Del Regno };
16*8da312d6SAngeloGioacchino Del Regno 
17d7964de8SJohnson Wang struct fhctl_offset {
18d7964de8SJohnson Wang 	u32 offset_hp_en;
19d7964de8SJohnson Wang 	u32 offset_clk_con;
20d7964de8SJohnson Wang 	u32 offset_rst_con;
21d7964de8SJohnson Wang 	u32 offset_slope0;
22d7964de8SJohnson Wang 	u32 offset_slope1;
23d7964de8SJohnson Wang 	u32 offset_cfg;
24d7964de8SJohnson Wang 	u32 offset_updnlmt;
25d7964de8SJohnson Wang 	u32 offset_dds;
26d7964de8SJohnson Wang 	u32 offset_dvfs;
27d7964de8SJohnson Wang 	u32 offset_mon;
28d7964de8SJohnson Wang };
29*8da312d6SAngeloGioacchino Del Regno const struct fhctl_offset *fhctl_get_offset_table(enum fhctl_variant v);
30d7964de8SJohnson Wang const struct fh_operation *fhctl_get_ops(void);
31d7964de8SJohnson Wang void fhctl_hw_init(struct mtk_fh *fh);
32d7964de8SJohnson Wang 
33d7964de8SJohnson Wang #endif
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