11e17de90SSean Wang /* 21e17de90SSean Wang * Copyright (c) 2015 Linaro Ltd. 31e17de90SSean Wang * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org> 41e17de90SSean Wang * 51e17de90SSean Wang * This program is free software; you can redistribute it and/or modify 61e17de90SSean Wang * it under the terms of the GNU General Public License version 2 as 71e17de90SSean Wang * published by the Free Software Foundation. 81e17de90SSean Wang * 91e17de90SSean Wang * This program is distributed in the hope that it will be useful, 101e17de90SSean Wang * but WITHOUT ANY WARRANTY; without even the implied warranty of 111e17de90SSean Wang * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 121e17de90SSean Wang * GNU General Public License for more details. 131e17de90SSean Wang */ 141e17de90SSean Wang 151e17de90SSean Wang #include <linux/clk-provider.h> 161e17de90SSean Wang #include <linux/mfd/syscon.h> 171e17de90SSean Wang #include <linux/slab.h> 181e17de90SSean Wang 191e17de90SSean Wang #include "clk-mtk.h" 201e17de90SSean Wang #include "clk-cpumux.h" 211e17de90SSean Wang 221e17de90SSean Wang static inline struct mtk_clk_cpumux *to_mtk_clk_cpumux(struct clk_hw *_hw) 231e17de90SSean Wang { 241e17de90SSean Wang return container_of(_hw, struct mtk_clk_cpumux, hw); 251e17de90SSean Wang } 261e17de90SSean Wang 271e17de90SSean Wang static u8 clk_cpumux_get_parent(struct clk_hw *hw) 281e17de90SSean Wang { 291e17de90SSean Wang struct mtk_clk_cpumux *mux = to_mtk_clk_cpumux(hw); 301e17de90SSean Wang unsigned int val; 311e17de90SSean Wang 321e17de90SSean Wang regmap_read(mux->regmap, mux->reg, &val); 331e17de90SSean Wang 341e17de90SSean Wang val >>= mux->shift; 351e17de90SSean Wang val &= mux->mask; 361e17de90SSean Wang 371e17de90SSean Wang return val; 381e17de90SSean Wang } 391e17de90SSean Wang 401e17de90SSean Wang static int clk_cpumux_set_parent(struct clk_hw *hw, u8 index) 411e17de90SSean Wang { 421e17de90SSean Wang struct mtk_clk_cpumux *mux = to_mtk_clk_cpumux(hw); 431e17de90SSean Wang u32 mask, val; 441e17de90SSean Wang 451e17de90SSean Wang val = index << mux->shift; 461e17de90SSean Wang mask = mux->mask << mux->shift; 471e17de90SSean Wang 481e17de90SSean Wang return regmap_update_bits(mux->regmap, mux->reg, mask, val); 491e17de90SSean Wang } 501e17de90SSean Wang 511e17de90SSean Wang static const struct clk_ops clk_cpumux_ops = { 521e17de90SSean Wang .get_parent = clk_cpumux_get_parent, 531e17de90SSean Wang .set_parent = clk_cpumux_set_parent, 541e17de90SSean Wang }; 551e17de90SSean Wang 561e17de90SSean Wang static struct clk __init * 571e17de90SSean Wang mtk_clk_register_cpumux(const struct mtk_composite *mux, 581e17de90SSean Wang struct regmap *regmap) 591e17de90SSean Wang { 601e17de90SSean Wang struct mtk_clk_cpumux *cpumux; 611e17de90SSean Wang struct clk *clk; 621e17de90SSean Wang struct clk_init_data init; 631e17de90SSean Wang 641e17de90SSean Wang cpumux = kzalloc(sizeof(*cpumux), GFP_KERNEL); 651e17de90SSean Wang if (!cpumux) 661e17de90SSean Wang return ERR_PTR(-ENOMEM); 671e17de90SSean Wang 681e17de90SSean Wang init.name = mux->name; 691e17de90SSean Wang init.ops = &clk_cpumux_ops; 701e17de90SSean Wang init.parent_names = mux->parent_names; 711e17de90SSean Wang init.num_parents = mux->num_parents; 721e17de90SSean Wang init.flags = mux->flags; 731e17de90SSean Wang 741e17de90SSean Wang cpumux->reg = mux->mux_reg; 751e17de90SSean Wang cpumux->shift = mux->mux_shift; 761e17de90SSean Wang cpumux->mask = BIT(mux->mux_width) - 1; 771e17de90SSean Wang cpumux->regmap = regmap; 781e17de90SSean Wang cpumux->hw.init = &init; 791e17de90SSean Wang 801e17de90SSean Wang clk = clk_register(NULL, &cpumux->hw); 811e17de90SSean Wang if (IS_ERR(clk)) 821e17de90SSean Wang kfree(cpumux); 831e17de90SSean Wang 841e17de90SSean Wang return clk; 851e17de90SSean Wang } 861e17de90SSean Wang 871e17de90SSean Wang int __init mtk_clk_register_cpumuxes(struct device_node *node, 881e17de90SSean Wang const struct mtk_composite *clks, int num, 891e17de90SSean Wang struct clk_onecell_data *clk_data) 901e17de90SSean Wang { 911e17de90SSean Wang int i; 921e17de90SSean Wang struct clk *clk; 931e17de90SSean Wang struct regmap *regmap; 941e17de90SSean Wang 951e17de90SSean Wang regmap = syscon_node_to_regmap(node); 961e17de90SSean Wang if (IS_ERR(regmap)) { 9716673931SRob Herring pr_err("Cannot find regmap for %pOF: %ld\n", node, 981e17de90SSean Wang PTR_ERR(regmap)); 991e17de90SSean Wang return PTR_ERR(regmap); 1001e17de90SSean Wang } 1011e17de90SSean Wang 1021e17de90SSean Wang for (i = 0; i < num; i++) { 1031e17de90SSean Wang const struct mtk_composite *mux = &clks[i]; 1041e17de90SSean Wang 1051e17de90SSean Wang clk = mtk_clk_register_cpumux(mux, regmap); 1061e17de90SSean Wang if (IS_ERR(clk)) { 1071e17de90SSean Wang pr_err("Failed to register clk %s: %ld\n", 1081e17de90SSean Wang mux->name, PTR_ERR(clk)); 1091e17de90SSean Wang continue; 1101e17de90SSean Wang } 1111e17de90SSean Wang 1121e17de90SSean Wang clk_data->clks[mux->id] = clk; 1131e17de90SSean Wang } 1141e17de90SSean Wang 1151e17de90SSean Wang return 0; 1161e17de90SSean Wang } 117