1a47d6040SDavid Lechner // SPDX-License-Identifier: GPL-2.0 2a47d6040SDavid Lechner /* 3a47d6040SDavid Lechner * PSC clock descriptions for TI DA850/OMAP-L138/AM18XX 4a47d6040SDavid Lechner * 5a47d6040SDavid Lechner * Copyright (C) 2018 David Lechner <david@lechnology.com> 6a47d6040SDavid Lechner */ 7a47d6040SDavid Lechner 8a47d6040SDavid Lechner #include <linux/clk-provider.h> 9a47d6040SDavid Lechner #include <linux/clk.h> 10a47d6040SDavid Lechner #include <linux/clkdev.h> 11a47d6040SDavid Lechner #include <linux/init.h> 12a47d6040SDavid Lechner #include <linux/kernel.h> 13a47d6040SDavid Lechner #include <linux/of.h> 14a47d6040SDavid Lechner #include <linux/types.h> 15a47d6040SDavid Lechner 16a47d6040SDavid Lechner #include "psc.h" 17a47d6040SDavid Lechner 18a47d6040SDavid Lechner LPSC_CLKDEV2(emifa_clkdev, NULL, "ti-aemif", 19a47d6040SDavid Lechner "aemif", "davinci_nand.0"); 20a47d6040SDavid Lechner LPSC_CLKDEV1(spi0_clkdev, NULL, "spi_davinci.0"); 21a47d6040SDavid Lechner LPSC_CLKDEV1(mmcsd0_clkdev, NULL, "da830-mmc.0"); 22a47d6040SDavid Lechner LPSC_CLKDEV1(uart0_clkdev, NULL, "serial8250.0"); 23a47d6040SDavid Lechner /* REVISIT: used dev_id instead of con_id */ 24a47d6040SDavid Lechner LPSC_CLKDEV1(arm_clkdev, "arm", NULL); 25a47d6040SDavid Lechner LPSC_CLKDEV1(dsp_clkdev, NULL, "davinci-rproc.0"); 26a47d6040SDavid Lechner 27a47d6040SDavid Lechner static const struct davinci_lpsc_clk_info da850_psc0_info[] = { 28a47d6040SDavid Lechner LPSC(0, 0, tpcc0, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED), 29a47d6040SDavid Lechner LPSC(1, 0, tptc0, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED), 30a47d6040SDavid Lechner LPSC(2, 0, tptc1, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED), 31a47d6040SDavid Lechner LPSC(3, 0, emifa, async1, emifa_clkdev, 0), 32a47d6040SDavid Lechner LPSC(4, 0, spi0, pll0_sysclk2, spi0_clkdev, 0), 33a47d6040SDavid Lechner LPSC(5, 0, mmcsd0, pll0_sysclk2, mmcsd0_clkdev, 0), 34a47d6040SDavid Lechner LPSC(6, 0, aintc, pll0_sysclk4, NULL, LPSC_ALWAYS_ENABLED), 35a47d6040SDavid Lechner LPSC(7, 0, arm_rom, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED), 36a47d6040SDavid Lechner LPSC(9, 0, uart0, pll0_sysclk2, uart0_clkdev, 0), 37a47d6040SDavid Lechner LPSC(13, 0, pruss, pll0_sysclk2, NULL, 0), 38a47d6040SDavid Lechner LPSC(14, 0, arm, pll0_sysclk6, arm_clkdev, LPSC_ALWAYS_ENABLED | LPSC_SET_RATE_PARENT), 39a47d6040SDavid Lechner LPSC(15, 1, dsp, pll0_sysclk1, dsp_clkdev, LPSC_FORCE | LPSC_LOCAL_RESET), 40a47d6040SDavid Lechner { } 41a47d6040SDavid Lechner }; 42a47d6040SDavid Lechner 43a47d6040SDavid Lechner LPSC_CLKDEV3(usb0_clkdev, "fck", "da830-usb-phy-clks", 44a47d6040SDavid Lechner NULL, "musb-da8xx", 45a47d6040SDavid Lechner NULL, "cppi41-dmaengine"); 46a47d6040SDavid Lechner LPSC_CLKDEV1(usb1_clkdev, NULL, "ohci-da8xx"); 47a47d6040SDavid Lechner /* REVISIT: gpio-davinci.c should be modified to drop con_id */ 48a47d6040SDavid Lechner LPSC_CLKDEV1(gpio_clkdev, "gpio", NULL); 49a47d6040SDavid Lechner LPSC_CLKDEV2(emac_clkdev, NULL, "davinci_emac.1", 50a47d6040SDavid Lechner "fck", "davinci_mdio.0"); 51a47d6040SDavid Lechner LPSC_CLKDEV1(mcasp0_clkdev, NULL, "davinci-mcasp.0"); 52a47d6040SDavid Lechner LPSC_CLKDEV1(sata_clkdev, "fck", "ahci_da850"); 53a47d6040SDavid Lechner LPSC_CLKDEV1(vpif_clkdev, NULL, "vpif"); 54a47d6040SDavid Lechner LPSC_CLKDEV1(spi1_clkdev, NULL, "spi_davinci.1"); 55a47d6040SDavid Lechner LPSC_CLKDEV1(i2c1_clkdev, NULL, "i2c_davinci.2"); 56a47d6040SDavid Lechner LPSC_CLKDEV1(uart1_clkdev, NULL, "serial8250.1"); 57a47d6040SDavid Lechner LPSC_CLKDEV1(uart2_clkdev, NULL, "serial8250.2"); 58a47d6040SDavid Lechner LPSC_CLKDEV1(mcbsp0_clkdev, NULL, "davinci-mcbsp.0"); 59a47d6040SDavid Lechner LPSC_CLKDEV1(mcbsp1_clkdev, NULL, "davinci-mcbsp.1"); 60a47d6040SDavid Lechner LPSC_CLKDEV1(lcdc_clkdev, "fck", "da8xx_lcdc.0"); 61a47d6040SDavid Lechner LPSC_CLKDEV3(ehrpwm_clkdev, "fck", "ehrpwm.0", 62a47d6040SDavid Lechner "fck", "ehrpwm.1", 63a47d6040SDavid Lechner NULL, "da830-tbclksync"); 64a47d6040SDavid Lechner LPSC_CLKDEV1(mmcsd1_clkdev, NULL, "da830-mmc.1"); 65a47d6040SDavid Lechner LPSC_CLKDEV3(ecap_clkdev, "fck", "ecap.0", 66a47d6040SDavid Lechner "fck", "ecap.1", 67a47d6040SDavid Lechner "fck", "ecap.2"); 68a47d6040SDavid Lechner 69a47d6040SDavid Lechner static int da850_psc0_init(struct device *dev, void __iomem *base) 70a47d6040SDavid Lechner { 71a47d6040SDavid Lechner return davinci_psc_register_clocks(dev, da850_psc0_info, 16, base); 72a47d6040SDavid Lechner } 73a47d6040SDavid Lechner 74a47d6040SDavid Lechner static int of_da850_psc0_init(struct device *dev, void __iomem *base) 75a47d6040SDavid Lechner { 76a47d6040SDavid Lechner return of_davinci_psc_clk_init(dev, da850_psc0_info, 16, base); 77a47d6040SDavid Lechner } 78a47d6040SDavid Lechner 79a47d6040SDavid Lechner static struct clk_bulk_data da850_psc0_parent_clks[] = { 80a47d6040SDavid Lechner { .id = "pll0_sysclk1" }, 81a47d6040SDavid Lechner { .id = "pll0_sysclk2" }, 82a47d6040SDavid Lechner { .id = "pll0_sysclk4" }, 83a47d6040SDavid Lechner { .id = "pll0_sysclk6" }, 84a47d6040SDavid Lechner { .id = "async1" }, 85a47d6040SDavid Lechner }; 86a47d6040SDavid Lechner 87a47d6040SDavid Lechner const struct davinci_psc_init_data da850_psc0_init_data = { 88a47d6040SDavid Lechner .parent_clks = da850_psc0_parent_clks, 89a47d6040SDavid Lechner .num_parent_clks = ARRAY_SIZE(da850_psc0_parent_clks), 90a47d6040SDavid Lechner .psc_init = &da850_psc0_init, 91a47d6040SDavid Lechner }; 92a47d6040SDavid Lechner 93a47d6040SDavid Lechner const struct davinci_psc_init_data of_da850_psc0_init_data = { 94a47d6040SDavid Lechner .parent_clks = da850_psc0_parent_clks, 95a47d6040SDavid Lechner .num_parent_clks = ARRAY_SIZE(da850_psc0_parent_clks), 96a47d6040SDavid Lechner .psc_init = &of_da850_psc0_init, 97a47d6040SDavid Lechner }; 98a47d6040SDavid Lechner 99a47d6040SDavid Lechner static const struct davinci_lpsc_clk_info da850_psc1_info[] = { 100a47d6040SDavid Lechner LPSC(0, 0, tpcc1, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED), 101a47d6040SDavid Lechner LPSC(1, 0, usb0, pll0_sysclk2, usb0_clkdev, 0), 102a47d6040SDavid Lechner LPSC(2, 0, usb1, pll0_sysclk4, usb1_clkdev, 0), 103a47d6040SDavid Lechner LPSC(3, 0, gpio, pll0_sysclk4, gpio_clkdev, 0), 104a47d6040SDavid Lechner LPSC(5, 0, emac, pll0_sysclk4, emac_clkdev, 0), 105a47d6040SDavid Lechner LPSC(6, 0, ddr, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED), 106a47d6040SDavid Lechner LPSC(7, 0, mcasp0, async3, mcasp0_clkdev, 0), 107a47d6040SDavid Lechner LPSC(8, 0, sata, pll0_sysclk2, sata_clkdev, LPSC_FORCE), 108a47d6040SDavid Lechner LPSC(9, 0, vpif, pll0_sysclk2, vpif_clkdev, 0), 109a47d6040SDavid Lechner LPSC(10, 0, spi1, async3, spi1_clkdev, 0), 110a47d6040SDavid Lechner LPSC(11, 0, i2c1, pll0_sysclk4, i2c1_clkdev, 0), 111a47d6040SDavid Lechner LPSC(12, 0, uart1, async3, uart1_clkdev, 0), 112a47d6040SDavid Lechner LPSC(13, 0, uart2, async3, uart2_clkdev, 0), 113a47d6040SDavid Lechner LPSC(14, 0, mcbsp0, async3, mcbsp0_clkdev, 0), 114a47d6040SDavid Lechner LPSC(15, 0, mcbsp1, async3, mcbsp1_clkdev, 0), 115a47d6040SDavid Lechner LPSC(16, 0, lcdc, pll0_sysclk2, lcdc_clkdev, 0), 116a47d6040SDavid Lechner LPSC(17, 0, ehrpwm, async3, ehrpwm_clkdev, 0), 117a47d6040SDavid Lechner LPSC(18, 0, mmcsd1, pll0_sysclk2, mmcsd1_clkdev, 0), 118a47d6040SDavid Lechner LPSC(20, 0, ecap, async3, ecap_clkdev, 0), 119a47d6040SDavid Lechner LPSC(21, 0, tptc2, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED), 120a47d6040SDavid Lechner { } 121a47d6040SDavid Lechner }; 122a47d6040SDavid Lechner 123a47d6040SDavid Lechner static int da850_psc1_init(struct device *dev, void __iomem *base) 124a47d6040SDavid Lechner { 125a47d6040SDavid Lechner return davinci_psc_register_clocks(dev, da850_psc1_info, 32, base); 126a47d6040SDavid Lechner } 127a47d6040SDavid Lechner 128a47d6040SDavid Lechner static int of_da850_psc1_init(struct device *dev, void __iomem *base) 129a47d6040SDavid Lechner { 130a47d6040SDavid Lechner return of_davinci_psc_clk_init(dev, da850_psc1_info, 32, base); 131a47d6040SDavid Lechner } 132a47d6040SDavid Lechner 133a47d6040SDavid Lechner static struct clk_bulk_data da850_psc1_parent_clks[] = { 134a47d6040SDavid Lechner { .id = "pll0_sysclk2" }, 135a47d6040SDavid Lechner { .id = "pll0_sysclk4" }, 136a47d6040SDavid Lechner { .id = "async3" }, 137a47d6040SDavid Lechner }; 138a47d6040SDavid Lechner 139a47d6040SDavid Lechner const struct davinci_psc_init_data da850_psc1_init_data = { 140a47d6040SDavid Lechner .parent_clks = da850_psc1_parent_clks, 141a47d6040SDavid Lechner .num_parent_clks = ARRAY_SIZE(da850_psc1_parent_clks), 142a47d6040SDavid Lechner .psc_init = &da850_psc1_init, 143a47d6040SDavid Lechner }; 144a47d6040SDavid Lechner 145a47d6040SDavid Lechner const struct davinci_psc_init_data of_da850_psc1_init_data = { 146a47d6040SDavid Lechner .parent_clks = da850_psc1_parent_clks, 147a47d6040SDavid Lechner .num_parent_clks = ARRAY_SIZE(da850_psc1_parent_clks), 148a47d6040SDavid Lechner .psc_init = &of_da850_psc1_init, 149a47d6040SDavid Lechner }; 150