xref: /openbmc/linux/drivers/clk/clk.c (revision fed8b7e3)
1 /*
2  * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
3  * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundation.
8  *
9  * Standard functionality for the common clock API.  See Documentation/driver-api/clk.rst
10  */
11 
12 #include <linux/clk.h>
13 #include <linux/clk-provider.h>
14 #include <linux/clk/clk-conf.h>
15 #include <linux/module.h>
16 #include <linux/mutex.h>
17 #include <linux/spinlock.h>
18 #include <linux/err.h>
19 #include <linux/list.h>
20 #include <linux/slab.h>
21 #include <linux/of.h>
22 #include <linux/device.h>
23 #include <linux/init.h>
24 #include <linux/pm_runtime.h>
25 #include <linux/sched.h>
26 #include <linux/clkdev.h>
27 
28 #include "clk.h"
29 
30 static DEFINE_SPINLOCK(enable_lock);
31 static DEFINE_MUTEX(prepare_lock);
32 
33 static struct task_struct *prepare_owner;
34 static struct task_struct *enable_owner;
35 
36 static int prepare_refcnt;
37 static int enable_refcnt;
38 
39 static HLIST_HEAD(clk_root_list);
40 static HLIST_HEAD(clk_orphan_list);
41 static LIST_HEAD(clk_notifier_list);
42 
43 /***    private data structures    ***/
44 
45 struct clk_core {
46 	const char		*name;
47 	const struct clk_ops	*ops;
48 	struct clk_hw		*hw;
49 	struct module		*owner;
50 	struct device		*dev;
51 	struct clk_core		*parent;
52 	const char		**parent_names;
53 	struct clk_core		**parents;
54 	u8			num_parents;
55 	u8			new_parent_index;
56 	unsigned long		rate;
57 	unsigned long		req_rate;
58 	unsigned long		new_rate;
59 	struct clk_core		*new_parent;
60 	struct clk_core		*new_child;
61 	unsigned long		flags;
62 	bool			orphan;
63 	unsigned int		enable_count;
64 	unsigned int		prepare_count;
65 	unsigned int		protect_count;
66 	unsigned long		min_rate;
67 	unsigned long		max_rate;
68 	unsigned long		accuracy;
69 	int			phase;
70 	struct clk_duty		duty;
71 	struct hlist_head	children;
72 	struct hlist_node	child_node;
73 	struct hlist_head	clks;
74 	unsigned int		notifier_count;
75 #ifdef CONFIG_DEBUG_FS
76 	struct dentry		*dentry;
77 	struct hlist_node	debug_node;
78 #endif
79 	struct kref		ref;
80 };
81 
82 #define CREATE_TRACE_POINTS
83 #include <trace/events/clk.h>
84 
85 struct clk {
86 	struct clk_core	*core;
87 	const char *dev_id;
88 	const char *con_id;
89 	unsigned long min_rate;
90 	unsigned long max_rate;
91 	unsigned int exclusive_count;
92 	struct hlist_node clks_node;
93 };
94 
95 /***           runtime pm          ***/
96 static int clk_pm_runtime_get(struct clk_core *core)
97 {
98 	int ret = 0;
99 
100 	if (!core->dev)
101 		return 0;
102 
103 	ret = pm_runtime_get_sync(core->dev);
104 	return ret < 0 ? ret : 0;
105 }
106 
107 static void clk_pm_runtime_put(struct clk_core *core)
108 {
109 	if (!core->dev)
110 		return;
111 
112 	pm_runtime_put_sync(core->dev);
113 }
114 
115 /***           locking             ***/
116 static void clk_prepare_lock(void)
117 {
118 	if (!mutex_trylock(&prepare_lock)) {
119 		if (prepare_owner == current) {
120 			prepare_refcnt++;
121 			return;
122 		}
123 		mutex_lock(&prepare_lock);
124 	}
125 	WARN_ON_ONCE(prepare_owner != NULL);
126 	WARN_ON_ONCE(prepare_refcnt != 0);
127 	prepare_owner = current;
128 	prepare_refcnt = 1;
129 }
130 
131 static void clk_prepare_unlock(void)
132 {
133 	WARN_ON_ONCE(prepare_owner != current);
134 	WARN_ON_ONCE(prepare_refcnt == 0);
135 
136 	if (--prepare_refcnt)
137 		return;
138 	prepare_owner = NULL;
139 	mutex_unlock(&prepare_lock);
140 }
141 
142 static unsigned long clk_enable_lock(void)
143 	__acquires(enable_lock)
144 {
145 	unsigned long flags;
146 
147 	/*
148 	 * On UP systems, spin_trylock_irqsave() always returns true, even if
149 	 * we already hold the lock. So, in that case, we rely only on
150 	 * reference counting.
151 	 */
152 	if (!IS_ENABLED(CONFIG_SMP) ||
153 	    !spin_trylock_irqsave(&enable_lock, flags)) {
154 		if (enable_owner == current) {
155 			enable_refcnt++;
156 			__acquire(enable_lock);
157 			if (!IS_ENABLED(CONFIG_SMP))
158 				local_save_flags(flags);
159 			return flags;
160 		}
161 		spin_lock_irqsave(&enable_lock, flags);
162 	}
163 	WARN_ON_ONCE(enable_owner != NULL);
164 	WARN_ON_ONCE(enable_refcnt != 0);
165 	enable_owner = current;
166 	enable_refcnt = 1;
167 	return flags;
168 }
169 
170 static void clk_enable_unlock(unsigned long flags)
171 	__releases(enable_lock)
172 {
173 	WARN_ON_ONCE(enable_owner != current);
174 	WARN_ON_ONCE(enable_refcnt == 0);
175 
176 	if (--enable_refcnt) {
177 		__release(enable_lock);
178 		return;
179 	}
180 	enable_owner = NULL;
181 	spin_unlock_irqrestore(&enable_lock, flags);
182 }
183 
184 static bool clk_core_rate_is_protected(struct clk_core *core)
185 {
186 	return core->protect_count;
187 }
188 
189 static bool clk_core_is_prepared(struct clk_core *core)
190 {
191 	bool ret = false;
192 
193 	/*
194 	 * .is_prepared is optional for clocks that can prepare
195 	 * fall back to software usage counter if it is missing
196 	 */
197 	if (!core->ops->is_prepared)
198 		return core->prepare_count;
199 
200 	if (!clk_pm_runtime_get(core)) {
201 		ret = core->ops->is_prepared(core->hw);
202 		clk_pm_runtime_put(core);
203 	}
204 
205 	return ret;
206 }
207 
208 static bool clk_core_is_enabled(struct clk_core *core)
209 {
210 	bool ret = false;
211 
212 	/*
213 	 * .is_enabled is only mandatory for clocks that gate
214 	 * fall back to software usage counter if .is_enabled is missing
215 	 */
216 	if (!core->ops->is_enabled)
217 		return core->enable_count;
218 
219 	/*
220 	 * Check if clock controller's device is runtime active before
221 	 * calling .is_enabled callback. If not, assume that clock is
222 	 * disabled, because we might be called from atomic context, from
223 	 * which pm_runtime_get() is not allowed.
224 	 * This function is called mainly from clk_disable_unused_subtree,
225 	 * which ensures proper runtime pm activation of controller before
226 	 * taking enable spinlock, but the below check is needed if one tries
227 	 * to call it from other places.
228 	 */
229 	if (core->dev) {
230 		pm_runtime_get_noresume(core->dev);
231 		if (!pm_runtime_active(core->dev)) {
232 			ret = false;
233 			goto done;
234 		}
235 	}
236 
237 	ret = core->ops->is_enabled(core->hw);
238 done:
239 	if (core->dev)
240 		pm_runtime_put(core->dev);
241 
242 	return ret;
243 }
244 
245 /***    helper functions   ***/
246 
247 const char *__clk_get_name(const struct clk *clk)
248 {
249 	return !clk ? NULL : clk->core->name;
250 }
251 EXPORT_SYMBOL_GPL(__clk_get_name);
252 
253 const char *clk_hw_get_name(const struct clk_hw *hw)
254 {
255 	return hw->core->name;
256 }
257 EXPORT_SYMBOL_GPL(clk_hw_get_name);
258 
259 struct clk_hw *__clk_get_hw(struct clk *clk)
260 {
261 	return !clk ? NULL : clk->core->hw;
262 }
263 EXPORT_SYMBOL_GPL(__clk_get_hw);
264 
265 unsigned int clk_hw_get_num_parents(const struct clk_hw *hw)
266 {
267 	return hw->core->num_parents;
268 }
269 EXPORT_SYMBOL_GPL(clk_hw_get_num_parents);
270 
271 struct clk_hw *clk_hw_get_parent(const struct clk_hw *hw)
272 {
273 	return hw->core->parent ? hw->core->parent->hw : NULL;
274 }
275 EXPORT_SYMBOL_GPL(clk_hw_get_parent);
276 
277 static struct clk_core *__clk_lookup_subtree(const char *name,
278 					     struct clk_core *core)
279 {
280 	struct clk_core *child;
281 	struct clk_core *ret;
282 
283 	if (!strcmp(core->name, name))
284 		return core;
285 
286 	hlist_for_each_entry(child, &core->children, child_node) {
287 		ret = __clk_lookup_subtree(name, child);
288 		if (ret)
289 			return ret;
290 	}
291 
292 	return NULL;
293 }
294 
295 static struct clk_core *clk_core_lookup(const char *name)
296 {
297 	struct clk_core *root_clk;
298 	struct clk_core *ret;
299 
300 	if (!name)
301 		return NULL;
302 
303 	/* search the 'proper' clk tree first */
304 	hlist_for_each_entry(root_clk, &clk_root_list, child_node) {
305 		ret = __clk_lookup_subtree(name, root_clk);
306 		if (ret)
307 			return ret;
308 	}
309 
310 	/* if not found, then search the orphan tree */
311 	hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) {
312 		ret = __clk_lookup_subtree(name, root_clk);
313 		if (ret)
314 			return ret;
315 	}
316 
317 	return NULL;
318 }
319 
320 static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core,
321 							 u8 index)
322 {
323 	if (!core || index >= core->num_parents)
324 		return NULL;
325 
326 	if (!core->parents[index])
327 		core->parents[index] =
328 				clk_core_lookup(core->parent_names[index]);
329 
330 	return core->parents[index];
331 }
332 
333 struct clk_hw *
334 clk_hw_get_parent_by_index(const struct clk_hw *hw, unsigned int index)
335 {
336 	struct clk_core *parent;
337 
338 	parent = clk_core_get_parent_by_index(hw->core, index);
339 
340 	return !parent ? NULL : parent->hw;
341 }
342 EXPORT_SYMBOL_GPL(clk_hw_get_parent_by_index);
343 
344 unsigned int __clk_get_enable_count(struct clk *clk)
345 {
346 	return !clk ? 0 : clk->core->enable_count;
347 }
348 
349 static unsigned long clk_core_get_rate_nolock(struct clk_core *core)
350 {
351 	unsigned long ret;
352 
353 	if (!core) {
354 		ret = 0;
355 		goto out;
356 	}
357 
358 	ret = core->rate;
359 
360 	if (!core->num_parents)
361 		goto out;
362 
363 	if (!core->parent)
364 		ret = 0;
365 
366 out:
367 	return ret;
368 }
369 
370 unsigned long clk_hw_get_rate(const struct clk_hw *hw)
371 {
372 	return clk_core_get_rate_nolock(hw->core);
373 }
374 EXPORT_SYMBOL_GPL(clk_hw_get_rate);
375 
376 static unsigned long __clk_get_accuracy(struct clk_core *core)
377 {
378 	if (!core)
379 		return 0;
380 
381 	return core->accuracy;
382 }
383 
384 unsigned long __clk_get_flags(struct clk *clk)
385 {
386 	return !clk ? 0 : clk->core->flags;
387 }
388 EXPORT_SYMBOL_GPL(__clk_get_flags);
389 
390 unsigned long clk_hw_get_flags(const struct clk_hw *hw)
391 {
392 	return hw->core->flags;
393 }
394 EXPORT_SYMBOL_GPL(clk_hw_get_flags);
395 
396 bool clk_hw_is_prepared(const struct clk_hw *hw)
397 {
398 	return clk_core_is_prepared(hw->core);
399 }
400 
401 bool clk_hw_rate_is_protected(const struct clk_hw *hw)
402 {
403 	return clk_core_rate_is_protected(hw->core);
404 }
405 
406 bool clk_hw_is_enabled(const struct clk_hw *hw)
407 {
408 	return clk_core_is_enabled(hw->core);
409 }
410 
411 bool __clk_is_enabled(struct clk *clk)
412 {
413 	if (!clk)
414 		return false;
415 
416 	return clk_core_is_enabled(clk->core);
417 }
418 EXPORT_SYMBOL_GPL(__clk_is_enabled);
419 
420 static bool mux_is_better_rate(unsigned long rate, unsigned long now,
421 			   unsigned long best, unsigned long flags)
422 {
423 	if (flags & CLK_MUX_ROUND_CLOSEST)
424 		return abs(now - rate) < abs(best - rate);
425 
426 	return now <= rate && now > best;
427 }
428 
429 int clk_mux_determine_rate_flags(struct clk_hw *hw,
430 				 struct clk_rate_request *req,
431 				 unsigned long flags)
432 {
433 	struct clk_core *core = hw->core, *parent, *best_parent = NULL;
434 	int i, num_parents, ret;
435 	unsigned long best = 0;
436 	struct clk_rate_request parent_req = *req;
437 
438 	/* if NO_REPARENT flag set, pass through to current parent */
439 	if (core->flags & CLK_SET_RATE_NO_REPARENT) {
440 		parent = core->parent;
441 		if (core->flags & CLK_SET_RATE_PARENT) {
442 			ret = __clk_determine_rate(parent ? parent->hw : NULL,
443 						   &parent_req);
444 			if (ret)
445 				return ret;
446 
447 			best = parent_req.rate;
448 		} else if (parent) {
449 			best = clk_core_get_rate_nolock(parent);
450 		} else {
451 			best = clk_core_get_rate_nolock(core);
452 		}
453 
454 		goto out;
455 	}
456 
457 	/* find the parent that can provide the fastest rate <= rate */
458 	num_parents = core->num_parents;
459 	for (i = 0; i < num_parents; i++) {
460 		parent = clk_core_get_parent_by_index(core, i);
461 		if (!parent)
462 			continue;
463 
464 		if (core->flags & CLK_SET_RATE_PARENT) {
465 			parent_req = *req;
466 			ret = __clk_determine_rate(parent->hw, &parent_req);
467 			if (ret)
468 				continue;
469 		} else {
470 			parent_req.rate = clk_core_get_rate_nolock(parent);
471 		}
472 
473 		if (mux_is_better_rate(req->rate, parent_req.rate,
474 				       best, flags)) {
475 			best_parent = parent;
476 			best = parent_req.rate;
477 		}
478 	}
479 
480 	if (!best_parent)
481 		return -EINVAL;
482 
483 out:
484 	if (best_parent)
485 		req->best_parent_hw = best_parent->hw;
486 	req->best_parent_rate = best;
487 	req->rate = best;
488 
489 	return 0;
490 }
491 EXPORT_SYMBOL_GPL(clk_mux_determine_rate_flags);
492 
493 struct clk *__clk_lookup(const char *name)
494 {
495 	struct clk_core *core = clk_core_lookup(name);
496 
497 	return !core ? NULL : core->hw->clk;
498 }
499 
500 static void clk_core_get_boundaries(struct clk_core *core,
501 				    unsigned long *min_rate,
502 				    unsigned long *max_rate)
503 {
504 	struct clk *clk_user;
505 
506 	*min_rate = core->min_rate;
507 	*max_rate = core->max_rate;
508 
509 	hlist_for_each_entry(clk_user, &core->clks, clks_node)
510 		*min_rate = max(*min_rate, clk_user->min_rate);
511 
512 	hlist_for_each_entry(clk_user, &core->clks, clks_node)
513 		*max_rate = min(*max_rate, clk_user->max_rate);
514 }
515 
516 void clk_hw_set_rate_range(struct clk_hw *hw, unsigned long min_rate,
517 			   unsigned long max_rate)
518 {
519 	hw->core->min_rate = min_rate;
520 	hw->core->max_rate = max_rate;
521 }
522 EXPORT_SYMBOL_GPL(clk_hw_set_rate_range);
523 
524 /*
525  * Helper for finding best parent to provide a given frequency. This can be used
526  * directly as a determine_rate callback (e.g. for a mux), or from a more
527  * complex clock that may combine a mux with other operations.
528  */
529 int __clk_mux_determine_rate(struct clk_hw *hw,
530 			     struct clk_rate_request *req)
531 {
532 	return clk_mux_determine_rate_flags(hw, req, 0);
533 }
534 EXPORT_SYMBOL_GPL(__clk_mux_determine_rate);
535 
536 int __clk_mux_determine_rate_closest(struct clk_hw *hw,
537 				     struct clk_rate_request *req)
538 {
539 	return clk_mux_determine_rate_flags(hw, req, CLK_MUX_ROUND_CLOSEST);
540 }
541 EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest);
542 
543 /***        clk api        ***/
544 
545 static void clk_core_rate_unprotect(struct clk_core *core)
546 {
547 	lockdep_assert_held(&prepare_lock);
548 
549 	if (!core)
550 		return;
551 
552 	if (WARN(core->protect_count == 0,
553 	    "%s already unprotected\n", core->name))
554 		return;
555 
556 	if (--core->protect_count > 0)
557 		return;
558 
559 	clk_core_rate_unprotect(core->parent);
560 }
561 
562 static int clk_core_rate_nuke_protect(struct clk_core *core)
563 {
564 	int ret;
565 
566 	lockdep_assert_held(&prepare_lock);
567 
568 	if (!core)
569 		return -EINVAL;
570 
571 	if (core->protect_count == 0)
572 		return 0;
573 
574 	ret = core->protect_count;
575 	core->protect_count = 1;
576 	clk_core_rate_unprotect(core);
577 
578 	return ret;
579 }
580 
581 /**
582  * clk_rate_exclusive_put - release exclusivity over clock rate control
583  * @clk: the clk over which the exclusivity is released
584  *
585  * clk_rate_exclusive_put() completes a critical section during which a clock
586  * consumer cannot tolerate any other consumer making any operation on the
587  * clock which could result in a rate change or rate glitch. Exclusive clocks
588  * cannot have their rate changed, either directly or indirectly due to changes
589  * further up the parent chain of clocks. As a result, clocks up parent chain
590  * also get under exclusive control of the calling consumer.
591  *
592  * If exlusivity is claimed more than once on clock, even by the same consumer,
593  * the rate effectively gets locked as exclusivity can't be preempted.
594  *
595  * Calls to clk_rate_exclusive_put() must be balanced with calls to
596  * clk_rate_exclusive_get(). Calls to this function may sleep, and do not return
597  * error status.
598  */
599 void clk_rate_exclusive_put(struct clk *clk)
600 {
601 	if (!clk)
602 		return;
603 
604 	clk_prepare_lock();
605 
606 	/*
607 	 * if there is something wrong with this consumer protect count, stop
608 	 * here before messing with the provider
609 	 */
610 	if (WARN_ON(clk->exclusive_count <= 0))
611 		goto out;
612 
613 	clk_core_rate_unprotect(clk->core);
614 	clk->exclusive_count--;
615 out:
616 	clk_prepare_unlock();
617 }
618 EXPORT_SYMBOL_GPL(clk_rate_exclusive_put);
619 
620 static void clk_core_rate_protect(struct clk_core *core)
621 {
622 	lockdep_assert_held(&prepare_lock);
623 
624 	if (!core)
625 		return;
626 
627 	if (core->protect_count == 0)
628 		clk_core_rate_protect(core->parent);
629 
630 	core->protect_count++;
631 }
632 
633 static void clk_core_rate_restore_protect(struct clk_core *core, int count)
634 {
635 	lockdep_assert_held(&prepare_lock);
636 
637 	if (!core)
638 		return;
639 
640 	if (count == 0)
641 		return;
642 
643 	clk_core_rate_protect(core);
644 	core->protect_count = count;
645 }
646 
647 /**
648  * clk_rate_exclusive_get - get exclusivity over the clk rate control
649  * @clk: the clk over which the exclusity of rate control is requested
650  *
651  * clk_rate_exlusive_get() begins a critical section during which a clock
652  * consumer cannot tolerate any other consumer making any operation on the
653  * clock which could result in a rate change or rate glitch. Exclusive clocks
654  * cannot have their rate changed, either directly or indirectly due to changes
655  * further up the parent chain of clocks. As a result, clocks up parent chain
656  * also get under exclusive control of the calling consumer.
657  *
658  * If exlusivity is claimed more than once on clock, even by the same consumer,
659  * the rate effectively gets locked as exclusivity can't be preempted.
660  *
661  * Calls to clk_rate_exclusive_get() should be balanced with calls to
662  * clk_rate_exclusive_put(). Calls to this function may sleep.
663  * Returns 0 on success, -EERROR otherwise
664  */
665 int clk_rate_exclusive_get(struct clk *clk)
666 {
667 	if (!clk)
668 		return 0;
669 
670 	clk_prepare_lock();
671 	clk_core_rate_protect(clk->core);
672 	clk->exclusive_count++;
673 	clk_prepare_unlock();
674 
675 	return 0;
676 }
677 EXPORT_SYMBOL_GPL(clk_rate_exclusive_get);
678 
679 static void clk_core_unprepare(struct clk_core *core)
680 {
681 	lockdep_assert_held(&prepare_lock);
682 
683 	if (!core)
684 		return;
685 
686 	if (WARN(core->prepare_count == 0,
687 	    "%s already unprepared\n", core->name))
688 		return;
689 
690 	if (WARN(core->prepare_count == 1 && core->flags & CLK_IS_CRITICAL,
691 	    "Unpreparing critical %s\n", core->name))
692 		return;
693 
694 	if (core->flags & CLK_SET_RATE_GATE)
695 		clk_core_rate_unprotect(core);
696 
697 	if (--core->prepare_count > 0)
698 		return;
699 
700 	WARN(core->enable_count > 0, "Unpreparing enabled %s\n", core->name);
701 
702 	trace_clk_unprepare(core);
703 
704 	if (core->ops->unprepare)
705 		core->ops->unprepare(core->hw);
706 
707 	clk_pm_runtime_put(core);
708 
709 	trace_clk_unprepare_complete(core);
710 	clk_core_unprepare(core->parent);
711 }
712 
713 static void clk_core_unprepare_lock(struct clk_core *core)
714 {
715 	clk_prepare_lock();
716 	clk_core_unprepare(core);
717 	clk_prepare_unlock();
718 }
719 
720 /**
721  * clk_unprepare - undo preparation of a clock source
722  * @clk: the clk being unprepared
723  *
724  * clk_unprepare may sleep, which differentiates it from clk_disable.  In a
725  * simple case, clk_unprepare can be used instead of clk_disable to gate a clk
726  * if the operation may sleep.  One example is a clk which is accessed over
727  * I2c.  In the complex case a clk gate operation may require a fast and a slow
728  * part.  It is this reason that clk_unprepare and clk_disable are not mutually
729  * exclusive.  In fact clk_disable must be called before clk_unprepare.
730  */
731 void clk_unprepare(struct clk *clk)
732 {
733 	if (IS_ERR_OR_NULL(clk))
734 		return;
735 
736 	clk_core_unprepare_lock(clk->core);
737 }
738 EXPORT_SYMBOL_GPL(clk_unprepare);
739 
740 static int clk_core_prepare(struct clk_core *core)
741 {
742 	int ret = 0;
743 
744 	lockdep_assert_held(&prepare_lock);
745 
746 	if (!core)
747 		return 0;
748 
749 	if (core->prepare_count == 0) {
750 		ret = clk_pm_runtime_get(core);
751 		if (ret)
752 			return ret;
753 
754 		ret = clk_core_prepare(core->parent);
755 		if (ret)
756 			goto runtime_put;
757 
758 		trace_clk_prepare(core);
759 
760 		if (core->ops->prepare)
761 			ret = core->ops->prepare(core->hw);
762 
763 		trace_clk_prepare_complete(core);
764 
765 		if (ret)
766 			goto unprepare;
767 	}
768 
769 	core->prepare_count++;
770 
771 	/*
772 	 * CLK_SET_RATE_GATE is a special case of clock protection
773 	 * Instead of a consumer claiming exclusive rate control, it is
774 	 * actually the provider which prevents any consumer from making any
775 	 * operation which could result in a rate change or rate glitch while
776 	 * the clock is prepared.
777 	 */
778 	if (core->flags & CLK_SET_RATE_GATE)
779 		clk_core_rate_protect(core);
780 
781 	return 0;
782 unprepare:
783 	clk_core_unprepare(core->parent);
784 runtime_put:
785 	clk_pm_runtime_put(core);
786 	return ret;
787 }
788 
789 static int clk_core_prepare_lock(struct clk_core *core)
790 {
791 	int ret;
792 
793 	clk_prepare_lock();
794 	ret = clk_core_prepare(core);
795 	clk_prepare_unlock();
796 
797 	return ret;
798 }
799 
800 /**
801  * clk_prepare - prepare a clock source
802  * @clk: the clk being prepared
803  *
804  * clk_prepare may sleep, which differentiates it from clk_enable.  In a simple
805  * case, clk_prepare can be used instead of clk_enable to ungate a clk if the
806  * operation may sleep.  One example is a clk which is accessed over I2c.  In
807  * the complex case a clk ungate operation may require a fast and a slow part.
808  * It is this reason that clk_prepare and clk_enable are not mutually
809  * exclusive.  In fact clk_prepare must be called before clk_enable.
810  * Returns 0 on success, -EERROR otherwise.
811  */
812 int clk_prepare(struct clk *clk)
813 {
814 	if (!clk)
815 		return 0;
816 
817 	return clk_core_prepare_lock(clk->core);
818 }
819 EXPORT_SYMBOL_GPL(clk_prepare);
820 
821 static void clk_core_disable(struct clk_core *core)
822 {
823 	lockdep_assert_held(&enable_lock);
824 
825 	if (!core)
826 		return;
827 
828 	if (WARN(core->enable_count == 0, "%s already disabled\n", core->name))
829 		return;
830 
831 	if (WARN(core->enable_count == 1 && core->flags & CLK_IS_CRITICAL,
832 	    "Disabling critical %s\n", core->name))
833 		return;
834 
835 	if (--core->enable_count > 0)
836 		return;
837 
838 	trace_clk_disable_rcuidle(core);
839 
840 	if (core->ops->disable)
841 		core->ops->disable(core->hw);
842 
843 	trace_clk_disable_complete_rcuidle(core);
844 
845 	clk_core_disable(core->parent);
846 }
847 
848 static void clk_core_disable_lock(struct clk_core *core)
849 {
850 	unsigned long flags;
851 
852 	flags = clk_enable_lock();
853 	clk_core_disable(core);
854 	clk_enable_unlock(flags);
855 }
856 
857 /**
858  * clk_disable - gate a clock
859  * @clk: the clk being gated
860  *
861  * clk_disable must not sleep, which differentiates it from clk_unprepare.  In
862  * a simple case, clk_disable can be used instead of clk_unprepare to gate a
863  * clk if the operation is fast and will never sleep.  One example is a
864  * SoC-internal clk which is controlled via simple register writes.  In the
865  * complex case a clk gate operation may require a fast and a slow part.  It is
866  * this reason that clk_unprepare and clk_disable are not mutually exclusive.
867  * In fact clk_disable must be called before clk_unprepare.
868  */
869 void clk_disable(struct clk *clk)
870 {
871 	if (IS_ERR_OR_NULL(clk))
872 		return;
873 
874 	clk_core_disable_lock(clk->core);
875 }
876 EXPORT_SYMBOL_GPL(clk_disable);
877 
878 static int clk_core_enable(struct clk_core *core)
879 {
880 	int ret = 0;
881 
882 	lockdep_assert_held(&enable_lock);
883 
884 	if (!core)
885 		return 0;
886 
887 	if (WARN(core->prepare_count == 0,
888 	    "Enabling unprepared %s\n", core->name))
889 		return -ESHUTDOWN;
890 
891 	if (core->enable_count == 0) {
892 		ret = clk_core_enable(core->parent);
893 
894 		if (ret)
895 			return ret;
896 
897 		trace_clk_enable_rcuidle(core);
898 
899 		if (core->ops->enable)
900 			ret = core->ops->enable(core->hw);
901 
902 		trace_clk_enable_complete_rcuidle(core);
903 
904 		if (ret) {
905 			clk_core_disable(core->parent);
906 			return ret;
907 		}
908 	}
909 
910 	core->enable_count++;
911 	return 0;
912 }
913 
914 static int clk_core_enable_lock(struct clk_core *core)
915 {
916 	unsigned long flags;
917 	int ret;
918 
919 	flags = clk_enable_lock();
920 	ret = clk_core_enable(core);
921 	clk_enable_unlock(flags);
922 
923 	return ret;
924 }
925 
926 /**
927  * clk_gate_restore_context - restore context for poweroff
928  * @hw: the clk_hw pointer of clock whose state is to be restored
929  *
930  * The clock gate restore context function enables or disables
931  * the gate clocks based on the enable_count. This is done in cases
932  * where the clock context is lost and based on the enable_count
933  * the clock either needs to be enabled/disabled. This
934  * helps restore the state of gate clocks.
935  */
936 void clk_gate_restore_context(struct clk_hw *hw)
937 {
938 	struct clk_core *core = hw->core;
939 
940 	if (core->enable_count)
941 		core->ops->enable(hw);
942 	else
943 		core->ops->disable(hw);
944 }
945 EXPORT_SYMBOL_GPL(clk_gate_restore_context);
946 
947 static int clk_core_save_context(struct clk_core *core)
948 {
949 	struct clk_core *child;
950 	int ret = 0;
951 
952 	hlist_for_each_entry(child, &core->children, child_node) {
953 		ret = clk_core_save_context(child);
954 		if (ret < 0)
955 			return ret;
956 	}
957 
958 	if (core->ops && core->ops->save_context)
959 		ret = core->ops->save_context(core->hw);
960 
961 	return ret;
962 }
963 
964 static void clk_core_restore_context(struct clk_core *core)
965 {
966 	struct clk_core *child;
967 
968 	if (core->ops && core->ops->restore_context)
969 		core->ops->restore_context(core->hw);
970 
971 	hlist_for_each_entry(child, &core->children, child_node)
972 		clk_core_restore_context(child);
973 }
974 
975 /**
976  * clk_save_context - save clock context for poweroff
977  *
978  * Saves the context of the clock register for powerstates in which the
979  * contents of the registers will be lost. Occurs deep within the suspend
980  * code.  Returns 0 on success.
981  */
982 int clk_save_context(void)
983 {
984 	struct clk_core *clk;
985 	int ret;
986 
987 	hlist_for_each_entry(clk, &clk_root_list, child_node) {
988 		ret = clk_core_save_context(clk);
989 		if (ret < 0)
990 			return ret;
991 	}
992 
993 	hlist_for_each_entry(clk, &clk_orphan_list, child_node) {
994 		ret = clk_core_save_context(clk);
995 		if (ret < 0)
996 			return ret;
997 	}
998 
999 	return 0;
1000 }
1001 EXPORT_SYMBOL_GPL(clk_save_context);
1002 
1003 /**
1004  * clk_restore_context - restore clock context after poweroff
1005  *
1006  * Restore the saved clock context upon resume.
1007  *
1008  */
1009 void clk_restore_context(void)
1010 {
1011 	struct clk_core *core;
1012 
1013 	hlist_for_each_entry(core, &clk_root_list, child_node)
1014 		clk_core_restore_context(core);
1015 
1016 	hlist_for_each_entry(core, &clk_orphan_list, child_node)
1017 		clk_core_restore_context(core);
1018 }
1019 EXPORT_SYMBOL_GPL(clk_restore_context);
1020 
1021 /**
1022  * clk_enable - ungate a clock
1023  * @clk: the clk being ungated
1024  *
1025  * clk_enable must not sleep, which differentiates it from clk_prepare.  In a
1026  * simple case, clk_enable can be used instead of clk_prepare to ungate a clk
1027  * if the operation will never sleep.  One example is a SoC-internal clk which
1028  * is controlled via simple register writes.  In the complex case a clk ungate
1029  * operation may require a fast and a slow part.  It is this reason that
1030  * clk_enable and clk_prepare are not mutually exclusive.  In fact clk_prepare
1031  * must be called before clk_enable.  Returns 0 on success, -EERROR
1032  * otherwise.
1033  */
1034 int clk_enable(struct clk *clk)
1035 {
1036 	if (!clk)
1037 		return 0;
1038 
1039 	return clk_core_enable_lock(clk->core);
1040 }
1041 EXPORT_SYMBOL_GPL(clk_enable);
1042 
1043 static int clk_core_prepare_enable(struct clk_core *core)
1044 {
1045 	int ret;
1046 
1047 	ret = clk_core_prepare_lock(core);
1048 	if (ret)
1049 		return ret;
1050 
1051 	ret = clk_core_enable_lock(core);
1052 	if (ret)
1053 		clk_core_unprepare_lock(core);
1054 
1055 	return ret;
1056 }
1057 
1058 static void clk_core_disable_unprepare(struct clk_core *core)
1059 {
1060 	clk_core_disable_lock(core);
1061 	clk_core_unprepare_lock(core);
1062 }
1063 
1064 static void clk_unprepare_unused_subtree(struct clk_core *core)
1065 {
1066 	struct clk_core *child;
1067 
1068 	lockdep_assert_held(&prepare_lock);
1069 
1070 	hlist_for_each_entry(child, &core->children, child_node)
1071 		clk_unprepare_unused_subtree(child);
1072 
1073 	if (core->prepare_count)
1074 		return;
1075 
1076 	if (core->flags & CLK_IGNORE_UNUSED)
1077 		return;
1078 
1079 	if (clk_pm_runtime_get(core))
1080 		return;
1081 
1082 	if (clk_core_is_prepared(core)) {
1083 		trace_clk_unprepare(core);
1084 		if (core->ops->unprepare_unused)
1085 			core->ops->unprepare_unused(core->hw);
1086 		else if (core->ops->unprepare)
1087 			core->ops->unprepare(core->hw);
1088 		trace_clk_unprepare_complete(core);
1089 	}
1090 
1091 	clk_pm_runtime_put(core);
1092 }
1093 
1094 static void clk_disable_unused_subtree(struct clk_core *core)
1095 {
1096 	struct clk_core *child;
1097 	unsigned long flags;
1098 
1099 	lockdep_assert_held(&prepare_lock);
1100 
1101 	hlist_for_each_entry(child, &core->children, child_node)
1102 		clk_disable_unused_subtree(child);
1103 
1104 	if (core->flags & CLK_OPS_PARENT_ENABLE)
1105 		clk_core_prepare_enable(core->parent);
1106 
1107 	if (clk_pm_runtime_get(core))
1108 		goto unprepare_out;
1109 
1110 	flags = clk_enable_lock();
1111 
1112 	if (core->enable_count)
1113 		goto unlock_out;
1114 
1115 	if (core->flags & CLK_IGNORE_UNUSED)
1116 		goto unlock_out;
1117 
1118 	/*
1119 	 * some gate clocks have special needs during the disable-unused
1120 	 * sequence.  call .disable_unused if available, otherwise fall
1121 	 * back to .disable
1122 	 */
1123 	if (clk_core_is_enabled(core)) {
1124 		trace_clk_disable(core);
1125 		if (core->ops->disable_unused)
1126 			core->ops->disable_unused(core->hw);
1127 		else if (core->ops->disable)
1128 			core->ops->disable(core->hw);
1129 		trace_clk_disable_complete(core);
1130 	}
1131 
1132 unlock_out:
1133 	clk_enable_unlock(flags);
1134 	clk_pm_runtime_put(core);
1135 unprepare_out:
1136 	if (core->flags & CLK_OPS_PARENT_ENABLE)
1137 		clk_core_disable_unprepare(core->parent);
1138 }
1139 
1140 static bool clk_ignore_unused;
1141 static int __init clk_ignore_unused_setup(char *__unused)
1142 {
1143 	clk_ignore_unused = true;
1144 	return 1;
1145 }
1146 __setup("clk_ignore_unused", clk_ignore_unused_setup);
1147 
1148 static int clk_disable_unused(void)
1149 {
1150 	struct clk_core *core;
1151 
1152 	if (clk_ignore_unused) {
1153 		pr_warn("clk: Not disabling unused clocks\n");
1154 		return 0;
1155 	}
1156 
1157 	clk_prepare_lock();
1158 
1159 	hlist_for_each_entry(core, &clk_root_list, child_node)
1160 		clk_disable_unused_subtree(core);
1161 
1162 	hlist_for_each_entry(core, &clk_orphan_list, child_node)
1163 		clk_disable_unused_subtree(core);
1164 
1165 	hlist_for_each_entry(core, &clk_root_list, child_node)
1166 		clk_unprepare_unused_subtree(core);
1167 
1168 	hlist_for_each_entry(core, &clk_orphan_list, child_node)
1169 		clk_unprepare_unused_subtree(core);
1170 
1171 	clk_prepare_unlock();
1172 
1173 	return 0;
1174 }
1175 late_initcall_sync(clk_disable_unused);
1176 
1177 static int clk_core_determine_round_nolock(struct clk_core *core,
1178 					   struct clk_rate_request *req)
1179 {
1180 	long rate;
1181 
1182 	lockdep_assert_held(&prepare_lock);
1183 
1184 	if (!core)
1185 		return 0;
1186 
1187 	/*
1188 	 * At this point, core protection will be disabled if
1189 	 * - if the provider is not protected at all
1190 	 * - if the calling consumer is the only one which has exclusivity
1191 	 *   over the provider
1192 	 */
1193 	if (clk_core_rate_is_protected(core)) {
1194 		req->rate = core->rate;
1195 	} else if (core->ops->determine_rate) {
1196 		return core->ops->determine_rate(core->hw, req);
1197 	} else if (core->ops->round_rate) {
1198 		rate = core->ops->round_rate(core->hw, req->rate,
1199 					     &req->best_parent_rate);
1200 		if (rate < 0)
1201 			return rate;
1202 
1203 		req->rate = rate;
1204 	} else {
1205 		return -EINVAL;
1206 	}
1207 
1208 	return 0;
1209 }
1210 
1211 static void clk_core_init_rate_req(struct clk_core * const core,
1212 				   struct clk_rate_request *req)
1213 {
1214 	struct clk_core *parent;
1215 
1216 	if (WARN_ON(!core || !req))
1217 		return;
1218 
1219 	parent = core->parent;
1220 	if (parent) {
1221 		req->best_parent_hw = parent->hw;
1222 		req->best_parent_rate = parent->rate;
1223 	} else {
1224 		req->best_parent_hw = NULL;
1225 		req->best_parent_rate = 0;
1226 	}
1227 }
1228 
1229 static bool clk_core_can_round(struct clk_core * const core)
1230 {
1231 	if (core->ops->determine_rate || core->ops->round_rate)
1232 		return true;
1233 
1234 	return false;
1235 }
1236 
1237 static int clk_core_round_rate_nolock(struct clk_core *core,
1238 				      struct clk_rate_request *req)
1239 {
1240 	lockdep_assert_held(&prepare_lock);
1241 
1242 	if (!core) {
1243 		req->rate = 0;
1244 		return 0;
1245 	}
1246 
1247 	clk_core_init_rate_req(core, req);
1248 
1249 	if (clk_core_can_round(core))
1250 		return clk_core_determine_round_nolock(core, req);
1251 	else if (core->flags & CLK_SET_RATE_PARENT)
1252 		return clk_core_round_rate_nolock(core->parent, req);
1253 
1254 	req->rate = core->rate;
1255 	return 0;
1256 }
1257 
1258 /**
1259  * __clk_determine_rate - get the closest rate actually supported by a clock
1260  * @hw: determine the rate of this clock
1261  * @req: target rate request
1262  *
1263  * Useful for clk_ops such as .set_rate and .determine_rate.
1264  */
1265 int __clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req)
1266 {
1267 	if (!hw) {
1268 		req->rate = 0;
1269 		return 0;
1270 	}
1271 
1272 	return clk_core_round_rate_nolock(hw->core, req);
1273 }
1274 EXPORT_SYMBOL_GPL(__clk_determine_rate);
1275 
1276 unsigned long clk_hw_round_rate(struct clk_hw *hw, unsigned long rate)
1277 {
1278 	int ret;
1279 	struct clk_rate_request req;
1280 
1281 	clk_core_get_boundaries(hw->core, &req.min_rate, &req.max_rate);
1282 	req.rate = rate;
1283 
1284 	ret = clk_core_round_rate_nolock(hw->core, &req);
1285 	if (ret)
1286 		return 0;
1287 
1288 	return req.rate;
1289 }
1290 EXPORT_SYMBOL_GPL(clk_hw_round_rate);
1291 
1292 /**
1293  * clk_round_rate - round the given rate for a clk
1294  * @clk: the clk for which we are rounding a rate
1295  * @rate: the rate which is to be rounded
1296  *
1297  * Takes in a rate as input and rounds it to a rate that the clk can actually
1298  * use which is then returned.  If clk doesn't support round_rate operation
1299  * then the parent rate is returned.
1300  */
1301 long clk_round_rate(struct clk *clk, unsigned long rate)
1302 {
1303 	struct clk_rate_request req;
1304 	int ret;
1305 
1306 	if (!clk)
1307 		return 0;
1308 
1309 	clk_prepare_lock();
1310 
1311 	if (clk->exclusive_count)
1312 		clk_core_rate_unprotect(clk->core);
1313 
1314 	clk_core_get_boundaries(clk->core, &req.min_rate, &req.max_rate);
1315 	req.rate = rate;
1316 
1317 	ret = clk_core_round_rate_nolock(clk->core, &req);
1318 
1319 	if (clk->exclusive_count)
1320 		clk_core_rate_protect(clk->core);
1321 
1322 	clk_prepare_unlock();
1323 
1324 	if (ret)
1325 		return ret;
1326 
1327 	return req.rate;
1328 }
1329 EXPORT_SYMBOL_GPL(clk_round_rate);
1330 
1331 /**
1332  * __clk_notify - call clk notifier chain
1333  * @core: clk that is changing rate
1334  * @msg: clk notifier type (see include/linux/clk.h)
1335  * @old_rate: old clk rate
1336  * @new_rate: new clk rate
1337  *
1338  * Triggers a notifier call chain on the clk rate-change notification
1339  * for 'clk'.  Passes a pointer to the struct clk and the previous
1340  * and current rates to the notifier callback.  Intended to be called by
1341  * internal clock code only.  Returns NOTIFY_DONE from the last driver
1342  * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if
1343  * a driver returns that.
1344  */
1345 static int __clk_notify(struct clk_core *core, unsigned long msg,
1346 		unsigned long old_rate, unsigned long new_rate)
1347 {
1348 	struct clk_notifier *cn;
1349 	struct clk_notifier_data cnd;
1350 	int ret = NOTIFY_DONE;
1351 
1352 	cnd.old_rate = old_rate;
1353 	cnd.new_rate = new_rate;
1354 
1355 	list_for_each_entry(cn, &clk_notifier_list, node) {
1356 		if (cn->clk->core == core) {
1357 			cnd.clk = cn->clk;
1358 			ret = srcu_notifier_call_chain(&cn->notifier_head, msg,
1359 					&cnd);
1360 			if (ret & NOTIFY_STOP_MASK)
1361 				return ret;
1362 		}
1363 	}
1364 
1365 	return ret;
1366 }
1367 
1368 /**
1369  * __clk_recalc_accuracies
1370  * @core: first clk in the subtree
1371  *
1372  * Walks the subtree of clks starting with clk and recalculates accuracies as
1373  * it goes.  Note that if a clk does not implement the .recalc_accuracy
1374  * callback then it is assumed that the clock will take on the accuracy of its
1375  * parent.
1376  */
1377 static void __clk_recalc_accuracies(struct clk_core *core)
1378 {
1379 	unsigned long parent_accuracy = 0;
1380 	struct clk_core *child;
1381 
1382 	lockdep_assert_held(&prepare_lock);
1383 
1384 	if (core->parent)
1385 		parent_accuracy = core->parent->accuracy;
1386 
1387 	if (core->ops->recalc_accuracy)
1388 		core->accuracy = core->ops->recalc_accuracy(core->hw,
1389 							  parent_accuracy);
1390 	else
1391 		core->accuracy = parent_accuracy;
1392 
1393 	hlist_for_each_entry(child, &core->children, child_node)
1394 		__clk_recalc_accuracies(child);
1395 }
1396 
1397 static long clk_core_get_accuracy(struct clk_core *core)
1398 {
1399 	unsigned long accuracy;
1400 
1401 	clk_prepare_lock();
1402 	if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE))
1403 		__clk_recalc_accuracies(core);
1404 
1405 	accuracy = __clk_get_accuracy(core);
1406 	clk_prepare_unlock();
1407 
1408 	return accuracy;
1409 }
1410 
1411 /**
1412  * clk_get_accuracy - return the accuracy of clk
1413  * @clk: the clk whose accuracy is being returned
1414  *
1415  * Simply returns the cached accuracy of the clk, unless
1416  * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be
1417  * issued.
1418  * If clk is NULL then returns 0.
1419  */
1420 long clk_get_accuracy(struct clk *clk)
1421 {
1422 	if (!clk)
1423 		return 0;
1424 
1425 	return clk_core_get_accuracy(clk->core);
1426 }
1427 EXPORT_SYMBOL_GPL(clk_get_accuracy);
1428 
1429 static unsigned long clk_recalc(struct clk_core *core,
1430 				unsigned long parent_rate)
1431 {
1432 	unsigned long rate = parent_rate;
1433 
1434 	if (core->ops->recalc_rate && !clk_pm_runtime_get(core)) {
1435 		rate = core->ops->recalc_rate(core->hw, parent_rate);
1436 		clk_pm_runtime_put(core);
1437 	}
1438 	return rate;
1439 }
1440 
1441 /**
1442  * __clk_recalc_rates
1443  * @core: first clk in the subtree
1444  * @msg: notification type (see include/linux/clk.h)
1445  *
1446  * Walks the subtree of clks starting with clk and recalculates rates as it
1447  * goes.  Note that if a clk does not implement the .recalc_rate callback then
1448  * it is assumed that the clock will take on the rate of its parent.
1449  *
1450  * clk_recalc_rates also propagates the POST_RATE_CHANGE notification,
1451  * if necessary.
1452  */
1453 static void __clk_recalc_rates(struct clk_core *core, unsigned long msg)
1454 {
1455 	unsigned long old_rate;
1456 	unsigned long parent_rate = 0;
1457 	struct clk_core *child;
1458 
1459 	lockdep_assert_held(&prepare_lock);
1460 
1461 	old_rate = core->rate;
1462 
1463 	if (core->parent)
1464 		parent_rate = core->parent->rate;
1465 
1466 	core->rate = clk_recalc(core, parent_rate);
1467 
1468 	/*
1469 	 * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE
1470 	 * & ABORT_RATE_CHANGE notifiers
1471 	 */
1472 	if (core->notifier_count && msg)
1473 		__clk_notify(core, msg, old_rate, core->rate);
1474 
1475 	hlist_for_each_entry(child, &core->children, child_node)
1476 		__clk_recalc_rates(child, msg);
1477 }
1478 
1479 static unsigned long clk_core_get_rate(struct clk_core *core)
1480 {
1481 	unsigned long rate;
1482 
1483 	clk_prepare_lock();
1484 
1485 	if (core && (core->flags & CLK_GET_RATE_NOCACHE))
1486 		__clk_recalc_rates(core, 0);
1487 
1488 	rate = clk_core_get_rate_nolock(core);
1489 	clk_prepare_unlock();
1490 
1491 	return rate;
1492 }
1493 
1494 /**
1495  * clk_get_rate - return the rate of clk
1496  * @clk: the clk whose rate is being returned
1497  *
1498  * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag
1499  * is set, which means a recalc_rate will be issued.
1500  * If clk is NULL then returns 0.
1501  */
1502 unsigned long clk_get_rate(struct clk *clk)
1503 {
1504 	if (!clk)
1505 		return 0;
1506 
1507 	return clk_core_get_rate(clk->core);
1508 }
1509 EXPORT_SYMBOL_GPL(clk_get_rate);
1510 
1511 static int clk_fetch_parent_index(struct clk_core *core,
1512 				  struct clk_core *parent)
1513 {
1514 	int i;
1515 
1516 	if (!parent)
1517 		return -EINVAL;
1518 
1519 	for (i = 0; i < core->num_parents; i++)
1520 		if (clk_core_get_parent_by_index(core, i) == parent)
1521 			return i;
1522 
1523 	return -EINVAL;
1524 }
1525 
1526 /*
1527  * Update the orphan status of @core and all its children.
1528  */
1529 static void clk_core_update_orphan_status(struct clk_core *core, bool is_orphan)
1530 {
1531 	struct clk_core *child;
1532 
1533 	core->orphan = is_orphan;
1534 
1535 	hlist_for_each_entry(child, &core->children, child_node)
1536 		clk_core_update_orphan_status(child, is_orphan);
1537 }
1538 
1539 static void clk_reparent(struct clk_core *core, struct clk_core *new_parent)
1540 {
1541 	bool was_orphan = core->orphan;
1542 
1543 	hlist_del(&core->child_node);
1544 
1545 	if (new_parent) {
1546 		bool becomes_orphan = new_parent->orphan;
1547 
1548 		/* avoid duplicate POST_RATE_CHANGE notifications */
1549 		if (new_parent->new_child == core)
1550 			new_parent->new_child = NULL;
1551 
1552 		hlist_add_head(&core->child_node, &new_parent->children);
1553 
1554 		if (was_orphan != becomes_orphan)
1555 			clk_core_update_orphan_status(core, becomes_orphan);
1556 	} else {
1557 		hlist_add_head(&core->child_node, &clk_orphan_list);
1558 		if (!was_orphan)
1559 			clk_core_update_orphan_status(core, true);
1560 	}
1561 
1562 	core->parent = new_parent;
1563 }
1564 
1565 static struct clk_core *__clk_set_parent_before(struct clk_core *core,
1566 					   struct clk_core *parent)
1567 {
1568 	unsigned long flags;
1569 	struct clk_core *old_parent = core->parent;
1570 
1571 	/*
1572 	 * 1. enable parents for CLK_OPS_PARENT_ENABLE clock
1573 	 *
1574 	 * 2. Migrate prepare state between parents and prevent race with
1575 	 * clk_enable().
1576 	 *
1577 	 * If the clock is not prepared, then a race with
1578 	 * clk_enable/disable() is impossible since we already have the
1579 	 * prepare lock (future calls to clk_enable() need to be preceded by
1580 	 * a clk_prepare()).
1581 	 *
1582 	 * If the clock is prepared, migrate the prepared state to the new
1583 	 * parent and also protect against a race with clk_enable() by
1584 	 * forcing the clock and the new parent on.  This ensures that all
1585 	 * future calls to clk_enable() are practically NOPs with respect to
1586 	 * hardware and software states.
1587 	 *
1588 	 * See also: Comment for clk_set_parent() below.
1589 	 */
1590 
1591 	/* enable old_parent & parent if CLK_OPS_PARENT_ENABLE is set */
1592 	if (core->flags & CLK_OPS_PARENT_ENABLE) {
1593 		clk_core_prepare_enable(old_parent);
1594 		clk_core_prepare_enable(parent);
1595 	}
1596 
1597 	/* migrate prepare count if > 0 */
1598 	if (core->prepare_count) {
1599 		clk_core_prepare_enable(parent);
1600 		clk_core_enable_lock(core);
1601 	}
1602 
1603 	/* update the clk tree topology */
1604 	flags = clk_enable_lock();
1605 	clk_reparent(core, parent);
1606 	clk_enable_unlock(flags);
1607 
1608 	return old_parent;
1609 }
1610 
1611 static void __clk_set_parent_after(struct clk_core *core,
1612 				   struct clk_core *parent,
1613 				   struct clk_core *old_parent)
1614 {
1615 	/*
1616 	 * Finish the migration of prepare state and undo the changes done
1617 	 * for preventing a race with clk_enable().
1618 	 */
1619 	if (core->prepare_count) {
1620 		clk_core_disable_lock(core);
1621 		clk_core_disable_unprepare(old_parent);
1622 	}
1623 
1624 	/* re-balance ref counting if CLK_OPS_PARENT_ENABLE is set */
1625 	if (core->flags & CLK_OPS_PARENT_ENABLE) {
1626 		clk_core_disable_unprepare(parent);
1627 		clk_core_disable_unprepare(old_parent);
1628 	}
1629 }
1630 
1631 static int __clk_set_parent(struct clk_core *core, struct clk_core *parent,
1632 			    u8 p_index)
1633 {
1634 	unsigned long flags;
1635 	int ret = 0;
1636 	struct clk_core *old_parent;
1637 
1638 	old_parent = __clk_set_parent_before(core, parent);
1639 
1640 	trace_clk_set_parent(core, parent);
1641 
1642 	/* change clock input source */
1643 	if (parent && core->ops->set_parent)
1644 		ret = core->ops->set_parent(core->hw, p_index);
1645 
1646 	trace_clk_set_parent_complete(core, parent);
1647 
1648 	if (ret) {
1649 		flags = clk_enable_lock();
1650 		clk_reparent(core, old_parent);
1651 		clk_enable_unlock(flags);
1652 		__clk_set_parent_after(core, old_parent, parent);
1653 
1654 		return ret;
1655 	}
1656 
1657 	__clk_set_parent_after(core, parent, old_parent);
1658 
1659 	return 0;
1660 }
1661 
1662 /**
1663  * __clk_speculate_rates
1664  * @core: first clk in the subtree
1665  * @parent_rate: the "future" rate of clk's parent
1666  *
1667  * Walks the subtree of clks starting with clk, speculating rates as it
1668  * goes and firing off PRE_RATE_CHANGE notifications as necessary.
1669  *
1670  * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending
1671  * pre-rate change notifications and returns early if no clks in the
1672  * subtree have subscribed to the notifications.  Note that if a clk does not
1673  * implement the .recalc_rate callback then it is assumed that the clock will
1674  * take on the rate of its parent.
1675  */
1676 static int __clk_speculate_rates(struct clk_core *core,
1677 				 unsigned long parent_rate)
1678 {
1679 	struct clk_core *child;
1680 	unsigned long new_rate;
1681 	int ret = NOTIFY_DONE;
1682 
1683 	lockdep_assert_held(&prepare_lock);
1684 
1685 	new_rate = clk_recalc(core, parent_rate);
1686 
1687 	/* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */
1688 	if (core->notifier_count)
1689 		ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate);
1690 
1691 	if (ret & NOTIFY_STOP_MASK) {
1692 		pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n",
1693 				__func__, core->name, ret);
1694 		goto out;
1695 	}
1696 
1697 	hlist_for_each_entry(child, &core->children, child_node) {
1698 		ret = __clk_speculate_rates(child, new_rate);
1699 		if (ret & NOTIFY_STOP_MASK)
1700 			break;
1701 	}
1702 
1703 out:
1704 	return ret;
1705 }
1706 
1707 static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate,
1708 			     struct clk_core *new_parent, u8 p_index)
1709 {
1710 	struct clk_core *child;
1711 
1712 	core->new_rate = new_rate;
1713 	core->new_parent = new_parent;
1714 	core->new_parent_index = p_index;
1715 	/* include clk in new parent's PRE_RATE_CHANGE notifications */
1716 	core->new_child = NULL;
1717 	if (new_parent && new_parent != core->parent)
1718 		new_parent->new_child = core;
1719 
1720 	hlist_for_each_entry(child, &core->children, child_node) {
1721 		child->new_rate = clk_recalc(child, new_rate);
1722 		clk_calc_subtree(child, child->new_rate, NULL, 0);
1723 	}
1724 }
1725 
1726 /*
1727  * calculate the new rates returning the topmost clock that has to be
1728  * changed.
1729  */
1730 static struct clk_core *clk_calc_new_rates(struct clk_core *core,
1731 					   unsigned long rate)
1732 {
1733 	struct clk_core *top = core;
1734 	struct clk_core *old_parent, *parent;
1735 	unsigned long best_parent_rate = 0;
1736 	unsigned long new_rate;
1737 	unsigned long min_rate;
1738 	unsigned long max_rate;
1739 	int p_index = 0;
1740 	long ret;
1741 
1742 	/* sanity */
1743 	if (IS_ERR_OR_NULL(core))
1744 		return NULL;
1745 
1746 	/* save parent rate, if it exists */
1747 	parent = old_parent = core->parent;
1748 	if (parent)
1749 		best_parent_rate = parent->rate;
1750 
1751 	clk_core_get_boundaries(core, &min_rate, &max_rate);
1752 
1753 	/* find the closest rate and parent clk/rate */
1754 	if (clk_core_can_round(core)) {
1755 		struct clk_rate_request req;
1756 
1757 		req.rate = rate;
1758 		req.min_rate = min_rate;
1759 		req.max_rate = max_rate;
1760 
1761 		clk_core_init_rate_req(core, &req);
1762 
1763 		ret = clk_core_determine_round_nolock(core, &req);
1764 		if (ret < 0)
1765 			return NULL;
1766 
1767 		best_parent_rate = req.best_parent_rate;
1768 		new_rate = req.rate;
1769 		parent = req.best_parent_hw ? req.best_parent_hw->core : NULL;
1770 
1771 		if (new_rate < min_rate || new_rate > max_rate)
1772 			return NULL;
1773 	} else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) {
1774 		/* pass-through clock without adjustable parent */
1775 		core->new_rate = core->rate;
1776 		return NULL;
1777 	} else {
1778 		/* pass-through clock with adjustable parent */
1779 		top = clk_calc_new_rates(parent, rate);
1780 		new_rate = parent->new_rate;
1781 		goto out;
1782 	}
1783 
1784 	/* some clocks must be gated to change parent */
1785 	if (parent != old_parent &&
1786 	    (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
1787 		pr_debug("%s: %s not gated but wants to reparent\n",
1788 			 __func__, core->name);
1789 		return NULL;
1790 	}
1791 
1792 	/* try finding the new parent index */
1793 	if (parent && core->num_parents > 1) {
1794 		p_index = clk_fetch_parent_index(core, parent);
1795 		if (p_index < 0) {
1796 			pr_debug("%s: clk %s can not be parent of clk %s\n",
1797 				 __func__, parent->name, core->name);
1798 			return NULL;
1799 		}
1800 	}
1801 
1802 	if ((core->flags & CLK_SET_RATE_PARENT) && parent &&
1803 	    best_parent_rate != parent->rate)
1804 		top = clk_calc_new_rates(parent, best_parent_rate);
1805 
1806 out:
1807 	clk_calc_subtree(core, new_rate, parent, p_index);
1808 
1809 	return top;
1810 }
1811 
1812 /*
1813  * Notify about rate changes in a subtree. Always walk down the whole tree
1814  * so that in case of an error we can walk down the whole tree again and
1815  * abort the change.
1816  */
1817 static struct clk_core *clk_propagate_rate_change(struct clk_core *core,
1818 						  unsigned long event)
1819 {
1820 	struct clk_core *child, *tmp_clk, *fail_clk = NULL;
1821 	int ret = NOTIFY_DONE;
1822 
1823 	if (core->rate == core->new_rate)
1824 		return NULL;
1825 
1826 	if (core->notifier_count) {
1827 		ret = __clk_notify(core, event, core->rate, core->new_rate);
1828 		if (ret & NOTIFY_STOP_MASK)
1829 			fail_clk = core;
1830 	}
1831 
1832 	hlist_for_each_entry(child, &core->children, child_node) {
1833 		/* Skip children who will be reparented to another clock */
1834 		if (child->new_parent && child->new_parent != core)
1835 			continue;
1836 		tmp_clk = clk_propagate_rate_change(child, event);
1837 		if (tmp_clk)
1838 			fail_clk = tmp_clk;
1839 	}
1840 
1841 	/* handle the new child who might not be in core->children yet */
1842 	if (core->new_child) {
1843 		tmp_clk = clk_propagate_rate_change(core->new_child, event);
1844 		if (tmp_clk)
1845 			fail_clk = tmp_clk;
1846 	}
1847 
1848 	return fail_clk;
1849 }
1850 
1851 /*
1852  * walk down a subtree and set the new rates notifying the rate
1853  * change on the way
1854  */
1855 static void clk_change_rate(struct clk_core *core)
1856 {
1857 	struct clk_core *child;
1858 	struct hlist_node *tmp;
1859 	unsigned long old_rate;
1860 	unsigned long best_parent_rate = 0;
1861 	bool skip_set_rate = false;
1862 	struct clk_core *old_parent;
1863 	struct clk_core *parent = NULL;
1864 
1865 	old_rate = core->rate;
1866 
1867 	if (core->new_parent) {
1868 		parent = core->new_parent;
1869 		best_parent_rate = core->new_parent->rate;
1870 	} else if (core->parent) {
1871 		parent = core->parent;
1872 		best_parent_rate = core->parent->rate;
1873 	}
1874 
1875 	if (clk_pm_runtime_get(core))
1876 		return;
1877 
1878 	if (core->flags & CLK_SET_RATE_UNGATE) {
1879 		unsigned long flags;
1880 
1881 		clk_core_prepare(core);
1882 		flags = clk_enable_lock();
1883 		clk_core_enable(core);
1884 		clk_enable_unlock(flags);
1885 	}
1886 
1887 	if (core->new_parent && core->new_parent != core->parent) {
1888 		old_parent = __clk_set_parent_before(core, core->new_parent);
1889 		trace_clk_set_parent(core, core->new_parent);
1890 
1891 		if (core->ops->set_rate_and_parent) {
1892 			skip_set_rate = true;
1893 			core->ops->set_rate_and_parent(core->hw, core->new_rate,
1894 					best_parent_rate,
1895 					core->new_parent_index);
1896 		} else if (core->ops->set_parent) {
1897 			core->ops->set_parent(core->hw, core->new_parent_index);
1898 		}
1899 
1900 		trace_clk_set_parent_complete(core, core->new_parent);
1901 		__clk_set_parent_after(core, core->new_parent, old_parent);
1902 	}
1903 
1904 	if (core->flags & CLK_OPS_PARENT_ENABLE)
1905 		clk_core_prepare_enable(parent);
1906 
1907 	trace_clk_set_rate(core, core->new_rate);
1908 
1909 	if (!skip_set_rate && core->ops->set_rate)
1910 		core->ops->set_rate(core->hw, core->new_rate, best_parent_rate);
1911 
1912 	trace_clk_set_rate_complete(core, core->new_rate);
1913 
1914 	core->rate = clk_recalc(core, best_parent_rate);
1915 
1916 	if (core->flags & CLK_SET_RATE_UNGATE) {
1917 		unsigned long flags;
1918 
1919 		flags = clk_enable_lock();
1920 		clk_core_disable(core);
1921 		clk_enable_unlock(flags);
1922 		clk_core_unprepare(core);
1923 	}
1924 
1925 	if (core->flags & CLK_OPS_PARENT_ENABLE)
1926 		clk_core_disable_unprepare(parent);
1927 
1928 	if (core->notifier_count && old_rate != core->rate)
1929 		__clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate);
1930 
1931 	if (core->flags & CLK_RECALC_NEW_RATES)
1932 		(void)clk_calc_new_rates(core, core->new_rate);
1933 
1934 	/*
1935 	 * Use safe iteration, as change_rate can actually swap parents
1936 	 * for certain clock types.
1937 	 */
1938 	hlist_for_each_entry_safe(child, tmp, &core->children, child_node) {
1939 		/* Skip children who will be reparented to another clock */
1940 		if (child->new_parent && child->new_parent != core)
1941 			continue;
1942 		clk_change_rate(child);
1943 	}
1944 
1945 	/* handle the new child who might not be in core->children yet */
1946 	if (core->new_child)
1947 		clk_change_rate(core->new_child);
1948 
1949 	clk_pm_runtime_put(core);
1950 }
1951 
1952 static unsigned long clk_core_req_round_rate_nolock(struct clk_core *core,
1953 						     unsigned long req_rate)
1954 {
1955 	int ret, cnt;
1956 	struct clk_rate_request req;
1957 
1958 	lockdep_assert_held(&prepare_lock);
1959 
1960 	if (!core)
1961 		return 0;
1962 
1963 	/* simulate what the rate would be if it could be freely set */
1964 	cnt = clk_core_rate_nuke_protect(core);
1965 	if (cnt < 0)
1966 		return cnt;
1967 
1968 	clk_core_get_boundaries(core, &req.min_rate, &req.max_rate);
1969 	req.rate = req_rate;
1970 
1971 	ret = clk_core_round_rate_nolock(core, &req);
1972 
1973 	/* restore the protection */
1974 	clk_core_rate_restore_protect(core, cnt);
1975 
1976 	return ret ? 0 : req.rate;
1977 }
1978 
1979 static int clk_core_set_rate_nolock(struct clk_core *core,
1980 				    unsigned long req_rate)
1981 {
1982 	struct clk_core *top, *fail_clk;
1983 	unsigned long rate;
1984 	int ret = 0;
1985 
1986 	if (!core)
1987 		return 0;
1988 
1989 	rate = clk_core_req_round_rate_nolock(core, req_rate);
1990 
1991 	/* bail early if nothing to do */
1992 	if (rate == clk_core_get_rate_nolock(core))
1993 		return 0;
1994 
1995 	/* fail on a direct rate set of a protected provider */
1996 	if (clk_core_rate_is_protected(core))
1997 		return -EBUSY;
1998 
1999 	/* calculate new rates and get the topmost changed clock */
2000 	top = clk_calc_new_rates(core, req_rate);
2001 	if (!top)
2002 		return -EINVAL;
2003 
2004 	ret = clk_pm_runtime_get(core);
2005 	if (ret)
2006 		return ret;
2007 
2008 	/* notify that we are about to change rates */
2009 	fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE);
2010 	if (fail_clk) {
2011 		pr_debug("%s: failed to set %s rate\n", __func__,
2012 				fail_clk->name);
2013 		clk_propagate_rate_change(top, ABORT_RATE_CHANGE);
2014 		ret = -EBUSY;
2015 		goto err;
2016 	}
2017 
2018 	/* change the rates */
2019 	clk_change_rate(top);
2020 
2021 	core->req_rate = req_rate;
2022 err:
2023 	clk_pm_runtime_put(core);
2024 
2025 	return ret;
2026 }
2027 
2028 /**
2029  * clk_set_rate - specify a new rate for clk
2030  * @clk: the clk whose rate is being changed
2031  * @rate: the new rate for clk
2032  *
2033  * In the simplest case clk_set_rate will only adjust the rate of clk.
2034  *
2035  * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to
2036  * propagate up to clk's parent; whether or not this happens depends on the
2037  * outcome of clk's .round_rate implementation.  If *parent_rate is unchanged
2038  * after calling .round_rate then upstream parent propagation is ignored.  If
2039  * *parent_rate comes back with a new rate for clk's parent then we propagate
2040  * up to clk's parent and set its rate.  Upward propagation will continue
2041  * until either a clk does not support the CLK_SET_RATE_PARENT flag or
2042  * .round_rate stops requesting changes to clk's parent_rate.
2043  *
2044  * Rate changes are accomplished via tree traversal that also recalculates the
2045  * rates for the clocks and fires off POST_RATE_CHANGE notifiers.
2046  *
2047  * Returns 0 on success, -EERROR otherwise.
2048  */
2049 int clk_set_rate(struct clk *clk, unsigned long rate)
2050 {
2051 	int ret;
2052 
2053 	if (!clk)
2054 		return 0;
2055 
2056 	/* prevent racing with updates to the clock topology */
2057 	clk_prepare_lock();
2058 
2059 	if (clk->exclusive_count)
2060 		clk_core_rate_unprotect(clk->core);
2061 
2062 	ret = clk_core_set_rate_nolock(clk->core, rate);
2063 
2064 	if (clk->exclusive_count)
2065 		clk_core_rate_protect(clk->core);
2066 
2067 	clk_prepare_unlock();
2068 
2069 	return ret;
2070 }
2071 EXPORT_SYMBOL_GPL(clk_set_rate);
2072 
2073 /**
2074  * clk_set_rate_exclusive - specify a new rate get exclusive control
2075  * @clk: the clk whose rate is being changed
2076  * @rate: the new rate for clk
2077  *
2078  * This is a combination of clk_set_rate() and clk_rate_exclusive_get()
2079  * within a critical section
2080  *
2081  * This can be used initially to ensure that at least 1 consumer is
2082  * statisfied when several consumers are competing for exclusivity over the
2083  * same clock provider.
2084  *
2085  * The exclusivity is not applied if setting the rate failed.
2086  *
2087  * Calls to clk_rate_exclusive_get() should be balanced with calls to
2088  * clk_rate_exclusive_put().
2089  *
2090  * Returns 0 on success, -EERROR otherwise.
2091  */
2092 int clk_set_rate_exclusive(struct clk *clk, unsigned long rate)
2093 {
2094 	int ret;
2095 
2096 	if (!clk)
2097 		return 0;
2098 
2099 	/* prevent racing with updates to the clock topology */
2100 	clk_prepare_lock();
2101 
2102 	/*
2103 	 * The temporary protection removal is not here, on purpose
2104 	 * This function is meant to be used instead of clk_rate_protect,
2105 	 * so before the consumer code path protect the clock provider
2106 	 */
2107 
2108 	ret = clk_core_set_rate_nolock(clk->core, rate);
2109 	if (!ret) {
2110 		clk_core_rate_protect(clk->core);
2111 		clk->exclusive_count++;
2112 	}
2113 
2114 	clk_prepare_unlock();
2115 
2116 	return ret;
2117 }
2118 EXPORT_SYMBOL_GPL(clk_set_rate_exclusive);
2119 
2120 /**
2121  * clk_set_rate_range - set a rate range for a clock source
2122  * @clk: clock source
2123  * @min: desired minimum clock rate in Hz, inclusive
2124  * @max: desired maximum clock rate in Hz, inclusive
2125  *
2126  * Returns success (0) or negative errno.
2127  */
2128 int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max)
2129 {
2130 	int ret = 0;
2131 	unsigned long old_min, old_max, rate;
2132 
2133 	if (!clk)
2134 		return 0;
2135 
2136 	if (min > max) {
2137 		pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n",
2138 		       __func__, clk->core->name, clk->dev_id, clk->con_id,
2139 		       min, max);
2140 		return -EINVAL;
2141 	}
2142 
2143 	clk_prepare_lock();
2144 
2145 	if (clk->exclusive_count)
2146 		clk_core_rate_unprotect(clk->core);
2147 
2148 	/* Save the current values in case we need to rollback the change */
2149 	old_min = clk->min_rate;
2150 	old_max = clk->max_rate;
2151 	clk->min_rate = min;
2152 	clk->max_rate = max;
2153 
2154 	rate = clk_core_get_rate_nolock(clk->core);
2155 	if (rate < min || rate > max) {
2156 		/*
2157 		 * FIXME:
2158 		 * We are in bit of trouble here, current rate is outside the
2159 		 * the requested range. We are going try to request appropriate
2160 		 * range boundary but there is a catch. It may fail for the
2161 		 * usual reason (clock broken, clock protected, etc) but also
2162 		 * because:
2163 		 * - round_rate() was not favorable and fell on the wrong
2164 		 *   side of the boundary
2165 		 * - the determine_rate() callback does not really check for
2166 		 *   this corner case when determining the rate
2167 		 */
2168 
2169 		if (rate < min)
2170 			rate = min;
2171 		else
2172 			rate = max;
2173 
2174 		ret = clk_core_set_rate_nolock(clk->core, rate);
2175 		if (ret) {
2176 			/* rollback the changes */
2177 			clk->min_rate = old_min;
2178 			clk->max_rate = old_max;
2179 		}
2180 	}
2181 
2182 	if (clk->exclusive_count)
2183 		clk_core_rate_protect(clk->core);
2184 
2185 	clk_prepare_unlock();
2186 
2187 	return ret;
2188 }
2189 EXPORT_SYMBOL_GPL(clk_set_rate_range);
2190 
2191 /**
2192  * clk_set_min_rate - set a minimum clock rate for a clock source
2193  * @clk: clock source
2194  * @rate: desired minimum clock rate in Hz, inclusive
2195  *
2196  * Returns success (0) or negative errno.
2197  */
2198 int clk_set_min_rate(struct clk *clk, unsigned long rate)
2199 {
2200 	if (!clk)
2201 		return 0;
2202 
2203 	return clk_set_rate_range(clk, rate, clk->max_rate);
2204 }
2205 EXPORT_SYMBOL_GPL(clk_set_min_rate);
2206 
2207 /**
2208  * clk_set_max_rate - set a maximum clock rate for a clock source
2209  * @clk: clock source
2210  * @rate: desired maximum clock rate in Hz, inclusive
2211  *
2212  * Returns success (0) or negative errno.
2213  */
2214 int clk_set_max_rate(struct clk *clk, unsigned long rate)
2215 {
2216 	if (!clk)
2217 		return 0;
2218 
2219 	return clk_set_rate_range(clk, clk->min_rate, rate);
2220 }
2221 EXPORT_SYMBOL_GPL(clk_set_max_rate);
2222 
2223 /**
2224  * clk_get_parent - return the parent of a clk
2225  * @clk: the clk whose parent gets returned
2226  *
2227  * Simply returns clk->parent.  Returns NULL if clk is NULL.
2228  */
2229 struct clk *clk_get_parent(struct clk *clk)
2230 {
2231 	struct clk *parent;
2232 
2233 	if (!clk)
2234 		return NULL;
2235 
2236 	clk_prepare_lock();
2237 	/* TODO: Create a per-user clk and change callers to call clk_put */
2238 	parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk;
2239 	clk_prepare_unlock();
2240 
2241 	return parent;
2242 }
2243 EXPORT_SYMBOL_GPL(clk_get_parent);
2244 
2245 static struct clk_core *__clk_init_parent(struct clk_core *core)
2246 {
2247 	u8 index = 0;
2248 
2249 	if (core->num_parents > 1 && core->ops->get_parent)
2250 		index = core->ops->get_parent(core->hw);
2251 
2252 	return clk_core_get_parent_by_index(core, index);
2253 }
2254 
2255 static void clk_core_reparent(struct clk_core *core,
2256 				  struct clk_core *new_parent)
2257 {
2258 	clk_reparent(core, new_parent);
2259 	__clk_recalc_accuracies(core);
2260 	__clk_recalc_rates(core, POST_RATE_CHANGE);
2261 }
2262 
2263 void clk_hw_reparent(struct clk_hw *hw, struct clk_hw *new_parent)
2264 {
2265 	if (!hw)
2266 		return;
2267 
2268 	clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core);
2269 }
2270 
2271 /**
2272  * clk_has_parent - check if a clock is a possible parent for another
2273  * @clk: clock source
2274  * @parent: parent clock source
2275  *
2276  * This function can be used in drivers that need to check that a clock can be
2277  * the parent of another without actually changing the parent.
2278  *
2279  * Returns true if @parent is a possible parent for @clk, false otherwise.
2280  */
2281 bool clk_has_parent(struct clk *clk, struct clk *parent)
2282 {
2283 	struct clk_core *core, *parent_core;
2284 
2285 	/* NULL clocks should be nops, so return success if either is NULL. */
2286 	if (!clk || !parent)
2287 		return true;
2288 
2289 	core = clk->core;
2290 	parent_core = parent->core;
2291 
2292 	/* Optimize for the case where the parent is already the parent. */
2293 	if (core->parent == parent_core)
2294 		return true;
2295 
2296 	return match_string(core->parent_names, core->num_parents,
2297 			    parent_core->name) >= 0;
2298 }
2299 EXPORT_SYMBOL_GPL(clk_has_parent);
2300 
2301 static int clk_core_set_parent_nolock(struct clk_core *core,
2302 				      struct clk_core *parent)
2303 {
2304 	int ret = 0;
2305 	int p_index = 0;
2306 	unsigned long p_rate = 0;
2307 
2308 	lockdep_assert_held(&prepare_lock);
2309 
2310 	if (!core)
2311 		return 0;
2312 
2313 	if (core->parent == parent)
2314 		return 0;
2315 
2316 	/* verify ops for for multi-parent clks */
2317 	if (core->num_parents > 1 && !core->ops->set_parent)
2318 		return -EPERM;
2319 
2320 	/* check that we are allowed to re-parent if the clock is in use */
2321 	if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count)
2322 		return -EBUSY;
2323 
2324 	if (clk_core_rate_is_protected(core))
2325 		return -EBUSY;
2326 
2327 	/* try finding the new parent index */
2328 	if (parent) {
2329 		p_index = clk_fetch_parent_index(core, parent);
2330 		if (p_index < 0) {
2331 			pr_debug("%s: clk %s can not be parent of clk %s\n",
2332 					__func__, parent->name, core->name);
2333 			return p_index;
2334 		}
2335 		p_rate = parent->rate;
2336 	}
2337 
2338 	ret = clk_pm_runtime_get(core);
2339 	if (ret)
2340 		return ret;
2341 
2342 	/* propagate PRE_RATE_CHANGE notifications */
2343 	ret = __clk_speculate_rates(core, p_rate);
2344 
2345 	/* abort if a driver objects */
2346 	if (ret & NOTIFY_STOP_MASK)
2347 		goto runtime_put;
2348 
2349 	/* do the re-parent */
2350 	ret = __clk_set_parent(core, parent, p_index);
2351 
2352 	/* propagate rate an accuracy recalculation accordingly */
2353 	if (ret) {
2354 		__clk_recalc_rates(core, ABORT_RATE_CHANGE);
2355 	} else {
2356 		__clk_recalc_rates(core, POST_RATE_CHANGE);
2357 		__clk_recalc_accuracies(core);
2358 	}
2359 
2360 runtime_put:
2361 	clk_pm_runtime_put(core);
2362 
2363 	return ret;
2364 }
2365 
2366 /**
2367  * clk_set_parent - switch the parent of a mux clk
2368  * @clk: the mux clk whose input we are switching
2369  * @parent: the new input to clk
2370  *
2371  * Re-parent clk to use parent as its new input source.  If clk is in
2372  * prepared state, the clk will get enabled for the duration of this call. If
2373  * that's not acceptable for a specific clk (Eg: the consumer can't handle
2374  * that, the reparenting is glitchy in hardware, etc), use the
2375  * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared.
2376  *
2377  * After successfully changing clk's parent clk_set_parent will update the
2378  * clk topology, sysfs topology and propagate rate recalculation via
2379  * __clk_recalc_rates.
2380  *
2381  * Returns 0 on success, -EERROR otherwise.
2382  */
2383 int clk_set_parent(struct clk *clk, struct clk *parent)
2384 {
2385 	int ret;
2386 
2387 	if (!clk)
2388 		return 0;
2389 
2390 	clk_prepare_lock();
2391 
2392 	if (clk->exclusive_count)
2393 		clk_core_rate_unprotect(clk->core);
2394 
2395 	ret = clk_core_set_parent_nolock(clk->core,
2396 					 parent ? parent->core : NULL);
2397 
2398 	if (clk->exclusive_count)
2399 		clk_core_rate_protect(clk->core);
2400 
2401 	clk_prepare_unlock();
2402 
2403 	return ret;
2404 }
2405 EXPORT_SYMBOL_GPL(clk_set_parent);
2406 
2407 static int clk_core_set_phase_nolock(struct clk_core *core, int degrees)
2408 {
2409 	int ret = -EINVAL;
2410 
2411 	lockdep_assert_held(&prepare_lock);
2412 
2413 	if (!core)
2414 		return 0;
2415 
2416 	if (clk_core_rate_is_protected(core))
2417 		return -EBUSY;
2418 
2419 	trace_clk_set_phase(core, degrees);
2420 
2421 	if (core->ops->set_phase) {
2422 		ret = core->ops->set_phase(core->hw, degrees);
2423 		if (!ret)
2424 			core->phase = degrees;
2425 	}
2426 
2427 	trace_clk_set_phase_complete(core, degrees);
2428 
2429 	return ret;
2430 }
2431 
2432 /**
2433  * clk_set_phase - adjust the phase shift of a clock signal
2434  * @clk: clock signal source
2435  * @degrees: number of degrees the signal is shifted
2436  *
2437  * Shifts the phase of a clock signal by the specified
2438  * degrees. Returns 0 on success, -EERROR otherwise.
2439  *
2440  * This function makes no distinction about the input or reference
2441  * signal that we adjust the clock signal phase against. For example
2442  * phase locked-loop clock signal generators we may shift phase with
2443  * respect to feedback clock signal input, but for other cases the
2444  * clock phase may be shifted with respect to some other, unspecified
2445  * signal.
2446  *
2447  * Additionally the concept of phase shift does not propagate through
2448  * the clock tree hierarchy, which sets it apart from clock rates and
2449  * clock accuracy. A parent clock phase attribute does not have an
2450  * impact on the phase attribute of a child clock.
2451  */
2452 int clk_set_phase(struct clk *clk, int degrees)
2453 {
2454 	int ret;
2455 
2456 	if (!clk)
2457 		return 0;
2458 
2459 	/* sanity check degrees */
2460 	degrees %= 360;
2461 	if (degrees < 0)
2462 		degrees += 360;
2463 
2464 	clk_prepare_lock();
2465 
2466 	if (clk->exclusive_count)
2467 		clk_core_rate_unprotect(clk->core);
2468 
2469 	ret = clk_core_set_phase_nolock(clk->core, degrees);
2470 
2471 	if (clk->exclusive_count)
2472 		clk_core_rate_protect(clk->core);
2473 
2474 	clk_prepare_unlock();
2475 
2476 	return ret;
2477 }
2478 EXPORT_SYMBOL_GPL(clk_set_phase);
2479 
2480 static int clk_core_get_phase(struct clk_core *core)
2481 {
2482 	int ret;
2483 
2484 	clk_prepare_lock();
2485 	/* Always try to update cached phase if possible */
2486 	if (core->ops->get_phase)
2487 		core->phase = core->ops->get_phase(core->hw);
2488 	ret = core->phase;
2489 	clk_prepare_unlock();
2490 
2491 	return ret;
2492 }
2493 
2494 /**
2495  * clk_get_phase - return the phase shift of a clock signal
2496  * @clk: clock signal source
2497  *
2498  * Returns the phase shift of a clock node in degrees, otherwise returns
2499  * -EERROR.
2500  */
2501 int clk_get_phase(struct clk *clk)
2502 {
2503 	if (!clk)
2504 		return 0;
2505 
2506 	return clk_core_get_phase(clk->core);
2507 }
2508 EXPORT_SYMBOL_GPL(clk_get_phase);
2509 
2510 static void clk_core_reset_duty_cycle_nolock(struct clk_core *core)
2511 {
2512 	/* Assume a default value of 50% */
2513 	core->duty.num = 1;
2514 	core->duty.den = 2;
2515 }
2516 
2517 static int clk_core_update_duty_cycle_parent_nolock(struct clk_core *core);
2518 
2519 static int clk_core_update_duty_cycle_nolock(struct clk_core *core)
2520 {
2521 	struct clk_duty *duty = &core->duty;
2522 	int ret = 0;
2523 
2524 	if (!core->ops->get_duty_cycle)
2525 		return clk_core_update_duty_cycle_parent_nolock(core);
2526 
2527 	ret = core->ops->get_duty_cycle(core->hw, duty);
2528 	if (ret)
2529 		goto reset;
2530 
2531 	/* Don't trust the clock provider too much */
2532 	if (duty->den == 0 || duty->num > duty->den) {
2533 		ret = -EINVAL;
2534 		goto reset;
2535 	}
2536 
2537 	return 0;
2538 
2539 reset:
2540 	clk_core_reset_duty_cycle_nolock(core);
2541 	return ret;
2542 }
2543 
2544 static int clk_core_update_duty_cycle_parent_nolock(struct clk_core *core)
2545 {
2546 	int ret = 0;
2547 
2548 	if (core->parent &&
2549 	    core->flags & CLK_DUTY_CYCLE_PARENT) {
2550 		ret = clk_core_update_duty_cycle_nolock(core->parent);
2551 		memcpy(&core->duty, &core->parent->duty, sizeof(core->duty));
2552 	} else {
2553 		clk_core_reset_duty_cycle_nolock(core);
2554 	}
2555 
2556 	return ret;
2557 }
2558 
2559 static int clk_core_set_duty_cycle_parent_nolock(struct clk_core *core,
2560 						 struct clk_duty *duty);
2561 
2562 static int clk_core_set_duty_cycle_nolock(struct clk_core *core,
2563 					  struct clk_duty *duty)
2564 {
2565 	int ret;
2566 
2567 	lockdep_assert_held(&prepare_lock);
2568 
2569 	if (clk_core_rate_is_protected(core))
2570 		return -EBUSY;
2571 
2572 	trace_clk_set_duty_cycle(core, duty);
2573 
2574 	if (!core->ops->set_duty_cycle)
2575 		return clk_core_set_duty_cycle_parent_nolock(core, duty);
2576 
2577 	ret = core->ops->set_duty_cycle(core->hw, duty);
2578 	if (!ret)
2579 		memcpy(&core->duty, duty, sizeof(*duty));
2580 
2581 	trace_clk_set_duty_cycle_complete(core, duty);
2582 
2583 	return ret;
2584 }
2585 
2586 static int clk_core_set_duty_cycle_parent_nolock(struct clk_core *core,
2587 						 struct clk_duty *duty)
2588 {
2589 	int ret = 0;
2590 
2591 	if (core->parent &&
2592 	    core->flags & (CLK_DUTY_CYCLE_PARENT | CLK_SET_RATE_PARENT)) {
2593 		ret = clk_core_set_duty_cycle_nolock(core->parent, duty);
2594 		memcpy(&core->duty, &core->parent->duty, sizeof(core->duty));
2595 	}
2596 
2597 	return ret;
2598 }
2599 
2600 /**
2601  * clk_set_duty_cycle - adjust the duty cycle ratio of a clock signal
2602  * @clk: clock signal source
2603  * @num: numerator of the duty cycle ratio to be applied
2604  * @den: denominator of the duty cycle ratio to be applied
2605  *
2606  * Apply the duty cycle ratio if the ratio is valid and the clock can
2607  * perform this operation
2608  *
2609  * Returns (0) on success, a negative errno otherwise.
2610  */
2611 int clk_set_duty_cycle(struct clk *clk, unsigned int num, unsigned int den)
2612 {
2613 	int ret;
2614 	struct clk_duty duty;
2615 
2616 	if (!clk)
2617 		return 0;
2618 
2619 	/* sanity check the ratio */
2620 	if (den == 0 || num > den)
2621 		return -EINVAL;
2622 
2623 	duty.num = num;
2624 	duty.den = den;
2625 
2626 	clk_prepare_lock();
2627 
2628 	if (clk->exclusive_count)
2629 		clk_core_rate_unprotect(clk->core);
2630 
2631 	ret = clk_core_set_duty_cycle_nolock(clk->core, &duty);
2632 
2633 	if (clk->exclusive_count)
2634 		clk_core_rate_protect(clk->core);
2635 
2636 	clk_prepare_unlock();
2637 
2638 	return ret;
2639 }
2640 EXPORT_SYMBOL_GPL(clk_set_duty_cycle);
2641 
2642 static int clk_core_get_scaled_duty_cycle(struct clk_core *core,
2643 					  unsigned int scale)
2644 {
2645 	struct clk_duty *duty = &core->duty;
2646 	int ret;
2647 
2648 	clk_prepare_lock();
2649 
2650 	ret = clk_core_update_duty_cycle_nolock(core);
2651 	if (!ret)
2652 		ret = mult_frac(scale, duty->num, duty->den);
2653 
2654 	clk_prepare_unlock();
2655 
2656 	return ret;
2657 }
2658 
2659 /**
2660  * clk_get_scaled_duty_cycle - return the duty cycle ratio of a clock signal
2661  * @clk: clock signal source
2662  * @scale: scaling factor to be applied to represent the ratio as an integer
2663  *
2664  * Returns the duty cycle ratio of a clock node multiplied by the provided
2665  * scaling factor, or negative errno on error.
2666  */
2667 int clk_get_scaled_duty_cycle(struct clk *clk, unsigned int scale)
2668 {
2669 	if (!clk)
2670 		return 0;
2671 
2672 	return clk_core_get_scaled_duty_cycle(clk->core, scale);
2673 }
2674 EXPORT_SYMBOL_GPL(clk_get_scaled_duty_cycle);
2675 
2676 /**
2677  * clk_is_match - check if two clk's point to the same hardware clock
2678  * @p: clk compared against q
2679  * @q: clk compared against p
2680  *
2681  * Returns true if the two struct clk pointers both point to the same hardware
2682  * clock node. Put differently, returns true if struct clk *p and struct clk *q
2683  * share the same struct clk_core object.
2684  *
2685  * Returns false otherwise. Note that two NULL clks are treated as matching.
2686  */
2687 bool clk_is_match(const struct clk *p, const struct clk *q)
2688 {
2689 	/* trivial case: identical struct clk's or both NULL */
2690 	if (p == q)
2691 		return true;
2692 
2693 	/* true if clk->core pointers match. Avoid dereferencing garbage */
2694 	if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q))
2695 		if (p->core == q->core)
2696 			return true;
2697 
2698 	return false;
2699 }
2700 EXPORT_SYMBOL_GPL(clk_is_match);
2701 
2702 /***        debugfs support        ***/
2703 
2704 #ifdef CONFIG_DEBUG_FS
2705 #include <linux/debugfs.h>
2706 
2707 static struct dentry *rootdir;
2708 static int inited = 0;
2709 static DEFINE_MUTEX(clk_debug_lock);
2710 static HLIST_HEAD(clk_debug_list);
2711 
2712 static struct hlist_head *all_lists[] = {
2713 	&clk_root_list,
2714 	&clk_orphan_list,
2715 	NULL,
2716 };
2717 
2718 static struct hlist_head *orphan_list[] = {
2719 	&clk_orphan_list,
2720 	NULL,
2721 };
2722 
2723 static void clk_summary_show_one(struct seq_file *s, struct clk_core *c,
2724 				 int level)
2725 {
2726 	if (!c)
2727 		return;
2728 
2729 	seq_printf(s, "%*s%-*s %7d %8d %8d %11lu %10lu %5d %6d\n",
2730 		   level * 3 + 1, "",
2731 		   30 - level * 3, c->name,
2732 		   c->enable_count, c->prepare_count, c->protect_count,
2733 		   clk_core_get_rate(c), clk_core_get_accuracy(c),
2734 		   clk_core_get_phase(c),
2735 		   clk_core_get_scaled_duty_cycle(c, 100000));
2736 }
2737 
2738 static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c,
2739 				     int level)
2740 {
2741 	struct clk_core *child;
2742 
2743 	if (!c)
2744 		return;
2745 
2746 	clk_summary_show_one(s, c, level);
2747 
2748 	hlist_for_each_entry(child, &c->children, child_node)
2749 		clk_summary_show_subtree(s, child, level + 1);
2750 }
2751 
2752 static int clk_summary_show(struct seq_file *s, void *data)
2753 {
2754 	struct clk_core *c;
2755 	struct hlist_head **lists = (struct hlist_head **)s->private;
2756 
2757 	seq_puts(s, "                                 enable  prepare  protect                                duty\n");
2758 	seq_puts(s, "   clock                          count    count    count        rate   accuracy phase  cycle\n");
2759 	seq_puts(s, "---------------------------------------------------------------------------------------------\n");
2760 
2761 	clk_prepare_lock();
2762 
2763 	for (; *lists; lists++)
2764 		hlist_for_each_entry(c, *lists, child_node)
2765 			clk_summary_show_subtree(s, c, 0);
2766 
2767 	clk_prepare_unlock();
2768 
2769 	return 0;
2770 }
2771 DEFINE_SHOW_ATTRIBUTE(clk_summary);
2772 
2773 static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level)
2774 {
2775 	if (!c)
2776 		return;
2777 
2778 	/* This should be JSON format, i.e. elements separated with a comma */
2779 	seq_printf(s, "\"%s\": { ", c->name);
2780 	seq_printf(s, "\"enable_count\": %d,", c->enable_count);
2781 	seq_printf(s, "\"prepare_count\": %d,", c->prepare_count);
2782 	seq_printf(s, "\"protect_count\": %d,", c->protect_count);
2783 	seq_printf(s, "\"rate\": %lu,", clk_core_get_rate(c));
2784 	seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy(c));
2785 	seq_printf(s, "\"phase\": %d", clk_core_get_phase(c));
2786 	seq_printf(s, "\"duty_cycle\": %u",
2787 		   clk_core_get_scaled_duty_cycle(c, 100000));
2788 }
2789 
2790 static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level)
2791 {
2792 	struct clk_core *child;
2793 
2794 	if (!c)
2795 		return;
2796 
2797 	clk_dump_one(s, c, level);
2798 
2799 	hlist_for_each_entry(child, &c->children, child_node) {
2800 		seq_putc(s, ',');
2801 		clk_dump_subtree(s, child, level + 1);
2802 	}
2803 
2804 	seq_putc(s, '}');
2805 }
2806 
2807 static int clk_dump_show(struct seq_file *s, void *data)
2808 {
2809 	struct clk_core *c;
2810 	bool first_node = true;
2811 	struct hlist_head **lists = (struct hlist_head **)s->private;
2812 
2813 	seq_putc(s, '{');
2814 	clk_prepare_lock();
2815 
2816 	for (; *lists; lists++) {
2817 		hlist_for_each_entry(c, *lists, child_node) {
2818 			if (!first_node)
2819 				seq_putc(s, ',');
2820 			first_node = false;
2821 			clk_dump_subtree(s, c, 0);
2822 		}
2823 	}
2824 
2825 	clk_prepare_unlock();
2826 
2827 	seq_puts(s, "}\n");
2828 	return 0;
2829 }
2830 DEFINE_SHOW_ATTRIBUTE(clk_dump);
2831 
2832 static const struct {
2833 	unsigned long flag;
2834 	const char *name;
2835 } clk_flags[] = {
2836 #define ENTRY(f) { f, #f }
2837 	ENTRY(CLK_SET_RATE_GATE),
2838 	ENTRY(CLK_SET_PARENT_GATE),
2839 	ENTRY(CLK_SET_RATE_PARENT),
2840 	ENTRY(CLK_IGNORE_UNUSED),
2841 	ENTRY(CLK_IS_BASIC),
2842 	ENTRY(CLK_GET_RATE_NOCACHE),
2843 	ENTRY(CLK_SET_RATE_NO_REPARENT),
2844 	ENTRY(CLK_GET_ACCURACY_NOCACHE),
2845 	ENTRY(CLK_RECALC_NEW_RATES),
2846 	ENTRY(CLK_SET_RATE_UNGATE),
2847 	ENTRY(CLK_IS_CRITICAL),
2848 	ENTRY(CLK_OPS_PARENT_ENABLE),
2849 	ENTRY(CLK_DUTY_CYCLE_PARENT),
2850 #undef ENTRY
2851 };
2852 
2853 static int clk_flags_show(struct seq_file *s, void *data)
2854 {
2855 	struct clk_core *core = s->private;
2856 	unsigned long flags = core->flags;
2857 	unsigned int i;
2858 
2859 	for (i = 0; flags && i < ARRAY_SIZE(clk_flags); i++) {
2860 		if (flags & clk_flags[i].flag) {
2861 			seq_printf(s, "%s\n", clk_flags[i].name);
2862 			flags &= ~clk_flags[i].flag;
2863 		}
2864 	}
2865 	if (flags) {
2866 		/* Unknown flags */
2867 		seq_printf(s, "0x%lx\n", flags);
2868 	}
2869 
2870 	return 0;
2871 }
2872 DEFINE_SHOW_ATTRIBUTE(clk_flags);
2873 
2874 static int possible_parents_show(struct seq_file *s, void *data)
2875 {
2876 	struct clk_core *core = s->private;
2877 	int i;
2878 
2879 	for (i = 0; i < core->num_parents - 1; i++)
2880 		seq_printf(s, "%s ", core->parent_names[i]);
2881 
2882 	seq_printf(s, "%s\n", core->parent_names[i]);
2883 
2884 	return 0;
2885 }
2886 DEFINE_SHOW_ATTRIBUTE(possible_parents);
2887 
2888 static int clk_duty_cycle_show(struct seq_file *s, void *data)
2889 {
2890 	struct clk_core *core = s->private;
2891 	struct clk_duty *duty = &core->duty;
2892 
2893 	seq_printf(s, "%u/%u\n", duty->num, duty->den);
2894 
2895 	return 0;
2896 }
2897 DEFINE_SHOW_ATTRIBUTE(clk_duty_cycle);
2898 
2899 static void clk_debug_create_one(struct clk_core *core, struct dentry *pdentry)
2900 {
2901 	struct dentry *root;
2902 
2903 	if (!core || !pdentry)
2904 		return;
2905 
2906 	root = debugfs_create_dir(core->name, pdentry);
2907 	core->dentry = root;
2908 
2909 	debugfs_create_ulong("clk_rate", 0444, root, &core->rate);
2910 	debugfs_create_ulong("clk_accuracy", 0444, root, &core->accuracy);
2911 	debugfs_create_u32("clk_phase", 0444, root, &core->phase);
2912 	debugfs_create_file("clk_flags", 0444, root, core, &clk_flags_fops);
2913 	debugfs_create_u32("clk_prepare_count", 0444, root, &core->prepare_count);
2914 	debugfs_create_u32("clk_enable_count", 0444, root, &core->enable_count);
2915 	debugfs_create_u32("clk_protect_count", 0444, root, &core->protect_count);
2916 	debugfs_create_u32("clk_notifier_count", 0444, root, &core->notifier_count);
2917 	debugfs_create_file("clk_duty_cycle", 0444, root, core,
2918 			    &clk_duty_cycle_fops);
2919 
2920 	if (core->num_parents > 1)
2921 		debugfs_create_file("clk_possible_parents", 0444, root, core,
2922 				    &possible_parents_fops);
2923 
2924 	if (core->ops->debug_init)
2925 		core->ops->debug_init(core->hw, core->dentry);
2926 }
2927 
2928 /**
2929  * clk_debug_register - add a clk node to the debugfs clk directory
2930  * @core: the clk being added to the debugfs clk directory
2931  *
2932  * Dynamically adds a clk to the debugfs clk directory if debugfs has been
2933  * initialized.  Otherwise it bails out early since the debugfs clk directory
2934  * will be created lazily by clk_debug_init as part of a late_initcall.
2935  */
2936 static void clk_debug_register(struct clk_core *core)
2937 {
2938 	mutex_lock(&clk_debug_lock);
2939 	hlist_add_head(&core->debug_node, &clk_debug_list);
2940 	if (inited)
2941 		clk_debug_create_one(core, rootdir);
2942 	mutex_unlock(&clk_debug_lock);
2943 }
2944 
2945  /**
2946  * clk_debug_unregister - remove a clk node from the debugfs clk directory
2947  * @core: the clk being removed from the debugfs clk directory
2948  *
2949  * Dynamically removes a clk and all its child nodes from the
2950  * debugfs clk directory if clk->dentry points to debugfs created by
2951  * clk_debug_register in __clk_core_init.
2952  */
2953 static void clk_debug_unregister(struct clk_core *core)
2954 {
2955 	mutex_lock(&clk_debug_lock);
2956 	hlist_del_init(&core->debug_node);
2957 	debugfs_remove_recursive(core->dentry);
2958 	core->dentry = NULL;
2959 	mutex_unlock(&clk_debug_lock);
2960 }
2961 
2962 /**
2963  * clk_debug_init - lazily populate the debugfs clk directory
2964  *
2965  * clks are often initialized very early during boot before memory can be
2966  * dynamically allocated and well before debugfs is setup. This function
2967  * populates the debugfs clk directory once at boot-time when we know that
2968  * debugfs is setup. It should only be called once at boot-time, all other clks
2969  * added dynamically will be done so with clk_debug_register.
2970  */
2971 static int __init clk_debug_init(void)
2972 {
2973 	struct clk_core *core;
2974 
2975 	rootdir = debugfs_create_dir("clk", NULL);
2976 
2977 	debugfs_create_file("clk_summary", 0444, rootdir, &all_lists,
2978 			    &clk_summary_fops);
2979 	debugfs_create_file("clk_dump", 0444, rootdir, &all_lists,
2980 			    &clk_dump_fops);
2981 	debugfs_create_file("clk_orphan_summary", 0444, rootdir, &orphan_list,
2982 			    &clk_summary_fops);
2983 	debugfs_create_file("clk_orphan_dump", 0444, rootdir, &orphan_list,
2984 			    &clk_dump_fops);
2985 
2986 	mutex_lock(&clk_debug_lock);
2987 	hlist_for_each_entry(core, &clk_debug_list, debug_node)
2988 		clk_debug_create_one(core, rootdir);
2989 
2990 	inited = 1;
2991 	mutex_unlock(&clk_debug_lock);
2992 
2993 	return 0;
2994 }
2995 late_initcall(clk_debug_init);
2996 #else
2997 static inline void clk_debug_register(struct clk_core *core) { }
2998 static inline void clk_debug_reparent(struct clk_core *core,
2999 				      struct clk_core *new_parent)
3000 {
3001 }
3002 static inline void clk_debug_unregister(struct clk_core *core)
3003 {
3004 }
3005 #endif
3006 
3007 /**
3008  * __clk_core_init - initialize the data structures in a struct clk_core
3009  * @core:	clk_core being initialized
3010  *
3011  * Initializes the lists in struct clk_core, queries the hardware for the
3012  * parent and rate and sets them both.
3013  */
3014 static int __clk_core_init(struct clk_core *core)
3015 {
3016 	int i, ret;
3017 	struct clk_core *orphan;
3018 	struct hlist_node *tmp2;
3019 	unsigned long rate;
3020 
3021 	if (!core)
3022 		return -EINVAL;
3023 
3024 	clk_prepare_lock();
3025 
3026 	ret = clk_pm_runtime_get(core);
3027 	if (ret)
3028 		goto unlock;
3029 
3030 	/* check to see if a clock with this name is already registered */
3031 	if (clk_core_lookup(core->name)) {
3032 		pr_debug("%s: clk %s already initialized\n",
3033 				__func__, core->name);
3034 		ret = -EEXIST;
3035 		goto out;
3036 	}
3037 
3038 	/* check that clk_ops are sane.  See Documentation/driver-api/clk.rst */
3039 	if (core->ops->set_rate &&
3040 	    !((core->ops->round_rate || core->ops->determine_rate) &&
3041 	      core->ops->recalc_rate)) {
3042 		pr_err("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n",
3043 		       __func__, core->name);
3044 		ret = -EINVAL;
3045 		goto out;
3046 	}
3047 
3048 	if (core->ops->set_parent && !core->ops->get_parent) {
3049 		pr_err("%s: %s must implement .get_parent & .set_parent\n",
3050 		       __func__, core->name);
3051 		ret = -EINVAL;
3052 		goto out;
3053 	}
3054 
3055 	if (core->num_parents > 1 && !core->ops->get_parent) {
3056 		pr_err("%s: %s must implement .get_parent as it has multi parents\n",
3057 		       __func__, core->name);
3058 		ret = -EINVAL;
3059 		goto out;
3060 	}
3061 
3062 	if (core->ops->set_rate_and_parent &&
3063 			!(core->ops->set_parent && core->ops->set_rate)) {
3064 		pr_err("%s: %s must implement .set_parent & .set_rate\n",
3065 				__func__, core->name);
3066 		ret = -EINVAL;
3067 		goto out;
3068 	}
3069 
3070 	/* throw a WARN if any entries in parent_names are NULL */
3071 	for (i = 0; i < core->num_parents; i++)
3072 		WARN(!core->parent_names[i],
3073 				"%s: invalid NULL in %s's .parent_names\n",
3074 				__func__, core->name);
3075 
3076 	core->parent = __clk_init_parent(core);
3077 
3078 	/*
3079 	 * Populate core->parent if parent has already been clk_core_init'd. If
3080 	 * parent has not yet been clk_core_init'd then place clk in the orphan
3081 	 * list.  If clk doesn't have any parents then place it in the root
3082 	 * clk list.
3083 	 *
3084 	 * Every time a new clk is clk_init'd then we walk the list of orphan
3085 	 * clocks and re-parent any that are children of the clock currently
3086 	 * being clk_init'd.
3087 	 */
3088 	if (core->parent) {
3089 		hlist_add_head(&core->child_node,
3090 				&core->parent->children);
3091 		core->orphan = core->parent->orphan;
3092 	} else if (!core->num_parents) {
3093 		hlist_add_head(&core->child_node, &clk_root_list);
3094 		core->orphan = false;
3095 	} else {
3096 		hlist_add_head(&core->child_node, &clk_orphan_list);
3097 		core->orphan = true;
3098 	}
3099 
3100 	/*
3101 	 * optional platform-specific magic
3102 	 *
3103 	 * The .init callback is not used by any of the basic clock types, but
3104 	 * exists for weird hardware that must perform initialization magic.
3105 	 * Please consider other ways of solving initialization problems before
3106 	 * using this callback, as its use is discouraged.
3107 	 */
3108 	if (core->ops->init)
3109 		core->ops->init(core->hw);
3110 
3111 	/*
3112 	 * Set clk's accuracy.  The preferred method is to use
3113 	 * .recalc_accuracy. For simple clocks and lazy developers the default
3114 	 * fallback is to use the parent's accuracy.  If a clock doesn't have a
3115 	 * parent (or is orphaned) then accuracy is set to zero (perfect
3116 	 * clock).
3117 	 */
3118 	if (core->ops->recalc_accuracy)
3119 		core->accuracy = core->ops->recalc_accuracy(core->hw,
3120 					__clk_get_accuracy(core->parent));
3121 	else if (core->parent)
3122 		core->accuracy = core->parent->accuracy;
3123 	else
3124 		core->accuracy = 0;
3125 
3126 	/*
3127 	 * Set clk's phase.
3128 	 * Since a phase is by definition relative to its parent, just
3129 	 * query the current clock phase, or just assume it's in phase.
3130 	 */
3131 	if (core->ops->get_phase)
3132 		core->phase = core->ops->get_phase(core->hw);
3133 	else
3134 		core->phase = 0;
3135 
3136 	/*
3137 	 * Set clk's duty cycle.
3138 	 */
3139 	clk_core_update_duty_cycle_nolock(core);
3140 
3141 	/*
3142 	 * Set clk's rate.  The preferred method is to use .recalc_rate.  For
3143 	 * simple clocks and lazy developers the default fallback is to use the
3144 	 * parent's rate.  If a clock doesn't have a parent (or is orphaned)
3145 	 * then rate is set to zero.
3146 	 */
3147 	if (core->ops->recalc_rate)
3148 		rate = core->ops->recalc_rate(core->hw,
3149 				clk_core_get_rate_nolock(core->parent));
3150 	else if (core->parent)
3151 		rate = core->parent->rate;
3152 	else
3153 		rate = 0;
3154 	core->rate = core->req_rate = rate;
3155 
3156 	/*
3157 	 * Enable CLK_IS_CRITICAL clocks so newly added critical clocks
3158 	 * don't get accidentally disabled when walking the orphan tree and
3159 	 * reparenting clocks
3160 	 */
3161 	if (core->flags & CLK_IS_CRITICAL) {
3162 		unsigned long flags;
3163 
3164 		clk_core_prepare(core);
3165 
3166 		flags = clk_enable_lock();
3167 		clk_core_enable(core);
3168 		clk_enable_unlock(flags);
3169 	}
3170 
3171 	/*
3172 	 * walk the list of orphan clocks and reparent any that newly finds a
3173 	 * parent.
3174 	 */
3175 	hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) {
3176 		struct clk_core *parent = __clk_init_parent(orphan);
3177 
3178 		/*
3179 		 * We need to use __clk_set_parent_before() and _after() to
3180 		 * to properly migrate any prepare/enable count of the orphan
3181 		 * clock. This is important for CLK_IS_CRITICAL clocks, which
3182 		 * are enabled during init but might not have a parent yet.
3183 		 */
3184 		if (parent) {
3185 			/* update the clk tree topology */
3186 			__clk_set_parent_before(orphan, parent);
3187 			__clk_set_parent_after(orphan, parent, NULL);
3188 			__clk_recalc_accuracies(orphan);
3189 			__clk_recalc_rates(orphan, 0);
3190 		}
3191 	}
3192 
3193 	kref_init(&core->ref);
3194 out:
3195 	clk_pm_runtime_put(core);
3196 unlock:
3197 	clk_prepare_unlock();
3198 
3199 	if (!ret)
3200 		clk_debug_register(core);
3201 
3202 	return ret;
3203 }
3204 
3205 struct clk *__clk_create_clk(struct clk_hw *hw, const char *dev_id,
3206 			     const char *con_id)
3207 {
3208 	struct clk *clk;
3209 
3210 	/* This is to allow this function to be chained to others */
3211 	if (IS_ERR_OR_NULL(hw))
3212 		return ERR_CAST(hw);
3213 
3214 	clk = kzalloc(sizeof(*clk), GFP_KERNEL);
3215 	if (!clk)
3216 		return ERR_PTR(-ENOMEM);
3217 
3218 	clk->core = hw->core;
3219 	clk->dev_id = dev_id;
3220 	clk->con_id = kstrdup_const(con_id, GFP_KERNEL);
3221 	clk->max_rate = ULONG_MAX;
3222 
3223 	clk_prepare_lock();
3224 	hlist_add_head(&clk->clks_node, &hw->core->clks);
3225 	clk_prepare_unlock();
3226 
3227 	return clk;
3228 }
3229 
3230 /* keep in sync with __clk_put */
3231 void __clk_free_clk(struct clk *clk)
3232 {
3233 	clk_prepare_lock();
3234 	hlist_del(&clk->clks_node);
3235 	clk_prepare_unlock();
3236 
3237 	kfree_const(clk->con_id);
3238 	kfree(clk);
3239 }
3240 
3241 /**
3242  * clk_register - allocate a new clock, register it and return an opaque cookie
3243  * @dev: device that is registering this clock
3244  * @hw: link to hardware-specific clock data
3245  *
3246  * clk_register is the primary interface for populating the clock tree with new
3247  * clock nodes.  It returns a pointer to the newly allocated struct clk which
3248  * cannot be dereferenced by driver code but may be used in conjunction with the
3249  * rest of the clock API.  In the event of an error clk_register will return an
3250  * error code; drivers must test for an error code after calling clk_register.
3251  */
3252 struct clk *clk_register(struct device *dev, struct clk_hw *hw)
3253 {
3254 	int i, ret;
3255 	struct clk_core *core;
3256 
3257 	core = kzalloc(sizeof(*core), GFP_KERNEL);
3258 	if (!core) {
3259 		ret = -ENOMEM;
3260 		goto fail_out;
3261 	}
3262 
3263 	core->name = kstrdup_const(hw->init->name, GFP_KERNEL);
3264 	if (!core->name) {
3265 		ret = -ENOMEM;
3266 		goto fail_name;
3267 	}
3268 
3269 	if (WARN_ON(!hw->init->ops)) {
3270 		ret = -EINVAL;
3271 		goto fail_ops;
3272 	}
3273 	core->ops = hw->init->ops;
3274 
3275 	if (dev && pm_runtime_enabled(dev))
3276 		core->dev = dev;
3277 	if (dev && dev->driver)
3278 		core->owner = dev->driver->owner;
3279 	core->hw = hw;
3280 	core->flags = hw->init->flags;
3281 	core->num_parents = hw->init->num_parents;
3282 	core->min_rate = 0;
3283 	core->max_rate = ULONG_MAX;
3284 	hw->core = core;
3285 
3286 	/* allocate local copy in case parent_names is __initdata */
3287 	core->parent_names = kcalloc(core->num_parents, sizeof(char *),
3288 					GFP_KERNEL);
3289 
3290 	if (!core->parent_names) {
3291 		ret = -ENOMEM;
3292 		goto fail_parent_names;
3293 	}
3294 
3295 
3296 	/* copy each string name in case parent_names is __initdata */
3297 	for (i = 0; i < core->num_parents; i++) {
3298 		core->parent_names[i] = kstrdup_const(hw->init->parent_names[i],
3299 						GFP_KERNEL);
3300 		if (!core->parent_names[i]) {
3301 			ret = -ENOMEM;
3302 			goto fail_parent_names_copy;
3303 		}
3304 	}
3305 
3306 	/* avoid unnecessary string look-ups of clk_core's possible parents. */
3307 	core->parents = kcalloc(core->num_parents, sizeof(*core->parents),
3308 				GFP_KERNEL);
3309 	if (!core->parents) {
3310 		ret = -ENOMEM;
3311 		goto fail_parents;
3312 	};
3313 
3314 	INIT_HLIST_HEAD(&core->clks);
3315 
3316 	hw->clk = __clk_create_clk(hw, NULL, NULL);
3317 	if (IS_ERR(hw->clk)) {
3318 		ret = PTR_ERR(hw->clk);
3319 		goto fail_parents;
3320 	}
3321 
3322 	ret = __clk_core_init(core);
3323 	if (!ret)
3324 		return hw->clk;
3325 
3326 	__clk_free_clk(hw->clk);
3327 	hw->clk = NULL;
3328 
3329 fail_parents:
3330 	kfree(core->parents);
3331 fail_parent_names_copy:
3332 	while (--i >= 0)
3333 		kfree_const(core->parent_names[i]);
3334 	kfree(core->parent_names);
3335 fail_parent_names:
3336 fail_ops:
3337 	kfree_const(core->name);
3338 fail_name:
3339 	kfree(core);
3340 fail_out:
3341 	return ERR_PTR(ret);
3342 }
3343 EXPORT_SYMBOL_GPL(clk_register);
3344 
3345 /**
3346  * clk_hw_register - register a clk_hw and return an error code
3347  * @dev: device that is registering this clock
3348  * @hw: link to hardware-specific clock data
3349  *
3350  * clk_hw_register is the primary interface for populating the clock tree with
3351  * new clock nodes. It returns an integer equal to zero indicating success or
3352  * less than zero indicating failure. Drivers must test for an error code after
3353  * calling clk_hw_register().
3354  */
3355 int clk_hw_register(struct device *dev, struct clk_hw *hw)
3356 {
3357 	return PTR_ERR_OR_ZERO(clk_register(dev, hw));
3358 }
3359 EXPORT_SYMBOL_GPL(clk_hw_register);
3360 
3361 /* Free memory allocated for a clock. */
3362 static void __clk_release(struct kref *ref)
3363 {
3364 	struct clk_core *core = container_of(ref, struct clk_core, ref);
3365 	int i = core->num_parents;
3366 
3367 	lockdep_assert_held(&prepare_lock);
3368 
3369 	kfree(core->parents);
3370 	while (--i >= 0)
3371 		kfree_const(core->parent_names[i]);
3372 
3373 	kfree(core->parent_names);
3374 	kfree_const(core->name);
3375 	kfree(core);
3376 }
3377 
3378 /*
3379  * Empty clk_ops for unregistered clocks. These are used temporarily
3380  * after clk_unregister() was called on a clock and until last clock
3381  * consumer calls clk_put() and the struct clk object is freed.
3382  */
3383 static int clk_nodrv_prepare_enable(struct clk_hw *hw)
3384 {
3385 	return -ENXIO;
3386 }
3387 
3388 static void clk_nodrv_disable_unprepare(struct clk_hw *hw)
3389 {
3390 	WARN_ON_ONCE(1);
3391 }
3392 
3393 static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate,
3394 					unsigned long parent_rate)
3395 {
3396 	return -ENXIO;
3397 }
3398 
3399 static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index)
3400 {
3401 	return -ENXIO;
3402 }
3403 
3404 static const struct clk_ops clk_nodrv_ops = {
3405 	.enable		= clk_nodrv_prepare_enable,
3406 	.disable	= clk_nodrv_disable_unprepare,
3407 	.prepare	= clk_nodrv_prepare_enable,
3408 	.unprepare	= clk_nodrv_disable_unprepare,
3409 	.set_rate	= clk_nodrv_set_rate,
3410 	.set_parent	= clk_nodrv_set_parent,
3411 };
3412 
3413 /**
3414  * clk_unregister - unregister a currently registered clock
3415  * @clk: clock to unregister
3416  */
3417 void clk_unregister(struct clk *clk)
3418 {
3419 	unsigned long flags;
3420 
3421 	if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
3422 		return;
3423 
3424 	clk_debug_unregister(clk->core);
3425 
3426 	clk_prepare_lock();
3427 
3428 	if (clk->core->ops == &clk_nodrv_ops) {
3429 		pr_err("%s: unregistered clock: %s\n", __func__,
3430 		       clk->core->name);
3431 		goto unlock;
3432 	}
3433 	/*
3434 	 * Assign empty clock ops for consumers that might still hold
3435 	 * a reference to this clock.
3436 	 */
3437 	flags = clk_enable_lock();
3438 	clk->core->ops = &clk_nodrv_ops;
3439 	clk_enable_unlock(flags);
3440 
3441 	if (!hlist_empty(&clk->core->children)) {
3442 		struct clk_core *child;
3443 		struct hlist_node *t;
3444 
3445 		/* Reparent all children to the orphan list. */
3446 		hlist_for_each_entry_safe(child, t, &clk->core->children,
3447 					  child_node)
3448 			clk_core_set_parent_nolock(child, NULL);
3449 	}
3450 
3451 	hlist_del_init(&clk->core->child_node);
3452 
3453 	if (clk->core->prepare_count)
3454 		pr_warn("%s: unregistering prepared clock: %s\n",
3455 					__func__, clk->core->name);
3456 
3457 	if (clk->core->protect_count)
3458 		pr_warn("%s: unregistering protected clock: %s\n",
3459 					__func__, clk->core->name);
3460 
3461 	kref_put(&clk->core->ref, __clk_release);
3462 unlock:
3463 	clk_prepare_unlock();
3464 }
3465 EXPORT_SYMBOL_GPL(clk_unregister);
3466 
3467 /**
3468  * clk_hw_unregister - unregister a currently registered clk_hw
3469  * @hw: hardware-specific clock data to unregister
3470  */
3471 void clk_hw_unregister(struct clk_hw *hw)
3472 {
3473 	clk_unregister(hw->clk);
3474 }
3475 EXPORT_SYMBOL_GPL(clk_hw_unregister);
3476 
3477 static void devm_clk_release(struct device *dev, void *res)
3478 {
3479 	clk_unregister(*(struct clk **)res);
3480 }
3481 
3482 static void devm_clk_hw_release(struct device *dev, void *res)
3483 {
3484 	clk_hw_unregister(*(struct clk_hw **)res);
3485 }
3486 
3487 /**
3488  * devm_clk_register - resource managed clk_register()
3489  * @dev: device that is registering this clock
3490  * @hw: link to hardware-specific clock data
3491  *
3492  * Managed clk_register(). Clocks returned from this function are
3493  * automatically clk_unregister()ed on driver detach. See clk_register() for
3494  * more information.
3495  */
3496 struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw)
3497 {
3498 	struct clk *clk;
3499 	struct clk **clkp;
3500 
3501 	clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL);
3502 	if (!clkp)
3503 		return ERR_PTR(-ENOMEM);
3504 
3505 	clk = clk_register(dev, hw);
3506 	if (!IS_ERR(clk)) {
3507 		*clkp = clk;
3508 		devres_add(dev, clkp);
3509 	} else {
3510 		devres_free(clkp);
3511 	}
3512 
3513 	return clk;
3514 }
3515 EXPORT_SYMBOL_GPL(devm_clk_register);
3516 
3517 /**
3518  * devm_clk_hw_register - resource managed clk_hw_register()
3519  * @dev: device that is registering this clock
3520  * @hw: link to hardware-specific clock data
3521  *
3522  * Managed clk_hw_register(). Clocks registered by this function are
3523  * automatically clk_hw_unregister()ed on driver detach. See clk_hw_register()
3524  * for more information.
3525  */
3526 int devm_clk_hw_register(struct device *dev, struct clk_hw *hw)
3527 {
3528 	struct clk_hw **hwp;
3529 	int ret;
3530 
3531 	hwp = devres_alloc(devm_clk_hw_release, sizeof(*hwp), GFP_KERNEL);
3532 	if (!hwp)
3533 		return -ENOMEM;
3534 
3535 	ret = clk_hw_register(dev, hw);
3536 	if (!ret) {
3537 		*hwp = hw;
3538 		devres_add(dev, hwp);
3539 	} else {
3540 		devres_free(hwp);
3541 	}
3542 
3543 	return ret;
3544 }
3545 EXPORT_SYMBOL_GPL(devm_clk_hw_register);
3546 
3547 static int devm_clk_match(struct device *dev, void *res, void *data)
3548 {
3549 	struct clk *c = res;
3550 	if (WARN_ON(!c))
3551 		return 0;
3552 	return c == data;
3553 }
3554 
3555 static int devm_clk_hw_match(struct device *dev, void *res, void *data)
3556 {
3557 	struct clk_hw *hw = res;
3558 
3559 	if (WARN_ON(!hw))
3560 		return 0;
3561 	return hw == data;
3562 }
3563 
3564 /**
3565  * devm_clk_unregister - resource managed clk_unregister()
3566  * @clk: clock to unregister
3567  *
3568  * Deallocate a clock allocated with devm_clk_register(). Normally
3569  * this function will not need to be called and the resource management
3570  * code will ensure that the resource is freed.
3571  */
3572 void devm_clk_unregister(struct device *dev, struct clk *clk)
3573 {
3574 	WARN_ON(devres_release(dev, devm_clk_release, devm_clk_match, clk));
3575 }
3576 EXPORT_SYMBOL_GPL(devm_clk_unregister);
3577 
3578 /**
3579  * devm_clk_hw_unregister - resource managed clk_hw_unregister()
3580  * @dev: device that is unregistering the hardware-specific clock data
3581  * @hw: link to hardware-specific clock data
3582  *
3583  * Unregister a clk_hw registered with devm_clk_hw_register(). Normally
3584  * this function will not need to be called and the resource management
3585  * code will ensure that the resource is freed.
3586  */
3587 void devm_clk_hw_unregister(struct device *dev, struct clk_hw *hw)
3588 {
3589 	WARN_ON(devres_release(dev, devm_clk_hw_release, devm_clk_hw_match,
3590 				hw));
3591 }
3592 EXPORT_SYMBOL_GPL(devm_clk_hw_unregister);
3593 
3594 /*
3595  * clkdev helpers
3596  */
3597 int __clk_get(struct clk *clk)
3598 {
3599 	struct clk_core *core = !clk ? NULL : clk->core;
3600 
3601 	if (core) {
3602 		if (!try_module_get(core->owner))
3603 			return 0;
3604 
3605 		kref_get(&core->ref);
3606 	}
3607 	return 1;
3608 }
3609 
3610 /* keep in sync with __clk_free_clk */
3611 void __clk_put(struct clk *clk)
3612 {
3613 	struct module *owner;
3614 
3615 	if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
3616 		return;
3617 
3618 	clk_prepare_lock();
3619 
3620 	/*
3621 	 * Before calling clk_put, all calls to clk_rate_exclusive_get() from a
3622 	 * given user should be balanced with calls to clk_rate_exclusive_put()
3623 	 * and by that same consumer
3624 	 */
3625 	if (WARN_ON(clk->exclusive_count)) {
3626 		/* We voiced our concern, let's sanitize the situation */
3627 		clk->core->protect_count -= (clk->exclusive_count - 1);
3628 		clk_core_rate_unprotect(clk->core);
3629 		clk->exclusive_count = 0;
3630 	}
3631 
3632 	hlist_del(&clk->clks_node);
3633 	if (clk->min_rate > clk->core->req_rate ||
3634 	    clk->max_rate < clk->core->req_rate)
3635 		clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
3636 
3637 	owner = clk->core->owner;
3638 	kref_put(&clk->core->ref, __clk_release);
3639 
3640 	clk_prepare_unlock();
3641 
3642 	module_put(owner);
3643 
3644 	kfree_const(clk->con_id);
3645 	kfree(clk);
3646 }
3647 
3648 /***        clk rate change notifiers        ***/
3649 
3650 /**
3651  * clk_notifier_register - add a clk rate change notifier
3652  * @clk: struct clk * to watch
3653  * @nb: struct notifier_block * with callback info
3654  *
3655  * Request notification when clk's rate changes.  This uses an SRCU
3656  * notifier because we want it to block and notifier unregistrations are
3657  * uncommon.  The callbacks associated with the notifier must not
3658  * re-enter into the clk framework by calling any top-level clk APIs;
3659  * this will cause a nested prepare_lock mutex.
3660  *
3661  * In all notification cases (pre, post and abort rate change) the original
3662  * clock rate is passed to the callback via struct clk_notifier_data.old_rate
3663  * and the new frequency is passed via struct clk_notifier_data.new_rate.
3664  *
3665  * clk_notifier_register() must be called from non-atomic context.
3666  * Returns -EINVAL if called with null arguments, -ENOMEM upon
3667  * allocation failure; otherwise, passes along the return value of
3668  * srcu_notifier_chain_register().
3669  */
3670 int clk_notifier_register(struct clk *clk, struct notifier_block *nb)
3671 {
3672 	struct clk_notifier *cn;
3673 	int ret = -ENOMEM;
3674 
3675 	if (!clk || !nb)
3676 		return -EINVAL;
3677 
3678 	clk_prepare_lock();
3679 
3680 	/* search the list of notifiers for this clk */
3681 	list_for_each_entry(cn, &clk_notifier_list, node)
3682 		if (cn->clk == clk)
3683 			break;
3684 
3685 	/* if clk wasn't in the notifier list, allocate new clk_notifier */
3686 	if (cn->clk != clk) {
3687 		cn = kzalloc(sizeof(*cn), GFP_KERNEL);
3688 		if (!cn)
3689 			goto out;
3690 
3691 		cn->clk = clk;
3692 		srcu_init_notifier_head(&cn->notifier_head);
3693 
3694 		list_add(&cn->node, &clk_notifier_list);
3695 	}
3696 
3697 	ret = srcu_notifier_chain_register(&cn->notifier_head, nb);
3698 
3699 	clk->core->notifier_count++;
3700 
3701 out:
3702 	clk_prepare_unlock();
3703 
3704 	return ret;
3705 }
3706 EXPORT_SYMBOL_GPL(clk_notifier_register);
3707 
3708 /**
3709  * clk_notifier_unregister - remove a clk rate change notifier
3710  * @clk: struct clk *
3711  * @nb: struct notifier_block * with callback info
3712  *
3713  * Request no further notification for changes to 'clk' and frees memory
3714  * allocated in clk_notifier_register.
3715  *
3716  * Returns -EINVAL if called with null arguments; otherwise, passes
3717  * along the return value of srcu_notifier_chain_unregister().
3718  */
3719 int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb)
3720 {
3721 	struct clk_notifier *cn = NULL;
3722 	int ret = -EINVAL;
3723 
3724 	if (!clk || !nb)
3725 		return -EINVAL;
3726 
3727 	clk_prepare_lock();
3728 
3729 	list_for_each_entry(cn, &clk_notifier_list, node)
3730 		if (cn->clk == clk)
3731 			break;
3732 
3733 	if (cn->clk == clk) {
3734 		ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb);
3735 
3736 		clk->core->notifier_count--;
3737 
3738 		/* XXX the notifier code should handle this better */
3739 		if (!cn->notifier_head.head) {
3740 			srcu_cleanup_notifier_head(&cn->notifier_head);
3741 			list_del(&cn->node);
3742 			kfree(cn);
3743 		}
3744 
3745 	} else {
3746 		ret = -ENOENT;
3747 	}
3748 
3749 	clk_prepare_unlock();
3750 
3751 	return ret;
3752 }
3753 EXPORT_SYMBOL_GPL(clk_notifier_unregister);
3754 
3755 #ifdef CONFIG_OF
3756 /**
3757  * struct of_clk_provider - Clock provider registration structure
3758  * @link: Entry in global list of clock providers
3759  * @node: Pointer to device tree node of clock provider
3760  * @get: Get clock callback.  Returns NULL or a struct clk for the
3761  *       given clock specifier
3762  * @data: context pointer to be passed into @get callback
3763  */
3764 struct of_clk_provider {
3765 	struct list_head link;
3766 
3767 	struct device_node *node;
3768 	struct clk *(*get)(struct of_phandle_args *clkspec, void *data);
3769 	struct clk_hw *(*get_hw)(struct of_phandle_args *clkspec, void *data);
3770 	void *data;
3771 };
3772 
3773 static const struct of_device_id __clk_of_table_sentinel
3774 	__used __section(__clk_of_table_end);
3775 
3776 static LIST_HEAD(of_clk_providers);
3777 static DEFINE_MUTEX(of_clk_mutex);
3778 
3779 struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec,
3780 				     void *data)
3781 {
3782 	return data;
3783 }
3784 EXPORT_SYMBOL_GPL(of_clk_src_simple_get);
3785 
3786 struct clk_hw *of_clk_hw_simple_get(struct of_phandle_args *clkspec, void *data)
3787 {
3788 	return data;
3789 }
3790 EXPORT_SYMBOL_GPL(of_clk_hw_simple_get);
3791 
3792 struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data)
3793 {
3794 	struct clk_onecell_data *clk_data = data;
3795 	unsigned int idx = clkspec->args[0];
3796 
3797 	if (idx >= clk_data->clk_num) {
3798 		pr_err("%s: invalid clock index %u\n", __func__, idx);
3799 		return ERR_PTR(-EINVAL);
3800 	}
3801 
3802 	return clk_data->clks[idx];
3803 }
3804 EXPORT_SYMBOL_GPL(of_clk_src_onecell_get);
3805 
3806 struct clk_hw *
3807 of_clk_hw_onecell_get(struct of_phandle_args *clkspec, void *data)
3808 {
3809 	struct clk_hw_onecell_data *hw_data = data;
3810 	unsigned int idx = clkspec->args[0];
3811 
3812 	if (idx >= hw_data->num) {
3813 		pr_err("%s: invalid index %u\n", __func__, idx);
3814 		return ERR_PTR(-EINVAL);
3815 	}
3816 
3817 	return hw_data->hws[idx];
3818 }
3819 EXPORT_SYMBOL_GPL(of_clk_hw_onecell_get);
3820 
3821 /**
3822  * of_clk_add_provider() - Register a clock provider for a node
3823  * @np: Device node pointer associated with clock provider
3824  * @clk_src_get: callback for decoding clock
3825  * @data: context pointer for @clk_src_get callback.
3826  */
3827 int of_clk_add_provider(struct device_node *np,
3828 			struct clk *(*clk_src_get)(struct of_phandle_args *clkspec,
3829 						   void *data),
3830 			void *data)
3831 {
3832 	struct of_clk_provider *cp;
3833 	int ret;
3834 
3835 	cp = kzalloc(sizeof(*cp), GFP_KERNEL);
3836 	if (!cp)
3837 		return -ENOMEM;
3838 
3839 	cp->node = of_node_get(np);
3840 	cp->data = data;
3841 	cp->get = clk_src_get;
3842 
3843 	mutex_lock(&of_clk_mutex);
3844 	list_add(&cp->link, &of_clk_providers);
3845 	mutex_unlock(&of_clk_mutex);
3846 	pr_debug("Added clock from %pOF\n", np);
3847 
3848 	ret = of_clk_set_defaults(np, true);
3849 	if (ret < 0)
3850 		of_clk_del_provider(np);
3851 
3852 	return ret;
3853 }
3854 EXPORT_SYMBOL_GPL(of_clk_add_provider);
3855 
3856 /**
3857  * of_clk_add_hw_provider() - Register a clock provider for a node
3858  * @np: Device node pointer associated with clock provider
3859  * @get: callback for decoding clk_hw
3860  * @data: context pointer for @get callback.
3861  */
3862 int of_clk_add_hw_provider(struct device_node *np,
3863 			   struct clk_hw *(*get)(struct of_phandle_args *clkspec,
3864 						 void *data),
3865 			   void *data)
3866 {
3867 	struct of_clk_provider *cp;
3868 	int ret;
3869 
3870 	cp = kzalloc(sizeof(*cp), GFP_KERNEL);
3871 	if (!cp)
3872 		return -ENOMEM;
3873 
3874 	cp->node = of_node_get(np);
3875 	cp->data = data;
3876 	cp->get_hw = get;
3877 
3878 	mutex_lock(&of_clk_mutex);
3879 	list_add(&cp->link, &of_clk_providers);
3880 	mutex_unlock(&of_clk_mutex);
3881 	pr_debug("Added clk_hw provider from %pOF\n", np);
3882 
3883 	ret = of_clk_set_defaults(np, true);
3884 	if (ret < 0)
3885 		of_clk_del_provider(np);
3886 
3887 	return ret;
3888 }
3889 EXPORT_SYMBOL_GPL(of_clk_add_hw_provider);
3890 
3891 static void devm_of_clk_release_provider(struct device *dev, void *res)
3892 {
3893 	of_clk_del_provider(*(struct device_node **)res);
3894 }
3895 
3896 int devm_of_clk_add_hw_provider(struct device *dev,
3897 			struct clk_hw *(*get)(struct of_phandle_args *clkspec,
3898 					      void *data),
3899 			void *data)
3900 {
3901 	struct device_node **ptr, *np;
3902 	int ret;
3903 
3904 	ptr = devres_alloc(devm_of_clk_release_provider, sizeof(*ptr),
3905 			   GFP_KERNEL);
3906 	if (!ptr)
3907 		return -ENOMEM;
3908 
3909 	np = dev->of_node;
3910 	ret = of_clk_add_hw_provider(np, get, data);
3911 	if (!ret) {
3912 		*ptr = np;
3913 		devres_add(dev, ptr);
3914 	} else {
3915 		devres_free(ptr);
3916 	}
3917 
3918 	return ret;
3919 }
3920 EXPORT_SYMBOL_GPL(devm_of_clk_add_hw_provider);
3921 
3922 /**
3923  * of_clk_del_provider() - Remove a previously registered clock provider
3924  * @np: Device node pointer associated with clock provider
3925  */
3926 void of_clk_del_provider(struct device_node *np)
3927 {
3928 	struct of_clk_provider *cp;
3929 
3930 	mutex_lock(&of_clk_mutex);
3931 	list_for_each_entry(cp, &of_clk_providers, link) {
3932 		if (cp->node == np) {
3933 			list_del(&cp->link);
3934 			of_node_put(cp->node);
3935 			kfree(cp);
3936 			break;
3937 		}
3938 	}
3939 	mutex_unlock(&of_clk_mutex);
3940 }
3941 EXPORT_SYMBOL_GPL(of_clk_del_provider);
3942 
3943 static int devm_clk_provider_match(struct device *dev, void *res, void *data)
3944 {
3945 	struct device_node **np = res;
3946 
3947 	if (WARN_ON(!np || !*np))
3948 		return 0;
3949 
3950 	return *np == data;
3951 }
3952 
3953 void devm_of_clk_del_provider(struct device *dev)
3954 {
3955 	int ret;
3956 
3957 	ret = devres_release(dev, devm_of_clk_release_provider,
3958 			     devm_clk_provider_match, dev->of_node);
3959 
3960 	WARN_ON(ret);
3961 }
3962 EXPORT_SYMBOL(devm_of_clk_del_provider);
3963 
3964 static struct clk_hw *
3965 __of_clk_get_hw_from_provider(struct of_clk_provider *provider,
3966 			      struct of_phandle_args *clkspec)
3967 {
3968 	struct clk *clk;
3969 
3970 	if (provider->get_hw)
3971 		return provider->get_hw(clkspec, provider->data);
3972 
3973 	clk = provider->get(clkspec, provider->data);
3974 	if (IS_ERR(clk))
3975 		return ERR_CAST(clk);
3976 	return __clk_get_hw(clk);
3977 }
3978 
3979 struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec,
3980 				       const char *dev_id, const char *con_id)
3981 {
3982 	struct of_clk_provider *provider;
3983 	struct clk *clk = ERR_PTR(-EPROBE_DEFER);
3984 	struct clk_hw *hw;
3985 
3986 	if (!clkspec)
3987 		return ERR_PTR(-EINVAL);
3988 
3989 	/* Check if we have such a provider in our array */
3990 	mutex_lock(&of_clk_mutex);
3991 	list_for_each_entry(provider, &of_clk_providers, link) {
3992 		if (provider->node == clkspec->np) {
3993 			hw = __of_clk_get_hw_from_provider(provider, clkspec);
3994 			clk = __clk_create_clk(hw, dev_id, con_id);
3995 		}
3996 
3997 		if (!IS_ERR(clk)) {
3998 			if (!__clk_get(clk)) {
3999 				__clk_free_clk(clk);
4000 				clk = ERR_PTR(-ENOENT);
4001 			}
4002 
4003 			break;
4004 		}
4005 	}
4006 	mutex_unlock(&of_clk_mutex);
4007 
4008 	return clk;
4009 }
4010 
4011 /**
4012  * of_clk_get_from_provider() - Lookup a clock from a clock provider
4013  * @clkspec: pointer to a clock specifier data structure
4014  *
4015  * This function looks up a struct clk from the registered list of clock
4016  * providers, an input is a clock specifier data structure as returned
4017  * from the of_parse_phandle_with_args() function call.
4018  */
4019 struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec)
4020 {
4021 	return __of_clk_get_from_provider(clkspec, NULL, __func__);
4022 }
4023 EXPORT_SYMBOL_GPL(of_clk_get_from_provider);
4024 
4025 /**
4026  * of_clk_get_parent_count() - Count the number of clocks a device node has
4027  * @np: device node to count
4028  *
4029  * Returns: The number of clocks that are possible parents of this node
4030  */
4031 unsigned int of_clk_get_parent_count(struct device_node *np)
4032 {
4033 	int count;
4034 
4035 	count = of_count_phandle_with_args(np, "clocks", "#clock-cells");
4036 	if (count < 0)
4037 		return 0;
4038 
4039 	return count;
4040 }
4041 EXPORT_SYMBOL_GPL(of_clk_get_parent_count);
4042 
4043 const char *of_clk_get_parent_name(struct device_node *np, int index)
4044 {
4045 	struct of_phandle_args clkspec;
4046 	struct property *prop;
4047 	const char *clk_name;
4048 	const __be32 *vp;
4049 	u32 pv;
4050 	int rc;
4051 	int count;
4052 	struct clk *clk;
4053 
4054 	rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index,
4055 					&clkspec);
4056 	if (rc)
4057 		return NULL;
4058 
4059 	index = clkspec.args_count ? clkspec.args[0] : 0;
4060 	count = 0;
4061 
4062 	/* if there is an indices property, use it to transfer the index
4063 	 * specified into an array offset for the clock-output-names property.
4064 	 */
4065 	of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) {
4066 		if (index == pv) {
4067 			index = count;
4068 			break;
4069 		}
4070 		count++;
4071 	}
4072 	/* We went off the end of 'clock-indices' without finding it */
4073 	if (prop && !vp)
4074 		return NULL;
4075 
4076 	if (of_property_read_string_index(clkspec.np, "clock-output-names",
4077 					  index,
4078 					  &clk_name) < 0) {
4079 		/*
4080 		 * Best effort to get the name if the clock has been
4081 		 * registered with the framework. If the clock isn't
4082 		 * registered, we return the node name as the name of
4083 		 * the clock as long as #clock-cells = 0.
4084 		 */
4085 		clk = of_clk_get_from_provider(&clkspec);
4086 		if (IS_ERR(clk)) {
4087 			if (clkspec.args_count == 0)
4088 				clk_name = clkspec.np->name;
4089 			else
4090 				clk_name = NULL;
4091 		} else {
4092 			clk_name = __clk_get_name(clk);
4093 			clk_put(clk);
4094 		}
4095 	}
4096 
4097 
4098 	of_node_put(clkspec.np);
4099 	return clk_name;
4100 }
4101 EXPORT_SYMBOL_GPL(of_clk_get_parent_name);
4102 
4103 /**
4104  * of_clk_parent_fill() - Fill @parents with names of @np's parents and return
4105  * number of parents
4106  * @np: Device node pointer associated with clock provider
4107  * @parents: pointer to char array that hold the parents' names
4108  * @size: size of the @parents array
4109  *
4110  * Return: number of parents for the clock node.
4111  */
4112 int of_clk_parent_fill(struct device_node *np, const char **parents,
4113 		       unsigned int size)
4114 {
4115 	unsigned int i = 0;
4116 
4117 	while (i < size && (parents[i] = of_clk_get_parent_name(np, i)) != NULL)
4118 		i++;
4119 
4120 	return i;
4121 }
4122 EXPORT_SYMBOL_GPL(of_clk_parent_fill);
4123 
4124 struct clock_provider {
4125 	void (*clk_init_cb)(struct device_node *);
4126 	struct device_node *np;
4127 	struct list_head node;
4128 };
4129 
4130 /*
4131  * This function looks for a parent clock. If there is one, then it
4132  * checks that the provider for this parent clock was initialized, in
4133  * this case the parent clock will be ready.
4134  */
4135 static int parent_ready(struct device_node *np)
4136 {
4137 	int i = 0;
4138 
4139 	while (true) {
4140 		struct clk *clk = of_clk_get(np, i);
4141 
4142 		/* this parent is ready we can check the next one */
4143 		if (!IS_ERR(clk)) {
4144 			clk_put(clk);
4145 			i++;
4146 			continue;
4147 		}
4148 
4149 		/* at least one parent is not ready, we exit now */
4150 		if (PTR_ERR(clk) == -EPROBE_DEFER)
4151 			return 0;
4152 
4153 		/*
4154 		 * Here we make assumption that the device tree is
4155 		 * written correctly. So an error means that there is
4156 		 * no more parent. As we didn't exit yet, then the
4157 		 * previous parent are ready. If there is no clock
4158 		 * parent, no need to wait for them, then we can
4159 		 * consider their absence as being ready
4160 		 */
4161 		return 1;
4162 	}
4163 }
4164 
4165 /**
4166  * of_clk_detect_critical() - set CLK_IS_CRITICAL flag from Device Tree
4167  * @np: Device node pointer associated with clock provider
4168  * @index: clock index
4169  * @flags: pointer to top-level framework flags
4170  *
4171  * Detects if the clock-critical property exists and, if so, sets the
4172  * corresponding CLK_IS_CRITICAL flag.
4173  *
4174  * Do not use this function. It exists only for legacy Device Tree
4175  * bindings, such as the one-clock-per-node style that are outdated.
4176  * Those bindings typically put all clock data into .dts and the Linux
4177  * driver has no clock data, thus making it impossible to set this flag
4178  * correctly from the driver. Only those drivers may call
4179  * of_clk_detect_critical from their setup functions.
4180  *
4181  * Return: error code or zero on success
4182  */
4183 int of_clk_detect_critical(struct device_node *np,
4184 					  int index, unsigned long *flags)
4185 {
4186 	struct property *prop;
4187 	const __be32 *cur;
4188 	uint32_t idx;
4189 
4190 	if (!np || !flags)
4191 		return -EINVAL;
4192 
4193 	of_property_for_each_u32(np, "clock-critical", prop, cur, idx)
4194 		if (index == idx)
4195 			*flags |= CLK_IS_CRITICAL;
4196 
4197 	return 0;
4198 }
4199 
4200 /**
4201  * of_clk_init() - Scan and init clock providers from the DT
4202  * @matches: array of compatible values and init functions for providers.
4203  *
4204  * This function scans the device tree for matching clock providers
4205  * and calls their initialization functions. It also does it by trying
4206  * to follow the dependencies.
4207  */
4208 void __init of_clk_init(const struct of_device_id *matches)
4209 {
4210 	const struct of_device_id *match;
4211 	struct device_node *np;
4212 	struct clock_provider *clk_provider, *next;
4213 	bool is_init_done;
4214 	bool force = false;
4215 	LIST_HEAD(clk_provider_list);
4216 
4217 	if (!matches)
4218 		matches = &__clk_of_table;
4219 
4220 	/* First prepare the list of the clocks providers */
4221 	for_each_matching_node_and_match(np, matches, &match) {
4222 		struct clock_provider *parent;
4223 
4224 		if (!of_device_is_available(np))
4225 			continue;
4226 
4227 		parent = kzalloc(sizeof(*parent), GFP_KERNEL);
4228 		if (!parent) {
4229 			list_for_each_entry_safe(clk_provider, next,
4230 						 &clk_provider_list, node) {
4231 				list_del(&clk_provider->node);
4232 				of_node_put(clk_provider->np);
4233 				kfree(clk_provider);
4234 			}
4235 			of_node_put(np);
4236 			return;
4237 		}
4238 
4239 		parent->clk_init_cb = match->data;
4240 		parent->np = of_node_get(np);
4241 		list_add_tail(&parent->node, &clk_provider_list);
4242 	}
4243 
4244 	while (!list_empty(&clk_provider_list)) {
4245 		is_init_done = false;
4246 		list_for_each_entry_safe(clk_provider, next,
4247 					&clk_provider_list, node) {
4248 			if (force || parent_ready(clk_provider->np)) {
4249 
4250 				/* Don't populate platform devices */
4251 				of_node_set_flag(clk_provider->np,
4252 						 OF_POPULATED);
4253 
4254 				clk_provider->clk_init_cb(clk_provider->np);
4255 				of_clk_set_defaults(clk_provider->np, true);
4256 
4257 				list_del(&clk_provider->node);
4258 				of_node_put(clk_provider->np);
4259 				kfree(clk_provider);
4260 				is_init_done = true;
4261 			}
4262 		}
4263 
4264 		/*
4265 		 * We didn't manage to initialize any of the
4266 		 * remaining providers during the last loop, so now we
4267 		 * initialize all the remaining ones unconditionally
4268 		 * in case the clock parent was not mandatory
4269 		 */
4270 		if (!is_init_done)
4271 			force = true;
4272 	}
4273 }
4274 #endif
4275