1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Driver for Silicon Labs Si570/Si571 Programmable XO/VCXO 4 * 5 * Copyright (C) 2010, 2011 Ericsson AB. 6 * Copyright (C) 2011 Guenter Roeck. 7 * Copyright (C) 2011 - 2021 Xilinx Inc. 8 * 9 * Author: Guenter Roeck <guenter.roeck@ericsson.com> 10 * Sören Brinkmann <soren.brinkmann@xilinx.com> 11 */ 12 13 #include <linux/clk.h> 14 #include <linux/clk-provider.h> 15 #include <linux/delay.h> 16 #include <linux/module.h> 17 #include <linux/i2c.h> 18 #include <linux/regmap.h> 19 #include <linux/slab.h> 20 21 /* Si570 registers */ 22 #define SI570_REG_HS_N1 7 23 #define SI570_REG_N1_RFREQ0 8 24 #define SI570_REG_RFREQ1 9 25 #define SI570_REG_RFREQ2 10 26 #define SI570_REG_RFREQ3 11 27 #define SI570_REG_RFREQ4 12 28 #define SI570_REG_CONTROL 135 29 #define SI570_REG_FREEZE_DCO 137 30 #define SI570_DIV_OFFSET_7PPM 6 31 32 #define HS_DIV_SHIFT 5 33 #define HS_DIV_MASK 0xe0 34 #define HS_DIV_OFFSET 4 35 #define N1_6_2_MASK 0x1f 36 #define N1_1_0_MASK 0xc0 37 #define RFREQ_37_32_MASK 0x3f 38 39 #define SI570_MIN_FREQ 10000000L 40 #define SI570_MAX_FREQ 1417500000L 41 #define SI598_MAX_FREQ 525000000L 42 43 #define FDCO_MIN 4850000000LL 44 #define FDCO_MAX 5670000000LL 45 46 #define SI570_CNTRL_RECALL (1 << 0) 47 #define SI570_CNTRL_FREEZE_M (1 << 5) 48 #define SI570_CNTRL_NEWFREQ (1 << 6) 49 50 #define SI570_FREEZE_DCO (1 << 4) 51 52 /** 53 * struct clk_si570: 54 * @hw: Clock hw struct 55 * @regmap: Device's regmap 56 * @div_offset: Rgister offset for dividers 57 * @max_freq: Maximum frequency for this device 58 * @fxtal: Factory xtal frequency 59 * @n1: Clock divider N1 60 * @hs_div: Clock divider HSDIV 61 * @rfreq: Clock multiplier RFREQ 62 * @frequency: Current output frequency 63 * @i2c_client: I2C client pointer 64 */ 65 struct clk_si570 { 66 struct clk_hw hw; 67 struct regmap *regmap; 68 unsigned int div_offset; 69 u64 max_freq; 70 u64 fxtal; 71 unsigned int n1; 72 unsigned int hs_div; 73 u64 rfreq; 74 u64 frequency; 75 struct i2c_client *i2c_client; 76 }; 77 #define to_clk_si570(_hw) container_of(_hw, struct clk_si570, hw) 78 79 enum clk_si570_variant { 80 si57x, 81 si59x 82 }; 83 84 /** 85 * si570_get_divs() - Read clock dividers from HW 86 * @data: Pointer to struct clk_si570 87 * @rfreq: Fractional multiplier (output) 88 * @n1: Divider N1 (output) 89 * @hs_div: Divider HSDIV (output) 90 * Returns 0 on success, negative errno otherwise. 91 * 92 * Retrieve clock dividers and multipliers from the HW. 93 */ 94 static int si570_get_divs(struct clk_si570 *data, u64 *rfreq, 95 unsigned int *n1, unsigned int *hs_div) 96 { 97 int err; 98 u8 reg[6]; 99 u64 tmp; 100 101 err = regmap_bulk_read(data->regmap, SI570_REG_HS_N1 + data->div_offset, 102 reg, ARRAY_SIZE(reg)); 103 if (err) 104 return err; 105 106 *hs_div = ((reg[0] & HS_DIV_MASK) >> HS_DIV_SHIFT) + HS_DIV_OFFSET; 107 *n1 = ((reg[0] & N1_6_2_MASK) << 2) + ((reg[1] & N1_1_0_MASK) >> 6) + 1; 108 /* Handle invalid cases */ 109 if (*n1 > 1) 110 *n1 &= ~1; 111 112 tmp = reg[1] & RFREQ_37_32_MASK; 113 tmp = (tmp << 8) + reg[2]; 114 tmp = (tmp << 8) + reg[3]; 115 tmp = (tmp << 8) + reg[4]; 116 tmp = (tmp << 8) + reg[5]; 117 *rfreq = tmp; 118 119 return 0; 120 } 121 122 /** 123 * si570_get_defaults() - Get default values 124 * @data: Driver data structure 125 * @fout: Factory frequency output 126 * @skip_recall: If true, don't recall NVM into RAM 127 * Returns 0 on success, negative errno otherwise. 128 */ 129 static int si570_get_defaults(struct clk_si570 *data, u64 fout, 130 bool skip_recall) 131 { 132 int err; 133 u64 fdco; 134 135 if (!skip_recall) 136 regmap_write(data->regmap, SI570_REG_CONTROL, 137 SI570_CNTRL_RECALL); 138 139 err = si570_get_divs(data, &data->rfreq, &data->n1, &data->hs_div); 140 if (err) 141 return err; 142 143 /* 144 * Accept optional precision loss to avoid arithmetic overflows. 145 * Acceptable per Silicon Labs Application Note AN334. 146 */ 147 fdco = fout * data->n1 * data->hs_div; 148 if (fdco >= (1LL << 36)) 149 data->fxtal = div64_u64(fdco << 24, data->rfreq >> 4); 150 else 151 data->fxtal = div64_u64(fdco << 28, data->rfreq); 152 153 data->frequency = fout; 154 155 return 0; 156 } 157 158 /** 159 * si570_update_rfreq() - Update clock multiplier 160 * @data: Driver data structure 161 * Passes on regmap_bulk_write() return value. 162 */ 163 static int si570_update_rfreq(struct clk_si570 *data) 164 { 165 u8 reg[5]; 166 167 reg[0] = ((data->n1 - 1) << 6) | 168 ((data->rfreq >> 32) & RFREQ_37_32_MASK); 169 reg[1] = (data->rfreq >> 24) & 0xff; 170 reg[2] = (data->rfreq >> 16) & 0xff; 171 reg[3] = (data->rfreq >> 8) & 0xff; 172 reg[4] = data->rfreq & 0xff; 173 174 return regmap_bulk_write(data->regmap, SI570_REG_N1_RFREQ0 + 175 data->div_offset, reg, ARRAY_SIZE(reg)); 176 } 177 178 /** 179 * si570_calc_divs() - Caluclate clock dividers 180 * @frequency: Target frequency 181 * @data: Driver data structure 182 * @out_rfreq: RFREG fractional multiplier (output) 183 * @out_n1: Clock divider N1 (output) 184 * @out_hs_div: Clock divider HSDIV (output) 185 * Returns 0 on success, negative errno otherwise. 186 * 187 * Calculate the clock dividers (@out_hs_div, @out_n1) and clock multiplier 188 * (@out_rfreq) for a given target @frequency. 189 */ 190 static int si570_calc_divs(unsigned long frequency, struct clk_si570 *data, 191 u64 *out_rfreq, unsigned int *out_n1, unsigned int *out_hs_div) 192 { 193 int i; 194 unsigned int n1, hs_div; 195 u64 fdco, best_fdco = ULLONG_MAX; 196 static const uint8_t si570_hs_div_values[] = { 11, 9, 7, 6, 5, 4 }; 197 198 for (i = 0; i < ARRAY_SIZE(si570_hs_div_values); i++) { 199 hs_div = si570_hs_div_values[i]; 200 /* Calculate lowest possible value for n1 */ 201 n1 = div_u64(div_u64(FDCO_MIN, hs_div), frequency); 202 if (!n1 || (n1 & 1)) 203 n1++; 204 while (n1 <= 128) { 205 fdco = (u64)frequency * (u64)hs_div * (u64)n1; 206 if (fdco > FDCO_MAX) 207 break; 208 if (fdco >= FDCO_MIN && fdco < best_fdco) { 209 *out_n1 = n1; 210 *out_hs_div = hs_div; 211 *out_rfreq = div64_u64(fdco << 28, data->fxtal); 212 best_fdco = fdco; 213 } 214 n1 += (n1 == 1 ? 1 : 2); 215 } 216 } 217 218 if (best_fdco == ULLONG_MAX) 219 return -EINVAL; 220 221 return 0; 222 } 223 224 static unsigned long si570_recalc_rate(struct clk_hw *hw, 225 unsigned long parent_rate) 226 { 227 int err; 228 u64 rfreq, rate; 229 unsigned int n1, hs_div; 230 struct clk_si570 *data = to_clk_si570(hw); 231 232 err = si570_get_divs(data, &rfreq, &n1, &hs_div); 233 if (err) { 234 dev_err(&data->i2c_client->dev, "unable to recalc rate\n"); 235 return data->frequency; 236 } 237 238 rfreq = div_u64(rfreq, hs_div * n1); 239 rate = (data->fxtal * rfreq) >> 28; 240 241 return rate; 242 } 243 244 static long si570_round_rate(struct clk_hw *hw, unsigned long rate, 245 unsigned long *parent_rate) 246 { 247 int err; 248 u64 rfreq; 249 unsigned int n1, hs_div; 250 struct clk_si570 *data = to_clk_si570(hw); 251 252 if (!rate) 253 return 0; 254 255 if (div64_u64(abs(rate - data->frequency) * 10000LL, 256 data->frequency) < 35) { 257 rfreq = div64_u64((data->rfreq * rate) + 258 div64_u64(data->frequency, 2), data->frequency); 259 n1 = data->n1; 260 hs_div = data->hs_div; 261 262 } else { 263 err = si570_calc_divs(rate, data, &rfreq, &n1, &hs_div); 264 if (err) { 265 dev_err(&data->i2c_client->dev, 266 "unable to round rate\n"); 267 return 0; 268 } 269 } 270 271 return rate; 272 } 273 274 /** 275 * si570_set_frequency() - Adjust output frequency 276 * @data: Driver data structure 277 * @frequency: Target frequency 278 * Returns 0 on success. 279 * 280 * Update output frequency for big frequency changes (> 3,500 ppm). 281 */ 282 static int si570_set_frequency(struct clk_si570 *data, unsigned long frequency) 283 { 284 int err; 285 286 err = si570_calc_divs(frequency, data, &data->rfreq, &data->n1, 287 &data->hs_div); 288 if (err) 289 return err; 290 291 /* 292 * The DCO reg should be accessed with a read-modify-write operation 293 * per AN334 294 */ 295 regmap_write(data->regmap, SI570_REG_FREEZE_DCO, SI570_FREEZE_DCO); 296 regmap_write(data->regmap, SI570_REG_HS_N1 + data->div_offset, 297 ((data->hs_div - HS_DIV_OFFSET) << HS_DIV_SHIFT) | 298 (((data->n1 - 1) >> 2) & N1_6_2_MASK)); 299 si570_update_rfreq(data); 300 regmap_write(data->regmap, SI570_REG_FREEZE_DCO, 0); 301 regmap_write(data->regmap, SI570_REG_CONTROL, SI570_CNTRL_NEWFREQ); 302 303 /* Applying a new frequency can take up to 10ms */ 304 usleep_range(10000, 12000); 305 306 return 0; 307 } 308 309 /** 310 * si570_set_frequency_small() - Adjust output frequency 311 * @data: Driver data structure 312 * @frequency: Target frequency 313 * Returns 0 on success. 314 * 315 * Update output frequency for small frequency changes (< 3,500 ppm). 316 */ 317 static int si570_set_frequency_small(struct clk_si570 *data, 318 unsigned long frequency) 319 { 320 /* 321 * This is a re-implementation of DIV_ROUND_CLOSEST 322 * using the div64_u64 function lieu of letting the compiler 323 * insert EABI calls 324 */ 325 data->rfreq = div64_u64((data->rfreq * frequency) + 326 div_u64(data->frequency, 2), data->frequency); 327 regmap_write(data->regmap, SI570_REG_CONTROL, SI570_CNTRL_FREEZE_M); 328 si570_update_rfreq(data); 329 regmap_write(data->regmap, SI570_REG_CONTROL, 0); 330 331 /* Applying a new frequency (small change) can take up to 100us */ 332 usleep_range(100, 200); 333 334 return 0; 335 } 336 337 static int si570_set_rate(struct clk_hw *hw, unsigned long rate, 338 unsigned long parent_rate) 339 { 340 struct clk_si570 *data = to_clk_si570(hw); 341 struct i2c_client *client = data->i2c_client; 342 int err; 343 344 if (rate < SI570_MIN_FREQ || rate > data->max_freq) { 345 dev_err(&client->dev, 346 "requested frequency %lu Hz is out of range\n", rate); 347 return -EINVAL; 348 } 349 350 if (div64_u64(abs(rate - data->frequency) * 10000LL, 351 data->frequency) < 35) 352 err = si570_set_frequency_small(data, rate); 353 else 354 err = si570_set_frequency(data, rate); 355 356 if (err) 357 return err; 358 359 data->frequency = rate; 360 361 return 0; 362 } 363 364 static const struct clk_ops si570_clk_ops = { 365 .recalc_rate = si570_recalc_rate, 366 .round_rate = si570_round_rate, 367 .set_rate = si570_set_rate, 368 }; 369 370 static bool si570_regmap_is_volatile(struct device *dev, unsigned int reg) 371 { 372 switch (reg) { 373 case SI570_REG_CONTROL: 374 return true; 375 default: 376 return false; 377 } 378 } 379 380 static bool si570_regmap_is_writeable(struct device *dev, unsigned int reg) 381 { 382 switch (reg) { 383 case SI570_REG_HS_N1 ... (SI570_REG_RFREQ4 + SI570_DIV_OFFSET_7PPM): 384 case SI570_REG_CONTROL: 385 case SI570_REG_FREEZE_DCO: 386 return true; 387 default: 388 return false; 389 } 390 } 391 392 static const struct regmap_config si570_regmap_config = { 393 .reg_bits = 8, 394 .val_bits = 8, 395 .cache_type = REGCACHE_RBTREE, 396 .max_register = 137, 397 .writeable_reg = si570_regmap_is_writeable, 398 .volatile_reg = si570_regmap_is_volatile, 399 }; 400 401 static const struct i2c_device_id si570_id[] = { 402 { "si570", si57x }, 403 { "si571", si57x }, 404 { "si598", si59x }, 405 { "si599", si59x }, 406 { } 407 }; 408 MODULE_DEVICE_TABLE(i2c, si570_id); 409 410 static int si570_probe(struct i2c_client *client) 411 { 412 struct clk_si570 *data; 413 struct clk_init_data init; 414 const struct i2c_device_id *id = i2c_match_id(si570_id, client); 415 u32 initial_fout, factory_fout, stability; 416 bool skip_recall; 417 int err; 418 enum clk_si570_variant variant = id->driver_data; 419 420 data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL); 421 if (!data) 422 return -ENOMEM; 423 424 init.ops = &si570_clk_ops; 425 init.flags = 0; 426 init.num_parents = 0; 427 data->hw.init = &init; 428 data->i2c_client = client; 429 430 if (variant == si57x) { 431 err = of_property_read_u32(client->dev.of_node, 432 "temperature-stability", &stability); 433 if (err) { 434 dev_err(&client->dev, 435 "'temperature-stability' property missing\n"); 436 return err; 437 } 438 /* adjust register offsets for 7ppm devices */ 439 if (stability == 7) 440 data->div_offset = SI570_DIV_OFFSET_7PPM; 441 442 data->max_freq = SI570_MAX_FREQ; 443 } else { 444 data->max_freq = SI598_MAX_FREQ; 445 } 446 447 if (of_property_read_string(client->dev.of_node, "clock-output-names", 448 &init.name)) 449 init.name = client->dev.of_node->name; 450 451 err = of_property_read_u32(client->dev.of_node, "factory-fout", 452 &factory_fout); 453 if (err) { 454 dev_err(&client->dev, "'factory-fout' property missing\n"); 455 return err; 456 } 457 458 skip_recall = of_property_read_bool(client->dev.of_node, 459 "silabs,skip-recall"); 460 461 data->regmap = devm_regmap_init_i2c(client, &si570_regmap_config); 462 if (IS_ERR(data->regmap)) { 463 dev_err(&client->dev, "failed to allocate register map\n"); 464 return PTR_ERR(data->regmap); 465 } 466 467 i2c_set_clientdata(client, data); 468 err = si570_get_defaults(data, factory_fout, skip_recall); 469 if (err) 470 return err; 471 472 err = devm_clk_hw_register(&client->dev, &data->hw); 473 if (err) { 474 dev_err(&client->dev, "clock registration failed\n"); 475 return err; 476 } 477 err = devm_of_clk_add_hw_provider(&client->dev, of_clk_hw_simple_get, 478 &data->hw); 479 if (err) { 480 dev_err(&client->dev, "unable to add clk provider\n"); 481 return err; 482 } 483 484 /* Read the requested initial output frequency from device tree */ 485 if (!of_property_read_u32(client->dev.of_node, "clock-frequency", 486 &initial_fout)) { 487 err = clk_set_rate(data->hw.clk, initial_fout); 488 if (err) 489 return err; 490 } 491 492 /* Display a message indicating that we've successfully registered */ 493 dev_info(&client->dev, "registered, current frequency %llu Hz\n", 494 data->frequency); 495 496 return 0; 497 } 498 499 static const struct of_device_id clk_si570_of_match[] = { 500 { .compatible = "silabs,si570" }, 501 { .compatible = "silabs,si571" }, 502 { .compatible = "silabs,si598" }, 503 { .compatible = "silabs,si599" }, 504 { }, 505 }; 506 MODULE_DEVICE_TABLE(of, clk_si570_of_match); 507 508 static struct i2c_driver si570_driver = { 509 .driver = { 510 .name = "si570", 511 .of_match_table = clk_si570_of_match, 512 }, 513 .probe = si570_probe, 514 .id_table = si570_id, 515 }; 516 module_i2c_driver(si570_driver); 517 518 MODULE_AUTHOR("Guenter Roeck <guenter.roeck@ericsson.com>"); 519 MODULE_AUTHOR("Soeren Brinkmann <soren.brinkmann@xilinx.com>"); 520 MODULE_DESCRIPTION("Si570 driver"); 521 MODULE_LICENSE("GPL"); 522