xref: /openbmc/linux/drivers/clk/clk-scpi.c (revision 9cfc5c90)
1 /*
2  * System Control and Power Interface (SCPI) Protocol based clock driver
3  *
4  * Copyright (C) 2015 ARM Ltd.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along with
16  * this program. If not, see <http://www.gnu.org/licenses/>.
17  */
18 
19 #include <linux/clk-provider.h>
20 #include <linux/device.h>
21 #include <linux/err.h>
22 #include <linux/of.h>
23 #include <linux/module.h>
24 #include <linux/of_platform.h>
25 #include <linux/platform_device.h>
26 #include <linux/scpi_protocol.h>
27 
28 struct scpi_clk {
29 	u32 id;
30 	struct clk_hw hw;
31 	struct scpi_dvfs_info *info;
32 	struct scpi_ops *scpi_ops;
33 };
34 
35 #define to_scpi_clk(clk) container_of(clk, struct scpi_clk, hw)
36 
37 static struct platform_device *cpufreq_dev;
38 
39 static unsigned long scpi_clk_recalc_rate(struct clk_hw *hw,
40 					  unsigned long parent_rate)
41 {
42 	struct scpi_clk *clk = to_scpi_clk(hw);
43 
44 	return clk->scpi_ops->clk_get_val(clk->id);
45 }
46 
47 static long scpi_clk_round_rate(struct clk_hw *hw, unsigned long rate,
48 				unsigned long *parent_rate)
49 {
50 	/*
51 	 * We can't figure out what rate it will be, so just return the
52 	 * rate back to the caller. scpi_clk_recalc_rate() will be called
53 	 * after the rate is set and we'll know what rate the clock is
54 	 * running at then.
55 	 */
56 	return rate;
57 }
58 
59 static int scpi_clk_set_rate(struct clk_hw *hw, unsigned long rate,
60 			     unsigned long parent_rate)
61 {
62 	struct scpi_clk *clk = to_scpi_clk(hw);
63 
64 	return clk->scpi_ops->clk_set_val(clk->id, rate);
65 }
66 
67 static const struct clk_ops scpi_clk_ops = {
68 	.recalc_rate = scpi_clk_recalc_rate,
69 	.round_rate = scpi_clk_round_rate,
70 	.set_rate = scpi_clk_set_rate,
71 };
72 
73 /* find closest match to given frequency in OPP table */
74 static int __scpi_dvfs_round_rate(struct scpi_clk *clk, unsigned long rate)
75 {
76 	int idx;
77 	u32 fmin = 0, fmax = ~0, ftmp;
78 	const struct scpi_opp *opp = clk->info->opps;
79 
80 	for (idx = 0; idx < clk->info->count; idx++, opp++) {
81 		ftmp = opp->freq;
82 		if (ftmp >= (u32)rate) {
83 			if (ftmp <= fmax)
84 				fmax = ftmp;
85 			break;
86 		} else if (ftmp >= fmin) {
87 			fmin = ftmp;
88 		}
89 	}
90 	return fmax != ~0 ? fmax : fmin;
91 }
92 
93 static unsigned long scpi_dvfs_recalc_rate(struct clk_hw *hw,
94 					   unsigned long parent_rate)
95 {
96 	struct scpi_clk *clk = to_scpi_clk(hw);
97 	int idx = clk->scpi_ops->dvfs_get_idx(clk->id);
98 	const struct scpi_opp *opp;
99 
100 	if (idx < 0)
101 		return 0;
102 
103 	opp = clk->info->opps + idx;
104 	return opp->freq;
105 }
106 
107 static long scpi_dvfs_round_rate(struct clk_hw *hw, unsigned long rate,
108 				 unsigned long *parent_rate)
109 {
110 	struct scpi_clk *clk = to_scpi_clk(hw);
111 
112 	return __scpi_dvfs_round_rate(clk, rate);
113 }
114 
115 static int __scpi_find_dvfs_index(struct scpi_clk *clk, unsigned long rate)
116 {
117 	int idx, max_opp = clk->info->count;
118 	const struct scpi_opp *opp = clk->info->opps;
119 
120 	for (idx = 0; idx < max_opp; idx++, opp++)
121 		if (opp->freq == rate)
122 			return idx;
123 	return -EINVAL;
124 }
125 
126 static int scpi_dvfs_set_rate(struct clk_hw *hw, unsigned long rate,
127 			      unsigned long parent_rate)
128 {
129 	struct scpi_clk *clk = to_scpi_clk(hw);
130 	int ret = __scpi_find_dvfs_index(clk, rate);
131 
132 	if (ret < 0)
133 		return ret;
134 	return clk->scpi_ops->dvfs_set_idx(clk->id, (u8)ret);
135 }
136 
137 static const struct clk_ops scpi_dvfs_ops = {
138 	.recalc_rate = scpi_dvfs_recalc_rate,
139 	.round_rate = scpi_dvfs_round_rate,
140 	.set_rate = scpi_dvfs_set_rate,
141 };
142 
143 static const struct of_device_id scpi_clk_match[] = {
144 	{ .compatible = "arm,scpi-dvfs-clocks", .data = &scpi_dvfs_ops, },
145 	{ .compatible = "arm,scpi-variable-clocks", .data = &scpi_clk_ops, },
146 	{}
147 };
148 
149 static struct clk *
150 scpi_clk_ops_init(struct device *dev, const struct of_device_id *match,
151 		  struct scpi_clk *sclk, const char *name)
152 {
153 	struct clk_init_data init;
154 	struct clk *clk;
155 	unsigned long min = 0, max = 0;
156 
157 	init.name = name;
158 	init.flags = CLK_IS_ROOT;
159 	init.num_parents = 0;
160 	init.ops = match->data;
161 	sclk->hw.init = &init;
162 	sclk->scpi_ops = get_scpi_ops();
163 
164 	if (init.ops == &scpi_dvfs_ops) {
165 		sclk->info = sclk->scpi_ops->dvfs_get_info(sclk->id);
166 		if (IS_ERR(sclk->info))
167 			return NULL;
168 	} else if (init.ops == &scpi_clk_ops) {
169 		if (sclk->scpi_ops->clk_get_range(sclk->id, &min, &max) || !max)
170 			return NULL;
171 	} else {
172 		return NULL;
173 	}
174 
175 	clk = devm_clk_register(dev, &sclk->hw);
176 	if (!IS_ERR(clk) && max)
177 		clk_hw_set_rate_range(&sclk->hw, min, max);
178 	return clk;
179 }
180 
181 struct scpi_clk_data {
182 	struct scpi_clk **clk;
183 	unsigned int clk_num;
184 };
185 
186 static struct clk *
187 scpi_of_clk_src_get(struct of_phandle_args *clkspec, void *data)
188 {
189 	struct scpi_clk *sclk;
190 	struct scpi_clk_data *clk_data = data;
191 	unsigned int idx = clkspec->args[0], count;
192 
193 	for (count = 0; count < clk_data->clk_num; count++) {
194 		sclk = clk_data->clk[count];
195 		if (idx == sclk->id)
196 			return sclk->hw.clk;
197 	}
198 
199 	return ERR_PTR(-EINVAL);
200 }
201 
202 static int scpi_clk_add(struct device *dev, struct device_node *np,
203 			const struct of_device_id *match)
204 {
205 	struct clk **clks;
206 	int idx, count;
207 	struct scpi_clk_data *clk_data;
208 
209 	count = of_property_count_strings(np, "clock-output-names");
210 	if (count < 0) {
211 		dev_err(dev, "%s: invalid clock output count\n", np->name);
212 		return -EINVAL;
213 	}
214 
215 	clk_data = devm_kmalloc(dev, sizeof(*clk_data), GFP_KERNEL);
216 	if (!clk_data)
217 		return -ENOMEM;
218 
219 	clk_data->clk_num = count;
220 	clk_data->clk = devm_kcalloc(dev, count, sizeof(*clk_data->clk),
221 				     GFP_KERNEL);
222 	if (!clk_data->clk)
223 		return -ENOMEM;
224 
225 	clks = devm_kcalloc(dev, count, sizeof(*clks), GFP_KERNEL);
226 	if (!clks)
227 		return -ENOMEM;
228 
229 	for (idx = 0; idx < count; idx++) {
230 		struct scpi_clk *sclk;
231 		const char *name;
232 		u32 val;
233 
234 		sclk = devm_kzalloc(dev, sizeof(*sclk), GFP_KERNEL);
235 		if (!sclk)
236 			return -ENOMEM;
237 
238 		if (of_property_read_string_index(np, "clock-output-names",
239 						  idx, &name)) {
240 			dev_err(dev, "invalid clock name @ %s\n", np->name);
241 			return -EINVAL;
242 		}
243 
244 		if (of_property_read_u32_index(np, "clock-indices",
245 					       idx, &val)) {
246 			dev_err(dev, "invalid clock index @ %s\n", np->name);
247 			return -EINVAL;
248 		}
249 
250 		sclk->id = val;
251 
252 		clks[idx] = scpi_clk_ops_init(dev, match, sclk, name);
253 		if (IS_ERR_OR_NULL(clks[idx]))
254 			dev_err(dev, "failed to register clock '%s'\n", name);
255 		else
256 			dev_dbg(dev, "Registered clock '%s'\n", name);
257 		clk_data->clk[idx] = sclk;
258 	}
259 
260 	return of_clk_add_provider(np, scpi_of_clk_src_get, clk_data);
261 }
262 
263 static int scpi_clocks_remove(struct platform_device *pdev)
264 {
265 	struct device *dev = &pdev->dev;
266 	struct device_node *child, *np = dev->of_node;
267 
268 	if (cpufreq_dev) {
269 		platform_device_unregister(cpufreq_dev);
270 		cpufreq_dev = NULL;
271 	}
272 
273 	for_each_available_child_of_node(np, child)
274 		of_clk_del_provider(np);
275 	return 0;
276 }
277 
278 static int scpi_clocks_probe(struct platform_device *pdev)
279 {
280 	int ret;
281 	struct device *dev = &pdev->dev;
282 	struct device_node *child, *np = dev->of_node;
283 	const struct of_device_id *match;
284 
285 	if (!get_scpi_ops())
286 		return -ENXIO;
287 
288 	for_each_available_child_of_node(np, child) {
289 		match = of_match_node(scpi_clk_match, child);
290 		if (!match)
291 			continue;
292 		ret = scpi_clk_add(dev, child, match);
293 		if (ret) {
294 			scpi_clocks_remove(pdev);
295 			return ret;
296 		}
297 	}
298 	/* Add the virtual cpufreq device */
299 	cpufreq_dev = platform_device_register_simple("scpi-cpufreq",
300 						      -1, NULL, 0);
301 	if (!cpufreq_dev)
302 		pr_warn("unable to register cpufreq device");
303 
304 	return 0;
305 }
306 
307 static const struct of_device_id scpi_clocks_ids[] = {
308 	{ .compatible = "arm,scpi-clocks", },
309 	{}
310 };
311 MODULE_DEVICE_TABLE(of, scpi_clocks_ids);
312 
313 static struct platform_driver scpi_clocks_driver = {
314 	.driver	= {
315 		.name = "scpi_clocks",
316 		.of_match_table = scpi_clocks_ids,
317 	},
318 	.probe = scpi_clocks_probe,
319 	.remove = scpi_clocks_remove,
320 };
321 module_platform_driver(scpi_clocks_driver);
322 
323 MODULE_AUTHOR("Sudeep Holla <sudeep.holla@arm.com>");
324 MODULE_DESCRIPTION("ARM SCPI clock driver");
325 MODULE_LICENSE("GPL v2");
326