xref: /openbmc/linux/drivers/clk/clk-s2mps11.c (revision afb46f79)
1 /*
2  * clk-s2mps11.c - Clock driver for S2MPS11.
3  *
4  * Copyright (C) 2013 Samsung Electornics
5  *
6  * This program is free software; you can redistribute  it and/or modify it
7  * under  the terms of  the GNU General  Public License as published by the
8  * Free Software Foundation;  either version 2 of the  License, or (at your
9  * option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
19  *
20  */
21 
22 #include <linux/module.h>
23 #include <linux/err.h>
24 #include <linux/of.h>
25 #include <linux/clkdev.h>
26 #include <linux/regmap.h>
27 #include <linux/clk-provider.h>
28 #include <linux/platform_device.h>
29 #include <linux/mfd/samsung/s2mps11.h>
30 #include <linux/mfd/samsung/s5m8767.h>
31 #include <linux/mfd/samsung/core.h>
32 
33 #define s2mps11_name(a) (a->hw.init->name)
34 
35 static struct clk **clk_table;
36 static struct clk_onecell_data clk_data;
37 
38 enum {
39 	S2MPS11_CLK_AP = 0,
40 	S2MPS11_CLK_CP,
41 	S2MPS11_CLK_BT,
42 	S2MPS11_CLKS_NUM,
43 };
44 
45 struct s2mps11_clk {
46 	struct sec_pmic_dev *iodev;
47 	struct clk_hw hw;
48 	struct clk *clk;
49 	struct clk_lookup *lookup;
50 	u32 mask;
51 	bool enabled;
52 	unsigned int reg;
53 };
54 
55 static struct s2mps11_clk *to_s2mps11_clk(struct clk_hw *hw)
56 {
57 	return container_of(hw, struct s2mps11_clk, hw);
58 }
59 
60 static int s2mps11_clk_prepare(struct clk_hw *hw)
61 {
62 	struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
63 	int ret;
64 
65 	ret = regmap_update_bits(s2mps11->iodev->regmap_pmic,
66 				 s2mps11->reg,
67 				 s2mps11->mask, s2mps11->mask);
68 	if (!ret)
69 		s2mps11->enabled = true;
70 
71 	return ret;
72 }
73 
74 static void s2mps11_clk_unprepare(struct clk_hw *hw)
75 {
76 	struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
77 	int ret;
78 
79 	ret = regmap_update_bits(s2mps11->iodev->regmap_pmic, s2mps11->reg,
80 			   s2mps11->mask, ~s2mps11->mask);
81 
82 	if (!ret)
83 		s2mps11->enabled = false;
84 }
85 
86 static int s2mps11_clk_is_enabled(struct clk_hw *hw)
87 {
88 	struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
89 
90 	return s2mps11->enabled;
91 }
92 
93 static unsigned long s2mps11_clk_recalc_rate(struct clk_hw *hw,
94 					     unsigned long parent_rate)
95 {
96 	struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
97 	if (s2mps11->enabled)
98 		return 32768;
99 	else
100 		return 0;
101 }
102 
103 static struct clk_ops s2mps11_clk_ops = {
104 	.prepare	= s2mps11_clk_prepare,
105 	.unprepare	= s2mps11_clk_unprepare,
106 	.is_enabled	= s2mps11_clk_is_enabled,
107 	.recalc_rate	= s2mps11_clk_recalc_rate,
108 };
109 
110 static struct clk_init_data s2mps11_clks_init[S2MPS11_CLKS_NUM] = {
111 	[S2MPS11_CLK_AP] = {
112 		.name = "s2mps11_ap",
113 		.ops = &s2mps11_clk_ops,
114 		.flags = CLK_IS_ROOT,
115 	},
116 	[S2MPS11_CLK_CP] = {
117 		.name = "s2mps11_cp",
118 		.ops = &s2mps11_clk_ops,
119 		.flags = CLK_IS_ROOT,
120 	},
121 	[S2MPS11_CLK_BT] = {
122 		.name = "s2mps11_bt",
123 		.ops = &s2mps11_clk_ops,
124 		.flags = CLK_IS_ROOT,
125 	},
126 };
127 
128 static struct device_node *s2mps11_clk_parse_dt(struct platform_device *pdev)
129 {
130 	struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
131 	struct device_node *clk_np;
132 	int i;
133 
134 	if (!iodev->dev->of_node)
135 		return ERR_PTR(-EINVAL);
136 
137 	clk_np = of_get_child_by_name(iodev->dev->of_node, "clocks");
138 	if (!clk_np) {
139 		dev_err(&pdev->dev, "could not find clock sub-node\n");
140 		return ERR_PTR(-EINVAL);
141 	}
142 
143 	clk_table = devm_kzalloc(&pdev->dev, sizeof(struct clk *) *
144 				 S2MPS11_CLKS_NUM, GFP_KERNEL);
145 	if (!clk_table)
146 		return ERR_PTR(-ENOMEM);
147 
148 	for (i = 0; i < S2MPS11_CLKS_NUM; i++)
149 		of_property_read_string_index(clk_np, "clock-output-names", i,
150 				&s2mps11_clks_init[i].name);
151 
152 	return clk_np;
153 }
154 
155 static int s2mps11_clk_probe(struct platform_device *pdev)
156 {
157 	struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
158 	struct s2mps11_clk *s2mps11_clks, *s2mps11_clk;
159 	struct device_node *clk_np = NULL;
160 	unsigned int s2mps11_reg;
161 	int i, ret = 0;
162 	u32 val;
163 
164 	s2mps11_clks = devm_kzalloc(&pdev->dev, sizeof(*s2mps11_clk) *
165 					S2MPS11_CLKS_NUM, GFP_KERNEL);
166 	if (!s2mps11_clks)
167 		return -ENOMEM;
168 
169 	s2mps11_clk = s2mps11_clks;
170 
171 	clk_np = s2mps11_clk_parse_dt(pdev);
172 	if (IS_ERR(clk_np))
173 		return PTR_ERR(clk_np);
174 
175 	switch(platform_get_device_id(pdev)->driver_data) {
176 	case S2MPS11X:
177 		s2mps11_reg = S2MPS11_REG_RTC_CTRL;
178 		break;
179 	case S5M8767X:
180 		s2mps11_reg = S5M8767_REG_CTRL1;
181 		break;
182 	default:
183 		dev_err(&pdev->dev, "Invalid device type\n");
184 		return -EINVAL;
185 	};
186 
187 	for (i = 0; i < S2MPS11_CLKS_NUM; i++, s2mps11_clk++) {
188 		s2mps11_clk->iodev = iodev;
189 		s2mps11_clk->hw.init = &s2mps11_clks_init[i];
190 		s2mps11_clk->mask = 1 << i;
191 		s2mps11_clk->reg = s2mps11_reg;
192 
193 		ret = regmap_read(s2mps11_clk->iodev->regmap_pmic,
194 				  s2mps11_clk->reg, &val);
195 		if (ret < 0)
196 			goto err_reg;
197 
198 		s2mps11_clk->enabled = val & s2mps11_clk->mask;
199 
200 		s2mps11_clk->clk = devm_clk_register(&pdev->dev,
201 							&s2mps11_clk->hw);
202 		if (IS_ERR(s2mps11_clk->clk)) {
203 			dev_err(&pdev->dev, "Fail to register : %s\n",
204 						s2mps11_name(s2mps11_clk));
205 			ret = PTR_ERR(s2mps11_clk->clk);
206 			goto err_reg;
207 		}
208 
209 		s2mps11_clk->lookup = devm_kzalloc(&pdev->dev,
210 					sizeof(struct clk_lookup), GFP_KERNEL);
211 		if (!s2mps11_clk->lookup) {
212 			ret = -ENOMEM;
213 			goto err_lup;
214 		}
215 
216 		s2mps11_clk->lookup->con_id = s2mps11_name(s2mps11_clk);
217 		s2mps11_clk->lookup->clk = s2mps11_clk->clk;
218 
219 		clkdev_add(s2mps11_clk->lookup);
220 	}
221 
222 	if (clk_table) {
223 		for (i = 0; i < S2MPS11_CLKS_NUM; i++)
224 			clk_table[i] = s2mps11_clks[i].clk;
225 
226 		clk_data.clks = clk_table;
227 		clk_data.clk_num = S2MPS11_CLKS_NUM;
228 		of_clk_add_provider(clk_np, of_clk_src_onecell_get, &clk_data);
229 	}
230 
231 	platform_set_drvdata(pdev, s2mps11_clks);
232 
233 	return ret;
234 err_lup:
235 	devm_clk_unregister(&pdev->dev, s2mps11_clk->clk);
236 err_reg:
237 	while (s2mps11_clk > s2mps11_clks) {
238 		if (s2mps11_clk->lookup) {
239 			clkdev_drop(s2mps11_clk->lookup);
240 			devm_clk_unregister(&pdev->dev, s2mps11_clk->clk);
241 		}
242 		s2mps11_clk--;
243 	}
244 
245 	return ret;
246 }
247 
248 static int s2mps11_clk_remove(struct platform_device *pdev)
249 {
250 	struct s2mps11_clk *s2mps11_clks = platform_get_drvdata(pdev);
251 	int i;
252 
253 	for (i = 0; i < S2MPS11_CLKS_NUM; i++)
254 		clkdev_drop(s2mps11_clks[i].lookup);
255 
256 	return 0;
257 }
258 
259 static const struct platform_device_id s2mps11_clk_id[] = {
260 	{ "s2mps11-clk", S2MPS11X},
261 	{ "s5m8767-clk", S5M8767X},
262 	{ },
263 };
264 MODULE_DEVICE_TABLE(platform, s2mps11_clk_id);
265 
266 static struct platform_driver s2mps11_clk_driver = {
267 	.driver = {
268 		.name  = "s2mps11-clk",
269 		.owner = THIS_MODULE,
270 	},
271 	.probe = s2mps11_clk_probe,
272 	.remove = s2mps11_clk_remove,
273 	.id_table = s2mps11_clk_id,
274 };
275 
276 static int __init s2mps11_clk_init(void)
277 {
278 	return platform_driver_register(&s2mps11_clk_driver);
279 }
280 subsys_initcall(s2mps11_clk_init);
281 
282 static void __init s2mps11_clk_cleanup(void)
283 {
284 	platform_driver_unregister(&s2mps11_clk_driver);
285 }
286 module_exit(s2mps11_clk_cleanup);
287 
288 MODULE_DESCRIPTION("S2MPS11 Clock Driver");
289 MODULE_AUTHOR("Yadwinder Singh Brar <yadi.brar@samsung.com>");
290 MODULE_LICENSE("GPL");
291