1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Driver for Renesas 9-series PCIe clock generator driver 4 * 5 * The following series can be supported: 6 * - 9FGV/9DBV/9DMV/9FGL/9DML/9QXL/9SQ 7 * Currently supported: 8 * - 9FGV0241 9 * 10 * Copyright (C) 2022 Marek Vasut <marex@denx.de> 11 */ 12 13 #include <linux/clk-provider.h> 14 #include <linux/i2c.h> 15 #include <linux/mod_devicetable.h> 16 #include <linux/module.h> 17 #include <linux/of.h> 18 #include <linux/regmap.h> 19 20 #define RS9_REG_OE 0x0 21 #define RS9_REG_OE_DIF_OE(n) BIT((n) + 1) 22 #define RS9_REG_SS 0x1 23 #define RS9_REG_SS_AMP_0V6 0x0 24 #define RS9_REG_SS_AMP_0V7 0x1 25 #define RS9_REG_SS_AMP_0V8 0x2 26 #define RS9_REG_SS_AMP_0V9 0x3 27 #define RS9_REG_SS_AMP_MASK 0x3 28 #define RS9_REG_SS_SSC_100 0 29 #define RS9_REG_SS_SSC_M025 (1 << 3) 30 #define RS9_REG_SS_SSC_M050 (3 << 3) 31 #define RS9_REG_SS_SSC_MASK (3 << 3) 32 #define RS9_REG_SS_SSC_LOCK BIT(5) 33 #define RS9_REG_SR 0x2 34 #define RS9_REG_SR_2V0_DIF(n) 0 35 #define RS9_REG_SR_3V0_DIF(n) BIT((n) + 1) 36 #define RS9_REG_SR_DIF_MASK(n) BIT((n) + 1) 37 #define RS9_REG_REF 0x3 38 #define RS9_REG_REF_OE BIT(4) 39 #define RS9_REG_REF_OD BIT(5) 40 #define RS9_REG_REF_SR_SLOWEST 0 41 #define RS9_REG_REF_SR_SLOW (1 << 6) 42 #define RS9_REG_REF_SR_FAST (2 << 6) 43 #define RS9_REG_REF_SR_FASTER (3 << 6) 44 #define RS9_REG_VID 0x5 45 #define RS9_REG_DID 0x6 46 #define RS9_REG_BCP 0x7 47 48 /* Supported Renesas 9-series models. */ 49 enum rs9_model { 50 RENESAS_9FGV0241, 51 }; 52 53 /* Structure to describe features of a particular 9-series model */ 54 struct rs9_chip_info { 55 const enum rs9_model model; 56 unsigned int num_clks; 57 }; 58 59 struct rs9_driver_data { 60 struct i2c_client *client; 61 struct regmap *regmap; 62 const struct rs9_chip_info *chip_info; 63 struct clk_hw *clk_dif[2]; 64 u8 pll_amplitude; 65 u8 pll_ssc; 66 u8 clk_dif_sr; 67 }; 68 69 /* 70 * Renesas 9-series i2c regmap 71 */ 72 static const struct regmap_range rs9_readable_ranges[] = { 73 regmap_reg_range(RS9_REG_OE, RS9_REG_REF), 74 regmap_reg_range(RS9_REG_VID, RS9_REG_BCP), 75 }; 76 77 static const struct regmap_access_table rs9_readable_table = { 78 .yes_ranges = rs9_readable_ranges, 79 .n_yes_ranges = ARRAY_SIZE(rs9_readable_ranges), 80 }; 81 82 static const struct regmap_range rs9_writeable_ranges[] = { 83 regmap_reg_range(RS9_REG_OE, RS9_REG_REF), 84 regmap_reg_range(RS9_REG_BCP, RS9_REG_BCP), 85 }; 86 87 static const struct regmap_access_table rs9_writeable_table = { 88 .yes_ranges = rs9_writeable_ranges, 89 .n_yes_ranges = ARRAY_SIZE(rs9_writeable_ranges), 90 }; 91 92 static int rs9_regmap_i2c_write(void *context, 93 unsigned int reg, unsigned int val) 94 { 95 struct i2c_client *i2c = context; 96 const u8 data[3] = { reg, 1, val }; 97 const int count = ARRAY_SIZE(data); 98 int ret; 99 100 ret = i2c_master_send(i2c, data, count); 101 if (ret == count) 102 return 0; 103 else if (ret < 0) 104 return ret; 105 else 106 return -EIO; 107 } 108 109 static int rs9_regmap_i2c_read(void *context, 110 unsigned int reg, unsigned int *val) 111 { 112 struct i2c_client *i2c = context; 113 struct i2c_msg xfer[2]; 114 u8 txdata = reg; 115 u8 rxdata[2]; 116 int ret; 117 118 xfer[0].addr = i2c->addr; 119 xfer[0].flags = 0; 120 xfer[0].len = 1; 121 xfer[0].buf = (void *)&txdata; 122 123 xfer[1].addr = i2c->addr; 124 xfer[1].flags = I2C_M_RD; 125 xfer[1].len = 2; 126 xfer[1].buf = (void *)rxdata; 127 128 ret = i2c_transfer(i2c->adapter, xfer, 2); 129 if (ret < 0) 130 return ret; 131 if (ret != 2) 132 return -EIO; 133 134 /* 135 * Byte 0 is transfer length, which is always 1 due 136 * to BCP register programming to 1 in rs9_probe(), 137 * ignore it and use data from Byte 1. 138 */ 139 *val = rxdata[1]; 140 return 0; 141 } 142 143 static const struct regmap_config rs9_regmap_config = { 144 .reg_bits = 8, 145 .val_bits = 8, 146 .cache_type = REGCACHE_NONE, 147 .max_register = RS9_REG_BCP, 148 .rd_table = &rs9_readable_table, 149 .wr_table = &rs9_writeable_table, 150 .reg_write = rs9_regmap_i2c_write, 151 .reg_read = rs9_regmap_i2c_read, 152 }; 153 154 static int rs9_get_output_config(struct rs9_driver_data *rs9, int idx) 155 { 156 struct i2c_client *client = rs9->client; 157 unsigned char name[5] = "DIF0"; 158 struct device_node *np; 159 int ret; 160 u32 sr; 161 162 /* Set defaults */ 163 rs9->clk_dif_sr &= ~RS9_REG_SR_DIF_MASK(idx); 164 rs9->clk_dif_sr |= RS9_REG_SR_3V0_DIF(idx); 165 166 snprintf(name, 5, "DIF%d", idx); 167 np = of_get_child_by_name(client->dev.of_node, name); 168 if (!np) 169 return 0; 170 171 /* Output clock slew rate */ 172 ret = of_property_read_u32(np, "renesas,slew-rate", &sr); 173 of_node_put(np); 174 if (!ret) { 175 if (sr == 2000000) { /* 2V/ns */ 176 rs9->clk_dif_sr &= ~RS9_REG_SR_DIF_MASK(idx); 177 rs9->clk_dif_sr |= RS9_REG_SR_2V0_DIF(idx); 178 } else if (sr == 3000000) { /* 3V/ns (default) */ 179 rs9->clk_dif_sr &= ~RS9_REG_SR_DIF_MASK(idx); 180 rs9->clk_dif_sr |= RS9_REG_SR_3V0_DIF(idx); 181 } else 182 ret = dev_err_probe(&client->dev, -EINVAL, 183 "Invalid renesas,slew-rate value\n"); 184 } 185 186 return ret; 187 } 188 189 static int rs9_get_common_config(struct rs9_driver_data *rs9) 190 { 191 struct i2c_client *client = rs9->client; 192 struct device_node *np = client->dev.of_node; 193 unsigned int amp, ssc; 194 int ret; 195 196 /* Set defaults */ 197 rs9->pll_amplitude = RS9_REG_SS_AMP_0V7; 198 rs9->pll_ssc = RS9_REG_SS_SSC_100; 199 200 /* Output clock amplitude */ 201 ret = of_property_read_u32(np, "renesas,out-amplitude-microvolt", 202 &); 203 if (!ret) { 204 if (amp == 600000) /* 0.6V */ 205 rs9->pll_amplitude = RS9_REG_SS_AMP_0V6; 206 else if (amp == 700000) /* 0.7V (default) */ 207 rs9->pll_amplitude = RS9_REG_SS_AMP_0V7; 208 else if (amp == 800000) /* 0.8V */ 209 rs9->pll_amplitude = RS9_REG_SS_AMP_0V8; 210 else if (amp == 900000) /* 0.9V */ 211 rs9->pll_amplitude = RS9_REG_SS_AMP_0V9; 212 else 213 return dev_err_probe(&client->dev, -EINVAL, 214 "Invalid renesas,out-amplitude-microvolt value\n"); 215 } 216 217 /* Output clock spread spectrum */ 218 ret = of_property_read_u32(np, "renesas,out-spread-spectrum", &ssc); 219 if (!ret) { 220 if (ssc == 100000) /* 100% ... no spread (default) */ 221 rs9->pll_ssc = RS9_REG_SS_SSC_100; 222 else if (ssc == 99750) /* -0.25% ... down spread */ 223 rs9->pll_ssc = RS9_REG_SS_SSC_M025; 224 else if (ssc == 99500) /* -0.50% ... down spread */ 225 rs9->pll_ssc = RS9_REG_SS_SSC_M050; 226 else 227 return dev_err_probe(&client->dev, -EINVAL, 228 "Invalid renesas,out-spread-spectrum value\n"); 229 } 230 231 return 0; 232 } 233 234 static void rs9_update_config(struct rs9_driver_data *rs9) 235 { 236 int i; 237 238 /* If amplitude is non-default, update it. */ 239 if (rs9->pll_amplitude != RS9_REG_SS_AMP_0V7) { 240 regmap_update_bits(rs9->regmap, RS9_REG_SS, RS9_REG_SS_AMP_MASK, 241 rs9->pll_amplitude); 242 } 243 244 /* If SSC is non-default, update it. */ 245 if (rs9->pll_ssc != RS9_REG_SS_SSC_100) { 246 regmap_update_bits(rs9->regmap, RS9_REG_SS, RS9_REG_SS_SSC_MASK, 247 rs9->pll_ssc); 248 } 249 250 for (i = 0; i < rs9->chip_info->num_clks; i++) { 251 if (rs9->clk_dif_sr & RS9_REG_SR_3V0_DIF(i)) 252 continue; 253 254 regmap_update_bits(rs9->regmap, RS9_REG_SR, RS9_REG_SR_3V0_DIF(i), 255 rs9->clk_dif_sr & RS9_REG_SR_3V0_DIF(i)); 256 } 257 } 258 259 static struct clk_hw * 260 rs9_of_clk_get(struct of_phandle_args *clkspec, void *data) 261 { 262 struct rs9_driver_data *rs9 = data; 263 unsigned int idx = clkspec->args[0]; 264 265 return rs9->clk_dif[idx]; 266 } 267 268 static int rs9_probe(struct i2c_client *client) 269 { 270 unsigned char name[5] = "DIF0"; 271 struct rs9_driver_data *rs9; 272 struct clk_hw *hw; 273 int i, ret; 274 275 rs9 = devm_kzalloc(&client->dev, sizeof(*rs9), GFP_KERNEL); 276 if (!rs9) 277 return -ENOMEM; 278 279 i2c_set_clientdata(client, rs9); 280 rs9->client = client; 281 rs9->chip_info = device_get_match_data(&client->dev); 282 if (!rs9->chip_info) 283 return -EINVAL; 284 285 /* Fetch common configuration from DT (if specified) */ 286 ret = rs9_get_common_config(rs9); 287 if (ret) 288 return ret; 289 290 /* Fetch DIFx output configuration from DT (if specified) */ 291 for (i = 0; i < rs9->chip_info->num_clks; i++) { 292 ret = rs9_get_output_config(rs9, i); 293 if (ret) 294 return ret; 295 } 296 297 rs9->regmap = devm_regmap_init(&client->dev, NULL, 298 client, &rs9_regmap_config); 299 if (IS_ERR(rs9->regmap)) 300 return dev_err_probe(&client->dev, PTR_ERR(rs9->regmap), 301 "Failed to allocate register map\n"); 302 303 /* Always read back 1 Byte via I2C */ 304 ret = regmap_write(rs9->regmap, RS9_REG_BCP, 1); 305 if (ret < 0) 306 return ret; 307 308 /* Register clock */ 309 for (i = 0; i < rs9->chip_info->num_clks; i++) { 310 snprintf(name, 5, "DIF%d", i); 311 hw = devm_clk_hw_register_fixed_factor_index(&client->dev, name, 312 0, 0, 4, 1); 313 if (IS_ERR(hw)) 314 return PTR_ERR(hw); 315 316 rs9->clk_dif[i] = hw; 317 } 318 319 ret = devm_of_clk_add_hw_provider(&client->dev, rs9_of_clk_get, rs9); 320 if (!ret) 321 rs9_update_config(rs9); 322 323 return ret; 324 } 325 326 static int __maybe_unused rs9_suspend(struct device *dev) 327 { 328 struct rs9_driver_data *rs9 = dev_get_drvdata(dev); 329 330 regcache_cache_only(rs9->regmap, true); 331 regcache_mark_dirty(rs9->regmap); 332 333 return 0; 334 } 335 336 static int __maybe_unused rs9_resume(struct device *dev) 337 { 338 struct rs9_driver_data *rs9 = dev_get_drvdata(dev); 339 int ret; 340 341 regcache_cache_only(rs9->regmap, false); 342 ret = regcache_sync(rs9->regmap); 343 if (ret) 344 dev_err(dev, "Failed to restore register map: %d\n", ret); 345 return ret; 346 } 347 348 static const struct rs9_chip_info renesas_9fgv0241_info = { 349 .model = RENESAS_9FGV0241, 350 .num_clks = 2, 351 }; 352 353 static const struct i2c_device_id rs9_id[] = { 354 { "9fgv0241", .driver_data = RENESAS_9FGV0241 }, 355 { } 356 }; 357 MODULE_DEVICE_TABLE(i2c, rs9_id); 358 359 static const struct of_device_id clk_rs9_of_match[] = { 360 { .compatible = "renesas,9fgv0241", .data = &renesas_9fgv0241_info }, 361 { } 362 }; 363 MODULE_DEVICE_TABLE(of, clk_rs9_of_match); 364 365 static SIMPLE_DEV_PM_OPS(rs9_pm_ops, rs9_suspend, rs9_resume); 366 367 static struct i2c_driver rs9_driver = { 368 .driver = { 369 .name = "clk-renesas-pcie-9series", 370 .pm = &rs9_pm_ops, 371 .of_match_table = clk_rs9_of_match, 372 }, 373 .probe_new = rs9_probe, 374 .id_table = rs9_id, 375 }; 376 module_i2c_driver(rs9_driver); 377 378 MODULE_AUTHOR("Marek Vasut <marex@denx.de>"); 379 MODULE_DESCRIPTION("Renesas 9-series PCIe clock generator driver"); 380 MODULE_LICENSE("GPL"); 381