1 /* 2 * Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de> 3 * Copyright (C) 2011 Richard Zhao, Linaro <richard.zhao@linaro.org> 4 * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 * Simple multiplexer clock implementation 11 */ 12 13 #include <linux/clk-provider.h> 14 #include <linux/module.h> 15 #include <linux/slab.h> 16 #include <linux/io.h> 17 #include <linux/err.h> 18 19 /* 20 * DOC: basic adjustable multiplexer clock that cannot gate 21 * 22 * Traits of this clock: 23 * prepare - clk_prepare only ensures that parents are prepared 24 * enable - clk_enable only ensures that parents are enabled 25 * rate - rate is only affected by parent switching. No clk_set_rate support 26 * parent - parent is adjustable through clk_set_parent 27 */ 28 29 int clk_mux_val_to_index(struct clk_hw *hw, u32 *table, unsigned int flags, 30 unsigned int val) 31 { 32 int num_parents = clk_hw_get_num_parents(hw); 33 34 if (table) { 35 int i; 36 37 for (i = 0; i < num_parents; i++) 38 if (table[i] == val) 39 return i; 40 return -EINVAL; 41 } 42 43 if (val && (flags & CLK_MUX_INDEX_BIT)) 44 val = ffs(val) - 1; 45 46 if (val && (flags & CLK_MUX_INDEX_ONE)) 47 val--; 48 49 if (val >= num_parents) 50 return -EINVAL; 51 52 return val; 53 } 54 EXPORT_SYMBOL_GPL(clk_mux_val_to_index); 55 56 unsigned int clk_mux_index_to_val(u32 *table, unsigned int flags, u8 index) 57 { 58 unsigned int val = index; 59 60 if (table) { 61 val = table[index]; 62 } else { 63 if (flags & CLK_MUX_INDEX_BIT) 64 val = 1 << index; 65 66 if (flags & CLK_MUX_INDEX_ONE) 67 val++; 68 } 69 70 return val; 71 } 72 EXPORT_SYMBOL_GPL(clk_mux_index_to_val); 73 74 static u8 clk_mux_get_parent(struct clk_hw *hw) 75 { 76 struct clk_mux *mux = to_clk_mux(hw); 77 u32 val; 78 79 val = clk_readl(mux->reg) >> mux->shift; 80 val &= mux->mask; 81 82 return clk_mux_val_to_index(hw, mux->table, mux->flags, val); 83 } 84 85 static int clk_mux_set_parent(struct clk_hw *hw, u8 index) 86 { 87 struct clk_mux *mux = to_clk_mux(hw); 88 u32 val = clk_mux_index_to_val(mux->table, mux->flags, index); 89 unsigned long flags = 0; 90 u32 reg; 91 92 if (mux->lock) 93 spin_lock_irqsave(mux->lock, flags); 94 else 95 __acquire(mux->lock); 96 97 if (mux->flags & CLK_MUX_HIWORD_MASK) { 98 reg = mux->mask << (mux->shift + 16); 99 } else { 100 reg = clk_readl(mux->reg); 101 reg &= ~(mux->mask << mux->shift); 102 } 103 val = val << mux->shift; 104 reg |= val; 105 clk_writel(reg, mux->reg); 106 107 if (mux->lock) 108 spin_unlock_irqrestore(mux->lock, flags); 109 else 110 __release(mux->lock); 111 112 return 0; 113 } 114 115 const struct clk_ops clk_mux_ops = { 116 .get_parent = clk_mux_get_parent, 117 .set_parent = clk_mux_set_parent, 118 .determine_rate = __clk_mux_determine_rate, 119 }; 120 EXPORT_SYMBOL_GPL(clk_mux_ops); 121 122 const struct clk_ops clk_mux_ro_ops = { 123 .get_parent = clk_mux_get_parent, 124 }; 125 EXPORT_SYMBOL_GPL(clk_mux_ro_ops); 126 127 struct clk_hw *clk_hw_register_mux_table(struct device *dev, const char *name, 128 const char * const *parent_names, u8 num_parents, 129 unsigned long flags, 130 void __iomem *reg, u8 shift, u32 mask, 131 u8 clk_mux_flags, u32 *table, spinlock_t *lock) 132 { 133 struct clk_mux *mux; 134 struct clk_hw *hw; 135 struct clk_init_data init; 136 u8 width = 0; 137 int ret; 138 139 if (clk_mux_flags & CLK_MUX_HIWORD_MASK) { 140 width = fls(mask) - ffs(mask) + 1; 141 if (width + shift > 16) { 142 pr_err("mux value exceeds LOWORD field\n"); 143 return ERR_PTR(-EINVAL); 144 } 145 } 146 147 /* allocate the mux */ 148 mux = kzalloc(sizeof(*mux), GFP_KERNEL); 149 if (!mux) 150 return ERR_PTR(-ENOMEM); 151 152 init.name = name; 153 if (clk_mux_flags & CLK_MUX_READ_ONLY) 154 init.ops = &clk_mux_ro_ops; 155 else 156 init.ops = &clk_mux_ops; 157 init.flags = flags | CLK_IS_BASIC; 158 init.parent_names = parent_names; 159 init.num_parents = num_parents; 160 161 /* struct clk_mux assignments */ 162 mux->reg = reg; 163 mux->shift = shift; 164 mux->mask = mask; 165 mux->flags = clk_mux_flags; 166 mux->lock = lock; 167 mux->table = table; 168 mux->hw.init = &init; 169 170 hw = &mux->hw; 171 ret = clk_hw_register(dev, hw); 172 if (ret) { 173 kfree(mux); 174 hw = ERR_PTR(ret); 175 } 176 177 return hw; 178 } 179 EXPORT_SYMBOL_GPL(clk_hw_register_mux_table); 180 181 struct clk *clk_register_mux_table(struct device *dev, const char *name, 182 const char * const *parent_names, u8 num_parents, 183 unsigned long flags, 184 void __iomem *reg, u8 shift, u32 mask, 185 u8 clk_mux_flags, u32 *table, spinlock_t *lock) 186 { 187 struct clk_hw *hw; 188 189 hw = clk_hw_register_mux_table(dev, name, parent_names, num_parents, 190 flags, reg, shift, mask, clk_mux_flags, 191 table, lock); 192 if (IS_ERR(hw)) 193 return ERR_CAST(hw); 194 return hw->clk; 195 } 196 EXPORT_SYMBOL_GPL(clk_register_mux_table); 197 198 struct clk *clk_register_mux(struct device *dev, const char *name, 199 const char * const *parent_names, u8 num_parents, 200 unsigned long flags, 201 void __iomem *reg, u8 shift, u8 width, 202 u8 clk_mux_flags, spinlock_t *lock) 203 { 204 u32 mask = BIT(width) - 1; 205 206 return clk_register_mux_table(dev, name, parent_names, num_parents, 207 flags, reg, shift, mask, clk_mux_flags, 208 NULL, lock); 209 } 210 EXPORT_SYMBOL_GPL(clk_register_mux); 211 212 struct clk_hw *clk_hw_register_mux(struct device *dev, const char *name, 213 const char * const *parent_names, u8 num_parents, 214 unsigned long flags, 215 void __iomem *reg, u8 shift, u8 width, 216 u8 clk_mux_flags, spinlock_t *lock) 217 { 218 u32 mask = BIT(width) - 1; 219 220 return clk_hw_register_mux_table(dev, name, parent_names, num_parents, 221 flags, reg, shift, mask, clk_mux_flags, 222 NULL, lock); 223 } 224 EXPORT_SYMBOL_GPL(clk_hw_register_mux); 225 226 void clk_unregister_mux(struct clk *clk) 227 { 228 struct clk_mux *mux; 229 struct clk_hw *hw; 230 231 hw = __clk_get_hw(clk); 232 if (!hw) 233 return; 234 235 mux = to_clk_mux(hw); 236 237 clk_unregister(clk); 238 kfree(mux); 239 } 240 EXPORT_SYMBOL_GPL(clk_unregister_mux); 241 242 void clk_hw_unregister_mux(struct clk_hw *hw) 243 { 244 struct clk_mux *mux; 245 246 mux = to_clk_mux(hw); 247 248 clk_hw_unregister(hw); 249 kfree(mux); 250 } 251 EXPORT_SYMBOL_GPL(clk_hw_unregister_mux); 252