19d9f78edSMike Turquette /* 29d9f78edSMike Turquette * Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de> 39d9f78edSMike Turquette * Copyright (C) 2011 Richard Zhao, Linaro <richard.zhao@linaro.org> 49d9f78edSMike Turquette * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org> 59d9f78edSMike Turquette * 69d9f78edSMike Turquette * This program is free software; you can redistribute it and/or modify 79d9f78edSMike Turquette * it under the terms of the GNU General Public License version 2 as 89d9f78edSMike Turquette * published by the Free Software Foundation. 99d9f78edSMike Turquette * 109d9f78edSMike Turquette * Simple multiplexer clock implementation 119d9f78edSMike Turquette */ 129d9f78edSMike Turquette 139d9f78edSMike Turquette #include <linux/clk.h> 149d9f78edSMike Turquette #include <linux/clk-provider.h> 159d9f78edSMike Turquette #include <linux/module.h> 169d9f78edSMike Turquette #include <linux/slab.h> 179d9f78edSMike Turquette #include <linux/io.h> 189d9f78edSMike Turquette #include <linux/err.h> 199d9f78edSMike Turquette 209d9f78edSMike Turquette /* 219d9f78edSMike Turquette * DOC: basic adjustable multiplexer clock that cannot gate 229d9f78edSMike Turquette * 239d9f78edSMike Turquette * Traits of this clock: 249d9f78edSMike Turquette * prepare - clk_prepare only ensures that parents are prepared 259d9f78edSMike Turquette * enable - clk_enable only ensures that parents are enabled 269d9f78edSMike Turquette * rate - rate is only affected by parent switching. No clk_set_rate support 279d9f78edSMike Turquette * parent - parent is adjustable through clk_set_parent 289d9f78edSMike Turquette */ 299d9f78edSMike Turquette 309d9f78edSMike Turquette #define to_clk_mux(_hw) container_of(_hw, struct clk_mux, hw) 319d9f78edSMike Turquette 329d9f78edSMike Turquette static u8 clk_mux_get_parent(struct clk_hw *hw) 339d9f78edSMike Turquette { 349d9f78edSMike Turquette struct clk_mux *mux = to_clk_mux(hw); 359d9f78edSMike Turquette u32 val; 369d9f78edSMike Turquette 379d9f78edSMike Turquette /* 389d9f78edSMike Turquette * FIXME need a mux-specific flag to determine if val is bitwise or numeric 399d9f78edSMike Turquette * e.g. sys_clkin_ck's clksel field is 3 bits wide, but ranges from 0x1 409d9f78edSMike Turquette * to 0x7 (index starts at one) 419d9f78edSMike Turquette * OTOH, pmd_trace_clk_mux_ck uses a separate bit for each clock, so 429d9f78edSMike Turquette * val = 0x4 really means "bit 2, index starts at bit 0" 439d9f78edSMike Turquette */ 449d9f78edSMike Turquette val = readl(mux->reg) >> mux->shift; 459d9f78edSMike Turquette val &= (1 << mux->width) - 1; 469d9f78edSMike Turquette 479d9f78edSMike Turquette if (val && (mux->flags & CLK_MUX_INDEX_BIT)) 489d9f78edSMike Turquette val = ffs(val) - 1; 499d9f78edSMike Turquette 509d9f78edSMike Turquette if (val && (mux->flags & CLK_MUX_INDEX_ONE)) 519d9f78edSMike Turquette val--; 529d9f78edSMike Turquette 539d9f78edSMike Turquette if (val >= __clk_get_num_parents(hw->clk)) 549d9f78edSMike Turquette return -EINVAL; 559d9f78edSMike Turquette 569d9f78edSMike Turquette return val; 579d9f78edSMike Turquette } 589d9f78edSMike Turquette 599d9f78edSMike Turquette static int clk_mux_set_parent(struct clk_hw *hw, u8 index) 609d9f78edSMike Turquette { 619d9f78edSMike Turquette struct clk_mux *mux = to_clk_mux(hw); 629d9f78edSMike Turquette u32 val; 639d9f78edSMike Turquette unsigned long flags = 0; 649d9f78edSMike Turquette 659d9f78edSMike Turquette if (mux->flags & CLK_MUX_INDEX_BIT) 669d9f78edSMike Turquette index = (1 << ffs(index)); 679d9f78edSMike Turquette 689d9f78edSMike Turquette if (mux->flags & CLK_MUX_INDEX_ONE) 699d9f78edSMike Turquette index++; 709d9f78edSMike Turquette 719d9f78edSMike Turquette if (mux->lock) 729d9f78edSMike Turquette spin_lock_irqsave(mux->lock, flags); 739d9f78edSMike Turquette 749d9f78edSMike Turquette val = readl(mux->reg); 759d9f78edSMike Turquette val &= ~(((1 << mux->width) - 1) << mux->shift); 769d9f78edSMike Turquette val |= index << mux->shift; 779d9f78edSMike Turquette writel(val, mux->reg); 789d9f78edSMike Turquette 799d9f78edSMike Turquette if (mux->lock) 809d9f78edSMike Turquette spin_unlock_irqrestore(mux->lock, flags); 819d9f78edSMike Turquette 829d9f78edSMike Turquette return 0; 839d9f78edSMike Turquette } 849d9f78edSMike Turquette 85822c250eSShawn Guo const struct clk_ops clk_mux_ops = { 869d9f78edSMike Turquette .get_parent = clk_mux_get_parent, 879d9f78edSMike Turquette .set_parent = clk_mux_set_parent, 889d9f78edSMike Turquette }; 899d9f78edSMike Turquette EXPORT_SYMBOL_GPL(clk_mux_ops); 909d9f78edSMike Turquette 919d9f78edSMike Turquette struct clk *clk_register_mux(struct device *dev, const char *name, 92d305fb78SMark Brown const char **parent_names, u8 num_parents, unsigned long flags, 939d9f78edSMike Turquette void __iomem *reg, u8 shift, u8 width, 949d9f78edSMike Turquette u8 clk_mux_flags, spinlock_t *lock) 959d9f78edSMike Turquette { 969d9f78edSMike Turquette struct clk_mux *mux; 979d9f78edSMike Turquette 9810363b58SShawn Guo mux = kzalloc(sizeof(struct clk_mux), GFP_KERNEL); 999d9f78edSMike Turquette 1009d9f78edSMike Turquette if (!mux) { 1019d9f78edSMike Turquette pr_err("%s: could not allocate mux clk\n", __func__); 1029d9f78edSMike Turquette return ERR_PTR(-ENOMEM); 1039d9f78edSMike Turquette } 1049d9f78edSMike Turquette 1059d9f78edSMike Turquette /* struct clk_mux assignments */ 1069d9f78edSMike Turquette mux->reg = reg; 1079d9f78edSMike Turquette mux->shift = shift; 1089d9f78edSMike Turquette mux->width = width; 1099d9f78edSMike Turquette mux->flags = clk_mux_flags; 1109d9f78edSMike Turquette mux->lock = lock; 1119d9f78edSMike Turquette 1129d9f78edSMike Turquette return clk_register(dev, name, &clk_mux_ops, &mux->hw, 1139d9f78edSMike Turquette parent_names, num_parents, flags); 1149d9f78edSMike Turquette } 115