xref: /openbmc/linux/drivers/clk/clk-divider.c (revision 9cfc5c90)
1 /*
2  * Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
3  * Copyright (C) 2011 Richard Zhao, Linaro <richard.zhao@linaro.org>
4  * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * Adjustable divider clock implementation
11  */
12 
13 #include <linux/clk-provider.h>
14 #include <linux/module.h>
15 #include <linux/slab.h>
16 #include <linux/io.h>
17 #include <linux/err.h>
18 #include <linux/string.h>
19 #include <linux/log2.h>
20 
21 /*
22  * DOC: basic adjustable divider clock that cannot gate
23  *
24  * Traits of this clock:
25  * prepare - clk_prepare only ensures that parents are prepared
26  * enable - clk_enable only ensures that parents are enabled
27  * rate - rate is adjustable.  clk->rate = ceiling(parent->rate / divisor)
28  * parent - fixed parent.  No clk_set_parent support
29  */
30 
31 #define to_clk_divider(_hw) container_of(_hw, struct clk_divider, hw)
32 
33 #define div_mask(width)	((1 << (width)) - 1)
34 
35 static unsigned int _get_table_maxdiv(const struct clk_div_table *table)
36 {
37 	unsigned int maxdiv = 0;
38 	const struct clk_div_table *clkt;
39 
40 	for (clkt = table; clkt->div; clkt++)
41 		if (clkt->div > maxdiv)
42 			maxdiv = clkt->div;
43 	return maxdiv;
44 }
45 
46 static unsigned int _get_table_mindiv(const struct clk_div_table *table)
47 {
48 	unsigned int mindiv = UINT_MAX;
49 	const struct clk_div_table *clkt;
50 
51 	for (clkt = table; clkt->div; clkt++)
52 		if (clkt->div < mindiv)
53 			mindiv = clkt->div;
54 	return mindiv;
55 }
56 
57 static unsigned int _get_maxdiv(const struct clk_div_table *table, u8 width,
58 				unsigned long flags)
59 {
60 	if (flags & CLK_DIVIDER_ONE_BASED)
61 		return div_mask(width);
62 	if (flags & CLK_DIVIDER_POWER_OF_TWO)
63 		return 1 << div_mask(width);
64 	if (table)
65 		return _get_table_maxdiv(table);
66 	return div_mask(width) + 1;
67 }
68 
69 static unsigned int _get_table_div(const struct clk_div_table *table,
70 							unsigned int val)
71 {
72 	const struct clk_div_table *clkt;
73 
74 	for (clkt = table; clkt->div; clkt++)
75 		if (clkt->val == val)
76 			return clkt->div;
77 	return 0;
78 }
79 
80 static unsigned int _get_div(const struct clk_div_table *table,
81 			     unsigned int val, unsigned long flags, u8 width)
82 {
83 	if (flags & CLK_DIVIDER_ONE_BASED)
84 		return val;
85 	if (flags & CLK_DIVIDER_POWER_OF_TWO)
86 		return 1 << val;
87 	if (flags & CLK_DIVIDER_MAX_AT_ZERO)
88 		return val ? val : div_mask(width) + 1;
89 	if (table)
90 		return _get_table_div(table, val);
91 	return val + 1;
92 }
93 
94 static unsigned int _get_table_val(const struct clk_div_table *table,
95 							unsigned int div)
96 {
97 	const struct clk_div_table *clkt;
98 
99 	for (clkt = table; clkt->div; clkt++)
100 		if (clkt->div == div)
101 			return clkt->val;
102 	return 0;
103 }
104 
105 static unsigned int _get_val(const struct clk_div_table *table,
106 			     unsigned int div, unsigned long flags, u8 width)
107 {
108 	if (flags & CLK_DIVIDER_ONE_BASED)
109 		return div;
110 	if (flags & CLK_DIVIDER_POWER_OF_TWO)
111 		return __ffs(div);
112 	if (flags & CLK_DIVIDER_MAX_AT_ZERO)
113 		return (div == div_mask(width) + 1) ? 0 : div;
114 	if (table)
115 		return  _get_table_val(table, div);
116 	return div - 1;
117 }
118 
119 unsigned long divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate,
120 				  unsigned int val,
121 				  const struct clk_div_table *table,
122 				  unsigned long flags)
123 {
124 	struct clk_divider *divider = to_clk_divider(hw);
125 	unsigned int div;
126 
127 	div = _get_div(table, val, flags, divider->width);
128 	if (!div) {
129 		WARN(!(flags & CLK_DIVIDER_ALLOW_ZERO),
130 			"%s: Zero divisor and CLK_DIVIDER_ALLOW_ZERO not set\n",
131 			clk_hw_get_name(hw));
132 		return parent_rate;
133 	}
134 
135 	return DIV_ROUND_UP_ULL((u64)parent_rate, div);
136 }
137 EXPORT_SYMBOL_GPL(divider_recalc_rate);
138 
139 static unsigned long clk_divider_recalc_rate(struct clk_hw *hw,
140 		unsigned long parent_rate)
141 {
142 	struct clk_divider *divider = to_clk_divider(hw);
143 	unsigned int val;
144 
145 	val = clk_readl(divider->reg) >> divider->shift;
146 	val &= div_mask(divider->width);
147 
148 	return divider_recalc_rate(hw, parent_rate, val, divider->table,
149 				   divider->flags);
150 }
151 
152 static bool _is_valid_table_div(const struct clk_div_table *table,
153 							 unsigned int div)
154 {
155 	const struct clk_div_table *clkt;
156 
157 	for (clkt = table; clkt->div; clkt++)
158 		if (clkt->div == div)
159 			return true;
160 	return false;
161 }
162 
163 static bool _is_valid_div(const struct clk_div_table *table, unsigned int div,
164 			  unsigned long flags)
165 {
166 	if (flags & CLK_DIVIDER_POWER_OF_TWO)
167 		return is_power_of_2(div);
168 	if (table)
169 		return _is_valid_table_div(table, div);
170 	return true;
171 }
172 
173 static int _round_up_table(const struct clk_div_table *table, int div)
174 {
175 	const struct clk_div_table *clkt;
176 	int up = INT_MAX;
177 
178 	for (clkt = table; clkt->div; clkt++) {
179 		if (clkt->div == div)
180 			return clkt->div;
181 		else if (clkt->div < div)
182 			continue;
183 
184 		if ((clkt->div - div) < (up - div))
185 			up = clkt->div;
186 	}
187 
188 	return up;
189 }
190 
191 static int _round_down_table(const struct clk_div_table *table, int div)
192 {
193 	const struct clk_div_table *clkt;
194 	int down = _get_table_mindiv(table);
195 
196 	for (clkt = table; clkt->div; clkt++) {
197 		if (clkt->div == div)
198 			return clkt->div;
199 		else if (clkt->div > div)
200 			continue;
201 
202 		if ((div - clkt->div) < (div - down))
203 			down = clkt->div;
204 	}
205 
206 	return down;
207 }
208 
209 static int _div_round_up(const struct clk_div_table *table,
210 			 unsigned long parent_rate, unsigned long rate,
211 			 unsigned long flags)
212 {
213 	int div = DIV_ROUND_UP_ULL((u64)parent_rate, rate);
214 
215 	if (flags & CLK_DIVIDER_POWER_OF_TWO)
216 		div = __roundup_pow_of_two(div);
217 	if (table)
218 		div = _round_up_table(table, div);
219 
220 	return div;
221 }
222 
223 static int _div_round_closest(const struct clk_div_table *table,
224 			      unsigned long parent_rate, unsigned long rate,
225 			      unsigned long flags)
226 {
227 	int up, down;
228 	unsigned long up_rate, down_rate;
229 
230 	up = DIV_ROUND_UP_ULL((u64)parent_rate, rate);
231 	down = parent_rate / rate;
232 
233 	if (flags & CLK_DIVIDER_POWER_OF_TWO) {
234 		up = __roundup_pow_of_two(up);
235 		down = __rounddown_pow_of_two(down);
236 	} else if (table) {
237 		up = _round_up_table(table, up);
238 		down = _round_down_table(table, down);
239 	}
240 
241 	up_rate = DIV_ROUND_UP_ULL((u64)parent_rate, up);
242 	down_rate = DIV_ROUND_UP_ULL((u64)parent_rate, down);
243 
244 	return (rate - up_rate) <= (down_rate - rate) ? up : down;
245 }
246 
247 static int _div_round(const struct clk_div_table *table,
248 		      unsigned long parent_rate, unsigned long rate,
249 		      unsigned long flags)
250 {
251 	if (flags & CLK_DIVIDER_ROUND_CLOSEST)
252 		return _div_round_closest(table, parent_rate, rate, flags);
253 
254 	return _div_round_up(table, parent_rate, rate, flags);
255 }
256 
257 static bool _is_best_div(unsigned long rate, unsigned long now,
258 			 unsigned long best, unsigned long flags)
259 {
260 	if (flags & CLK_DIVIDER_ROUND_CLOSEST)
261 		return abs(rate - now) < abs(rate - best);
262 
263 	return now <= rate && now > best;
264 }
265 
266 static int _next_div(const struct clk_div_table *table, int div,
267 		     unsigned long flags)
268 {
269 	div++;
270 
271 	if (flags & CLK_DIVIDER_POWER_OF_TWO)
272 		return __roundup_pow_of_two(div);
273 	if (table)
274 		return _round_up_table(table, div);
275 
276 	return div;
277 }
278 
279 static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
280 			       unsigned long *best_parent_rate,
281 			       const struct clk_div_table *table, u8 width,
282 			       unsigned long flags)
283 {
284 	int i, bestdiv = 0;
285 	unsigned long parent_rate, best = 0, now, maxdiv;
286 	unsigned long parent_rate_saved = *best_parent_rate;
287 
288 	if (!rate)
289 		rate = 1;
290 
291 	maxdiv = _get_maxdiv(table, width, flags);
292 
293 	if (!(clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT)) {
294 		parent_rate = *best_parent_rate;
295 		bestdiv = _div_round(table, parent_rate, rate, flags);
296 		bestdiv = bestdiv == 0 ? 1 : bestdiv;
297 		bestdiv = bestdiv > maxdiv ? maxdiv : bestdiv;
298 		return bestdiv;
299 	}
300 
301 	/*
302 	 * The maximum divider we can use without overflowing
303 	 * unsigned long in rate * i below
304 	 */
305 	maxdiv = min(ULONG_MAX / rate, maxdiv);
306 
307 	for (i = 1; i <= maxdiv; i = _next_div(table, i, flags)) {
308 		if (!_is_valid_div(table, i, flags))
309 			continue;
310 		if (rate * i == parent_rate_saved) {
311 			/*
312 			 * It's the most ideal case if the requested rate can be
313 			 * divided from parent clock without needing to change
314 			 * parent rate, so return the divider immediately.
315 			 */
316 			*best_parent_rate = parent_rate_saved;
317 			return i;
318 		}
319 		parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw),
320 					       rate * i);
321 		now = DIV_ROUND_UP_ULL((u64)parent_rate, i);
322 		if (_is_best_div(rate, now, best, flags)) {
323 			bestdiv = i;
324 			best = now;
325 			*best_parent_rate = parent_rate;
326 		}
327 	}
328 
329 	if (!bestdiv) {
330 		bestdiv = _get_maxdiv(table, width, flags);
331 		*best_parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), 1);
332 	}
333 
334 	return bestdiv;
335 }
336 
337 long divider_round_rate(struct clk_hw *hw, unsigned long rate,
338 			unsigned long *prate, const struct clk_div_table *table,
339 			u8 width, unsigned long flags)
340 {
341 	int div;
342 
343 	div = clk_divider_bestdiv(hw, rate, prate, table, width, flags);
344 
345 	return DIV_ROUND_UP_ULL((u64)*prate, div);
346 }
347 EXPORT_SYMBOL_GPL(divider_round_rate);
348 
349 static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,
350 				unsigned long *prate)
351 {
352 	struct clk_divider *divider = to_clk_divider(hw);
353 	int bestdiv;
354 
355 	/* if read only, just return current value */
356 	if (divider->flags & CLK_DIVIDER_READ_ONLY) {
357 		bestdiv = readl(divider->reg) >> divider->shift;
358 		bestdiv &= div_mask(divider->width);
359 		bestdiv = _get_div(divider->table, bestdiv, divider->flags,
360 			divider->width);
361 		return DIV_ROUND_UP_ULL((u64)*prate, bestdiv);
362 	}
363 
364 	return divider_round_rate(hw, rate, prate, divider->table,
365 				  divider->width, divider->flags);
366 }
367 
368 int divider_get_val(unsigned long rate, unsigned long parent_rate,
369 		    const struct clk_div_table *table, u8 width,
370 		    unsigned long flags)
371 {
372 	unsigned int div, value;
373 
374 	div = DIV_ROUND_UP_ULL((u64)parent_rate, rate);
375 
376 	if (!_is_valid_div(table, div, flags))
377 		return -EINVAL;
378 
379 	value = _get_val(table, div, flags, width);
380 
381 	return min_t(unsigned int, value, div_mask(width));
382 }
383 EXPORT_SYMBOL_GPL(divider_get_val);
384 
385 static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
386 				unsigned long parent_rate)
387 {
388 	struct clk_divider *divider = to_clk_divider(hw);
389 	unsigned int value;
390 	unsigned long flags = 0;
391 	u32 val;
392 
393 	value = divider_get_val(rate, parent_rate, divider->table,
394 				divider->width, divider->flags);
395 
396 	if (divider->lock)
397 		spin_lock_irqsave(divider->lock, flags);
398 	else
399 		__acquire(divider->lock);
400 
401 	if (divider->flags & CLK_DIVIDER_HIWORD_MASK) {
402 		val = div_mask(divider->width) << (divider->shift + 16);
403 	} else {
404 		val = clk_readl(divider->reg);
405 		val &= ~(div_mask(divider->width) << divider->shift);
406 	}
407 	val |= value << divider->shift;
408 	clk_writel(val, divider->reg);
409 
410 	if (divider->lock)
411 		spin_unlock_irqrestore(divider->lock, flags);
412 	else
413 		__release(divider->lock);
414 
415 	return 0;
416 }
417 
418 const struct clk_ops clk_divider_ops = {
419 	.recalc_rate = clk_divider_recalc_rate,
420 	.round_rate = clk_divider_round_rate,
421 	.set_rate = clk_divider_set_rate,
422 };
423 EXPORT_SYMBOL_GPL(clk_divider_ops);
424 
425 static struct clk *_register_divider(struct device *dev, const char *name,
426 		const char *parent_name, unsigned long flags,
427 		void __iomem *reg, u8 shift, u8 width,
428 		u8 clk_divider_flags, const struct clk_div_table *table,
429 		spinlock_t *lock)
430 {
431 	struct clk_divider *div;
432 	struct clk *clk;
433 	struct clk_init_data init;
434 
435 	if (clk_divider_flags & CLK_DIVIDER_HIWORD_MASK) {
436 		if (width + shift > 16) {
437 			pr_warn("divider value exceeds LOWORD field\n");
438 			return ERR_PTR(-EINVAL);
439 		}
440 	}
441 
442 	/* allocate the divider */
443 	div = kzalloc(sizeof(*div), GFP_KERNEL);
444 	if (!div)
445 		return ERR_PTR(-ENOMEM);
446 
447 	init.name = name;
448 	init.ops = &clk_divider_ops;
449 	init.flags = flags | CLK_IS_BASIC;
450 	init.parent_names = (parent_name ? &parent_name: NULL);
451 	init.num_parents = (parent_name ? 1 : 0);
452 
453 	/* struct clk_divider assignments */
454 	div->reg = reg;
455 	div->shift = shift;
456 	div->width = width;
457 	div->flags = clk_divider_flags;
458 	div->lock = lock;
459 	div->hw.init = &init;
460 	div->table = table;
461 
462 	/* register the clock */
463 	clk = clk_register(dev, &div->hw);
464 
465 	if (IS_ERR(clk))
466 		kfree(div);
467 
468 	return clk;
469 }
470 
471 /**
472  * clk_register_divider - register a divider clock with the clock framework
473  * @dev: device registering this clock
474  * @name: name of this clock
475  * @parent_name: name of clock's parent
476  * @flags: framework-specific flags
477  * @reg: register address to adjust divider
478  * @shift: number of bits to shift the bitfield
479  * @width: width of the bitfield
480  * @clk_divider_flags: divider-specific flags for this clock
481  * @lock: shared register lock for this clock
482  */
483 struct clk *clk_register_divider(struct device *dev, const char *name,
484 		const char *parent_name, unsigned long flags,
485 		void __iomem *reg, u8 shift, u8 width,
486 		u8 clk_divider_flags, spinlock_t *lock)
487 {
488 	return _register_divider(dev, name, parent_name, flags, reg, shift,
489 			width, clk_divider_flags, NULL, lock);
490 }
491 EXPORT_SYMBOL_GPL(clk_register_divider);
492 
493 /**
494  * clk_register_divider_table - register a table based divider clock with
495  * the clock framework
496  * @dev: device registering this clock
497  * @name: name of this clock
498  * @parent_name: name of clock's parent
499  * @flags: framework-specific flags
500  * @reg: register address to adjust divider
501  * @shift: number of bits to shift the bitfield
502  * @width: width of the bitfield
503  * @clk_divider_flags: divider-specific flags for this clock
504  * @table: array of divider/value pairs ending with a div set to 0
505  * @lock: shared register lock for this clock
506  */
507 struct clk *clk_register_divider_table(struct device *dev, const char *name,
508 		const char *parent_name, unsigned long flags,
509 		void __iomem *reg, u8 shift, u8 width,
510 		u8 clk_divider_flags, const struct clk_div_table *table,
511 		spinlock_t *lock)
512 {
513 	return _register_divider(dev, name, parent_name, flags, reg, shift,
514 			width, clk_divider_flags, table, lock);
515 }
516 EXPORT_SYMBOL_GPL(clk_register_divider_table);
517 
518 void clk_unregister_divider(struct clk *clk)
519 {
520 	struct clk_divider *div;
521 	struct clk_hw *hw;
522 
523 	hw = __clk_get_hw(clk);
524 	if (!hw)
525 		return;
526 
527 	div = to_clk_divider(hw);
528 
529 	clk_unregister(clk);
530 	kfree(div);
531 }
532 EXPORT_SYMBOL_GPL(clk_unregister_divider);
533