xref: /openbmc/linux/drivers/clk/clk-divider.c (revision 3d9b448b)
1 /*
2  * Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
3  * Copyright (C) 2011 Richard Zhao, Linaro <richard.zhao@linaro.org>
4  * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * Adjustable divider clock implementation
11  */
12 
13 #include <linux/clk-provider.h>
14 #include <linux/module.h>
15 #include <linux/slab.h>
16 #include <linux/io.h>
17 #include <linux/err.h>
18 #include <linux/string.h>
19 #include <linux/log2.h>
20 
21 /*
22  * DOC: basic adjustable divider clock that cannot gate
23  *
24  * Traits of this clock:
25  * prepare - clk_prepare only ensures that parents are prepared
26  * enable - clk_enable only ensures that parents are enabled
27  * rate - rate is adjustable.  clk->rate = DIV_ROUND_UP(parent->rate / divisor)
28  * parent - fixed parent.  No clk_set_parent support
29  */
30 
31 #define to_clk_divider(_hw) container_of(_hw, struct clk_divider, hw)
32 
33 #define div_mask(width)	((1 << (width)) - 1)
34 
35 static unsigned int _get_table_maxdiv(const struct clk_div_table *table)
36 {
37 	unsigned int maxdiv = 0;
38 	const struct clk_div_table *clkt;
39 
40 	for (clkt = table; clkt->div; clkt++)
41 		if (clkt->div > maxdiv)
42 			maxdiv = clkt->div;
43 	return maxdiv;
44 }
45 
46 static unsigned int _get_table_mindiv(const struct clk_div_table *table)
47 {
48 	unsigned int mindiv = UINT_MAX;
49 	const struct clk_div_table *clkt;
50 
51 	for (clkt = table; clkt->div; clkt++)
52 		if (clkt->div < mindiv)
53 			mindiv = clkt->div;
54 	return mindiv;
55 }
56 
57 static unsigned int _get_maxdiv(const struct clk_div_table *table, u8 width,
58 				unsigned long flags)
59 {
60 	if (flags & CLK_DIVIDER_ONE_BASED)
61 		return div_mask(width);
62 	if (flags & CLK_DIVIDER_POWER_OF_TWO)
63 		return 1 << div_mask(width);
64 	if (table)
65 		return _get_table_maxdiv(table);
66 	return div_mask(width) + 1;
67 }
68 
69 static unsigned int _get_table_div(const struct clk_div_table *table,
70 							unsigned int val)
71 {
72 	const struct clk_div_table *clkt;
73 
74 	for (clkt = table; clkt->div; clkt++)
75 		if (clkt->val == val)
76 			return clkt->div;
77 	return 0;
78 }
79 
80 static unsigned int _get_div(const struct clk_div_table *table,
81 			     unsigned int val, unsigned long flags)
82 {
83 	if (flags & CLK_DIVIDER_ONE_BASED)
84 		return val;
85 	if (flags & CLK_DIVIDER_POWER_OF_TWO)
86 		return 1 << val;
87 	if (table)
88 		return _get_table_div(table, val);
89 	return val + 1;
90 }
91 
92 static unsigned int _get_table_val(const struct clk_div_table *table,
93 							unsigned int div)
94 {
95 	const struct clk_div_table *clkt;
96 
97 	for (clkt = table; clkt->div; clkt++)
98 		if (clkt->div == div)
99 			return clkt->val;
100 	return 0;
101 }
102 
103 static unsigned int _get_val(const struct clk_div_table *table,
104 			     unsigned int div, unsigned long flags)
105 {
106 	if (flags & CLK_DIVIDER_ONE_BASED)
107 		return div;
108 	if (flags & CLK_DIVIDER_POWER_OF_TWO)
109 		return __ffs(div);
110 	if (table)
111 		return  _get_table_val(table, div);
112 	return div - 1;
113 }
114 
115 unsigned long divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate,
116 				  unsigned int val,
117 				  const struct clk_div_table *table,
118 				  unsigned long flags)
119 {
120 	unsigned int div;
121 
122 	div = _get_div(table, val, flags);
123 	if (!div) {
124 		WARN(!(flags & CLK_DIVIDER_ALLOW_ZERO),
125 			"%s: Zero divisor and CLK_DIVIDER_ALLOW_ZERO not set\n",
126 			__clk_get_name(hw->clk));
127 		return parent_rate;
128 	}
129 
130 	return DIV_ROUND_UP(parent_rate, div);
131 }
132 EXPORT_SYMBOL_GPL(divider_recalc_rate);
133 
134 static unsigned long clk_divider_recalc_rate(struct clk_hw *hw,
135 		unsigned long parent_rate)
136 {
137 	struct clk_divider *divider = to_clk_divider(hw);
138 	unsigned int val;
139 
140 	val = clk_readl(divider->reg) >> divider->shift;
141 	val &= div_mask(divider->width);
142 
143 	return divider_recalc_rate(hw, parent_rate, val, divider->table,
144 				   divider->flags);
145 }
146 
147 /*
148  * The reverse of DIV_ROUND_UP: The maximum number which
149  * divided by m is r
150  */
151 #define MULT_ROUND_UP(r, m) ((r) * (m) + (m) - 1)
152 
153 static bool _is_valid_table_div(const struct clk_div_table *table,
154 							 unsigned int div)
155 {
156 	const struct clk_div_table *clkt;
157 
158 	for (clkt = table; clkt->div; clkt++)
159 		if (clkt->div == div)
160 			return true;
161 	return false;
162 }
163 
164 static bool _is_valid_div(const struct clk_div_table *table, unsigned int div,
165 			  unsigned long flags)
166 {
167 	if (flags & CLK_DIVIDER_POWER_OF_TWO)
168 		return is_power_of_2(div);
169 	if (table)
170 		return _is_valid_table_div(table, div);
171 	return true;
172 }
173 
174 static int _round_up_table(const struct clk_div_table *table, int div)
175 {
176 	const struct clk_div_table *clkt;
177 	int up = INT_MAX;
178 
179 	for (clkt = table; clkt->div; clkt++) {
180 		if (clkt->div == div)
181 			return clkt->div;
182 		else if (clkt->div < div)
183 			continue;
184 
185 		if ((clkt->div - div) < (up - div))
186 			up = clkt->div;
187 	}
188 
189 	return up;
190 }
191 
192 static int _round_down_table(const struct clk_div_table *table, int div)
193 {
194 	const struct clk_div_table *clkt;
195 	int down = _get_table_mindiv(table);
196 
197 	for (clkt = table; clkt->div; clkt++) {
198 		if (clkt->div == div)
199 			return clkt->div;
200 		else if (clkt->div > div)
201 			continue;
202 
203 		if ((div - clkt->div) < (div - down))
204 			down = clkt->div;
205 	}
206 
207 	return down;
208 }
209 
210 static int _div_round_up(const struct clk_div_table *table,
211 			 unsigned long parent_rate, unsigned long rate,
212 			 unsigned long flags)
213 {
214 	int div = DIV_ROUND_UP(parent_rate, rate);
215 
216 	if (flags & CLK_DIVIDER_POWER_OF_TWO)
217 		div = __roundup_pow_of_two(div);
218 	if (table)
219 		div = _round_up_table(table, div);
220 
221 	return div;
222 }
223 
224 static int _div_round_closest(const struct clk_div_table *table,
225 			      unsigned long parent_rate, unsigned long rate,
226 			      unsigned long flags)
227 {
228 	int up, down, div;
229 
230 	up = down = div = DIV_ROUND_CLOSEST(parent_rate, rate);
231 
232 	if (flags & CLK_DIVIDER_POWER_OF_TWO) {
233 		up = __roundup_pow_of_two(div);
234 		down = __rounddown_pow_of_two(div);
235 	} else if (table) {
236 		up = _round_up_table(table, div);
237 		down = _round_down_table(table, div);
238 	}
239 
240 	return (up - div) <= (div - down) ? up : down;
241 }
242 
243 static int _div_round(const struct clk_div_table *table,
244 		      unsigned long parent_rate, unsigned long rate,
245 		      unsigned long flags)
246 {
247 	if (flags & CLK_DIVIDER_ROUND_CLOSEST)
248 		return _div_round_closest(table, parent_rate, rate, flags);
249 
250 	return _div_round_up(table, parent_rate, rate, flags);
251 }
252 
253 static bool _is_best_div(unsigned long rate, unsigned long now,
254 			 unsigned long best, unsigned long flags)
255 {
256 	if (flags & CLK_DIVIDER_ROUND_CLOSEST)
257 		return abs(rate - now) < abs(rate - best);
258 
259 	return now <= rate && now > best;
260 }
261 
262 static int _next_div(const struct clk_div_table *table, int div,
263 		     unsigned long flags)
264 {
265 	div++;
266 
267 	if (flags & CLK_DIVIDER_POWER_OF_TWO)
268 		return __roundup_pow_of_two(div);
269 	if (table)
270 		return _round_up_table(table, div);
271 
272 	return div;
273 }
274 
275 static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
276 			       unsigned long *best_parent_rate,
277 			       const struct clk_div_table *table, u8 width,
278 			       unsigned long flags)
279 {
280 	int i, bestdiv = 0;
281 	unsigned long parent_rate, best = 0, now, maxdiv;
282 	unsigned long parent_rate_saved = *best_parent_rate;
283 
284 	if (!rate)
285 		rate = 1;
286 
287 	maxdiv = _get_maxdiv(table, width, flags);
288 
289 	if (!(__clk_get_flags(hw->clk) & CLK_SET_RATE_PARENT)) {
290 		parent_rate = *best_parent_rate;
291 		bestdiv = _div_round(table, parent_rate, rate, flags);
292 		bestdiv = bestdiv == 0 ? 1 : bestdiv;
293 		bestdiv = bestdiv > maxdiv ? maxdiv : bestdiv;
294 		return bestdiv;
295 	}
296 
297 	/*
298 	 * The maximum divider we can use without overflowing
299 	 * unsigned long in rate * i below
300 	 */
301 	maxdiv = min(ULONG_MAX / rate, maxdiv);
302 
303 	for (i = 1; i <= maxdiv; i = _next_div(table, i, flags)) {
304 		if (!_is_valid_div(table, i, flags))
305 			continue;
306 		if (rate * i == parent_rate_saved) {
307 			/*
308 			 * It's the most ideal case if the requested rate can be
309 			 * divided from parent clock without needing to change
310 			 * parent rate, so return the divider immediately.
311 			 */
312 			*best_parent_rate = parent_rate_saved;
313 			return i;
314 		}
315 		parent_rate = __clk_round_rate(__clk_get_parent(hw->clk),
316 				MULT_ROUND_UP(rate, i));
317 		now = DIV_ROUND_UP(parent_rate, i);
318 		if (_is_best_div(rate, now, best, flags)) {
319 			bestdiv = i;
320 			best = now;
321 			*best_parent_rate = parent_rate;
322 		}
323 	}
324 
325 	if (!bestdiv) {
326 		bestdiv = _get_maxdiv(table, width, flags);
327 		*best_parent_rate = __clk_round_rate(__clk_get_parent(hw->clk), 1);
328 	}
329 
330 	return bestdiv;
331 }
332 
333 long divider_round_rate(struct clk_hw *hw, unsigned long rate,
334 			unsigned long *prate, const struct clk_div_table *table,
335 			u8 width, unsigned long flags)
336 {
337 	int div;
338 
339 	div = clk_divider_bestdiv(hw, rate, prate, table, width, flags);
340 
341 	return DIV_ROUND_UP(*prate, div);
342 }
343 EXPORT_SYMBOL_GPL(divider_round_rate);
344 
345 static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,
346 				unsigned long *prate)
347 {
348 	struct clk_divider *divider = to_clk_divider(hw);
349 	int bestdiv;
350 
351 	/* if read only, just return current value */
352 	if (divider->flags & CLK_DIVIDER_READ_ONLY) {
353 		bestdiv = readl(divider->reg) >> divider->shift;
354 		bestdiv &= div_mask(divider->width);
355 		bestdiv = _get_div(divider->table, bestdiv, divider->flags);
356 		return bestdiv;
357 	}
358 
359 	return divider_round_rate(hw, rate, prate, divider->table,
360 				  divider->width, divider->flags);
361 }
362 
363 int divider_get_val(unsigned long rate, unsigned long parent_rate,
364 		    const struct clk_div_table *table, u8 width,
365 		    unsigned long flags)
366 {
367 	unsigned int div, value;
368 
369 	div = DIV_ROUND_UP(parent_rate, rate);
370 
371 	if (!_is_valid_div(table, div, flags))
372 		return -EINVAL;
373 
374 	value = _get_val(table, div, flags);
375 
376 	return min_t(unsigned int, value, div_mask(width));
377 }
378 EXPORT_SYMBOL_GPL(divider_get_val);
379 
380 static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
381 				unsigned long parent_rate)
382 {
383 	struct clk_divider *divider = to_clk_divider(hw);
384 	unsigned int value;
385 	unsigned long flags = 0;
386 	u32 val;
387 
388 	value = divider_get_val(rate, parent_rate, divider->table,
389 				divider->width, divider->flags);
390 
391 	if (divider->lock)
392 		spin_lock_irqsave(divider->lock, flags);
393 
394 	if (divider->flags & CLK_DIVIDER_HIWORD_MASK) {
395 		val = div_mask(divider->width) << (divider->shift + 16);
396 	} else {
397 		val = clk_readl(divider->reg);
398 		val &= ~(div_mask(divider->width) << divider->shift);
399 	}
400 	val |= value << divider->shift;
401 	clk_writel(val, divider->reg);
402 
403 	if (divider->lock)
404 		spin_unlock_irqrestore(divider->lock, flags);
405 
406 	return 0;
407 }
408 
409 const struct clk_ops clk_divider_ops = {
410 	.recalc_rate = clk_divider_recalc_rate,
411 	.round_rate = clk_divider_round_rate,
412 	.set_rate = clk_divider_set_rate,
413 };
414 EXPORT_SYMBOL_GPL(clk_divider_ops);
415 
416 static struct clk *_register_divider(struct device *dev, const char *name,
417 		const char *parent_name, unsigned long flags,
418 		void __iomem *reg, u8 shift, u8 width,
419 		u8 clk_divider_flags, const struct clk_div_table *table,
420 		spinlock_t *lock)
421 {
422 	struct clk_divider *div;
423 	struct clk *clk;
424 	struct clk_init_data init;
425 
426 	if (clk_divider_flags & CLK_DIVIDER_HIWORD_MASK) {
427 		if (width + shift > 16) {
428 			pr_warn("divider value exceeds LOWORD field\n");
429 			return ERR_PTR(-EINVAL);
430 		}
431 	}
432 
433 	/* allocate the divider */
434 	div = kzalloc(sizeof(struct clk_divider), GFP_KERNEL);
435 	if (!div) {
436 		pr_err("%s: could not allocate divider clk\n", __func__);
437 		return ERR_PTR(-ENOMEM);
438 	}
439 
440 	init.name = name;
441 	init.ops = &clk_divider_ops;
442 	init.flags = flags | CLK_IS_BASIC;
443 	init.parent_names = (parent_name ? &parent_name: NULL);
444 	init.num_parents = (parent_name ? 1 : 0);
445 
446 	/* struct clk_divider assignments */
447 	div->reg = reg;
448 	div->shift = shift;
449 	div->width = width;
450 	div->flags = clk_divider_flags;
451 	div->lock = lock;
452 	div->hw.init = &init;
453 	div->table = table;
454 
455 	/* register the clock */
456 	clk = clk_register(dev, &div->hw);
457 
458 	if (IS_ERR(clk))
459 		kfree(div);
460 
461 	return clk;
462 }
463 
464 /**
465  * clk_register_divider - register a divider clock with the clock framework
466  * @dev: device registering this clock
467  * @name: name of this clock
468  * @parent_name: name of clock's parent
469  * @flags: framework-specific flags
470  * @reg: register address to adjust divider
471  * @shift: number of bits to shift the bitfield
472  * @width: width of the bitfield
473  * @clk_divider_flags: divider-specific flags for this clock
474  * @lock: shared register lock for this clock
475  */
476 struct clk *clk_register_divider(struct device *dev, const char *name,
477 		const char *parent_name, unsigned long flags,
478 		void __iomem *reg, u8 shift, u8 width,
479 		u8 clk_divider_flags, spinlock_t *lock)
480 {
481 	return _register_divider(dev, name, parent_name, flags, reg, shift,
482 			width, clk_divider_flags, NULL, lock);
483 }
484 EXPORT_SYMBOL_GPL(clk_register_divider);
485 
486 /**
487  * clk_register_divider_table - register a table based divider clock with
488  * the clock framework
489  * @dev: device registering this clock
490  * @name: name of this clock
491  * @parent_name: name of clock's parent
492  * @flags: framework-specific flags
493  * @reg: register address to adjust divider
494  * @shift: number of bits to shift the bitfield
495  * @width: width of the bitfield
496  * @clk_divider_flags: divider-specific flags for this clock
497  * @table: array of divider/value pairs ending with a div set to 0
498  * @lock: shared register lock for this clock
499  */
500 struct clk *clk_register_divider_table(struct device *dev, const char *name,
501 		const char *parent_name, unsigned long flags,
502 		void __iomem *reg, u8 shift, u8 width,
503 		u8 clk_divider_flags, const struct clk_div_table *table,
504 		spinlock_t *lock)
505 {
506 	return _register_divider(dev, name, parent_name, flags, reg, shift,
507 			width, clk_divider_flags, table, lock);
508 }
509 EXPORT_SYMBOL_GPL(clk_register_divider_table);
510 
511 void clk_unregister_divider(struct clk *clk)
512 {
513 	struct clk_divider *div;
514 	struct clk_hw *hw;
515 
516 	hw = __clk_get_hw(clk);
517 	if (!hw)
518 		return;
519 
520 	div = to_clk_divider(hw);
521 
522 	clk_unregister(clk);
523 	kfree(div);
524 }
525 EXPORT_SYMBOL_GPL(clk_unregister_divider);
526