xref: /openbmc/linux/drivers/clk/clk-conf.c (revision 94cdda6b)
1 /*
2  * Copyright (C) 2014 Samsung Electronics Co., Ltd.
3  * Sylwester Nawrocki <s.nawrocki@samsung.com>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundation.
8  */
9 
10 #include <linux/clk.h>
11 #include <linux/clk-provider.h>
12 #include <linux/clk/clk-conf.h>
13 #include <linux/device.h>
14 #include <linux/of.h>
15 #include <linux/printk.h>
16 
17 static int __set_clk_parents(struct device_node *node, bool clk_supplier)
18 {
19 	struct of_phandle_args clkspec;
20 	int index, rc, num_parents;
21 	struct clk *clk, *pclk;
22 
23 	num_parents = of_count_phandle_with_args(node, "assigned-clock-parents",
24 						 "#clock-cells");
25 	if (num_parents == -EINVAL)
26 		pr_err("clk: invalid value of clock-parents property at %s\n",
27 		       node->full_name);
28 
29 	for (index = 0; index < num_parents; index++) {
30 		rc = of_parse_phandle_with_args(node, "assigned-clock-parents",
31 					"#clock-cells",	index, &clkspec);
32 		if (rc < 0) {
33 			/* skip empty (null) phandles */
34 			if (rc == -ENOENT)
35 				continue;
36 			else
37 				return rc;
38 		}
39 		if (clkspec.np == node && !clk_supplier)
40 			return 0;
41 		pclk = of_clk_get_from_provider(&clkspec);
42 		if (IS_ERR(pclk)) {
43 			pr_warn("clk: couldn't get parent clock %d for %s\n",
44 				index, node->full_name);
45 			return PTR_ERR(pclk);
46 		}
47 
48 		rc = of_parse_phandle_with_args(node, "assigned-clocks",
49 					"#clock-cells", index, &clkspec);
50 		if (rc < 0)
51 			goto err;
52 		if (clkspec.np == node && !clk_supplier) {
53 			rc = 0;
54 			goto err;
55 		}
56 		clk = of_clk_get_from_provider(&clkspec);
57 		if (IS_ERR(clk)) {
58 			pr_warn("clk: couldn't get parent clock %d for %s\n",
59 				index, node->full_name);
60 			rc = PTR_ERR(clk);
61 			goto err;
62 		}
63 
64 		rc = clk_set_parent(clk, pclk);
65 		if (rc < 0)
66 			pr_err("clk: failed to reparent %s to %s: %d\n",
67 			       __clk_get_name(clk), __clk_get_name(pclk), rc);
68 		clk_put(clk);
69 		clk_put(pclk);
70 	}
71 	return 0;
72 err:
73 	clk_put(pclk);
74 	return rc;
75 }
76 
77 static int __set_clk_rates(struct device_node *node, bool clk_supplier)
78 {
79 	struct of_phandle_args clkspec;
80 	struct property	*prop;
81 	const __be32 *cur;
82 	int rc, index = 0;
83 	struct clk *clk;
84 	u32 rate;
85 
86 	of_property_for_each_u32(node, "assigned-clock-rates", prop, cur, rate) {
87 		if (rate) {
88 			rc = of_parse_phandle_with_args(node, "assigned-clocks",
89 					"#clock-cells",	index, &clkspec);
90 			if (rc < 0) {
91 				/* skip empty (null) phandles */
92 				if (rc == -ENOENT)
93 					continue;
94 				else
95 					return rc;
96 			}
97 			if (clkspec.np == node && !clk_supplier)
98 				return 0;
99 
100 			clk = of_clk_get_from_provider(&clkspec);
101 			if (IS_ERR(clk)) {
102 				pr_warn("clk: couldn't get clock %d for %s\n",
103 					index, node->full_name);
104 				return PTR_ERR(clk);
105 			}
106 
107 			rc = clk_set_rate(clk, rate);
108 			if (rc < 0)
109 				pr_err("clk: couldn't set %s clock rate: %d\n",
110 				       __clk_get_name(clk), rc);
111 			clk_put(clk);
112 		}
113 		index++;
114 	}
115 	return 0;
116 }
117 
118 /**
119  * of_clk_set_defaults() - parse and set assigned clocks configuration
120  * @node: device node to apply clock settings for
121  * @clk_supplier: true if clocks supplied by @node should also be considered
122  *
123  * This function parses 'assigned-{clocks/clock-parents/clock-rates}' properties
124  * and sets any specified clock parents and rates. The @clk_supplier argument
125  * should be set to true if @node may be also a clock supplier of any clock
126  * listed in its 'assigned-clocks' or 'assigned-clock-parents' properties.
127  * If @clk_supplier is false the function exits returnning 0 as soon as it
128  * determines the @node is also a supplier of any of the clocks.
129  */
130 int of_clk_set_defaults(struct device_node *node, bool clk_supplier)
131 {
132 	int rc;
133 
134 	if (!node)
135 		return 0;
136 
137 	rc = __set_clk_parents(node, clk_supplier);
138 	if (rc < 0)
139 		return rc;
140 
141 	return __set_clk_rates(node, clk_supplier);
142 }
143 EXPORT_SYMBOL_GPL(of_clk_set_defaults);
144