1 /* 2 * Copyright (c) 2013 NVIDIA CORPORATION. All rights reserved. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 * more details. 12 * 13 * You should have received a copy of the GNU General Public License 14 * along with this program. If not, see <http://www.gnu.org/licenses/>. 15 */ 16 17 #include <linux/clk.h> 18 #include <linux/clk-provider.h> 19 #include <linux/err.h> 20 #include <linux/slab.h> 21 22 #define to_clk_composite(_hw) container_of(_hw, struct clk_composite, hw) 23 24 static u8 clk_composite_get_parent(struct clk_hw *hw) 25 { 26 struct clk_composite *composite = to_clk_composite(hw); 27 const struct clk_ops *mux_ops = composite->mux_ops; 28 struct clk_hw *mux_hw = composite->mux_hw; 29 30 mux_hw->clk = hw->clk; 31 32 return mux_ops->get_parent(mux_hw); 33 } 34 35 static int clk_composite_set_parent(struct clk_hw *hw, u8 index) 36 { 37 struct clk_composite *composite = to_clk_composite(hw); 38 const struct clk_ops *mux_ops = composite->mux_ops; 39 struct clk_hw *mux_hw = composite->mux_hw; 40 41 mux_hw->clk = hw->clk; 42 43 return mux_ops->set_parent(mux_hw, index); 44 } 45 46 static unsigned long clk_composite_recalc_rate(struct clk_hw *hw, 47 unsigned long parent_rate) 48 { 49 struct clk_composite *composite = to_clk_composite(hw); 50 const struct clk_ops *rate_ops = composite->rate_ops; 51 struct clk_hw *rate_hw = composite->rate_hw; 52 53 rate_hw->clk = hw->clk; 54 55 return rate_ops->recalc_rate(rate_hw, parent_rate); 56 } 57 58 static long clk_composite_determine_rate(struct clk_hw *hw, unsigned long rate, 59 unsigned long *best_parent_rate, 60 struct clk_hw **best_parent_p) 61 { 62 struct clk_composite *composite = to_clk_composite(hw); 63 const struct clk_ops *rate_ops = composite->rate_ops; 64 const struct clk_ops *mux_ops = composite->mux_ops; 65 struct clk_hw *rate_hw = composite->rate_hw; 66 struct clk_hw *mux_hw = composite->mux_hw; 67 struct clk *parent; 68 unsigned long parent_rate; 69 long tmp_rate, best_rate = 0; 70 unsigned long rate_diff; 71 unsigned long best_rate_diff = ULONG_MAX; 72 int i; 73 74 if (rate_hw && rate_ops && rate_ops->determine_rate) { 75 rate_hw->clk = hw->clk; 76 return rate_ops->determine_rate(rate_hw, rate, best_parent_rate, 77 best_parent_p); 78 } else if (rate_hw && rate_ops && rate_ops->round_rate && 79 mux_hw && mux_ops && mux_ops->set_parent) { 80 *best_parent_p = NULL; 81 82 if (__clk_get_flags(hw->clk) & CLK_SET_RATE_NO_REPARENT) { 83 parent = clk_get_parent(mux_hw->clk); 84 *best_parent_p = __clk_get_hw(parent); 85 *best_parent_rate = __clk_get_rate(parent); 86 87 return rate_ops->round_rate(rate_hw, rate, 88 best_parent_rate); 89 } 90 91 for (i = 0; i < __clk_get_num_parents(mux_hw->clk); i++) { 92 parent = clk_get_parent_by_index(mux_hw->clk, i); 93 if (!parent) 94 continue; 95 96 parent_rate = __clk_get_rate(parent); 97 98 tmp_rate = rate_ops->round_rate(rate_hw, rate, 99 &parent_rate); 100 if (tmp_rate < 0) 101 continue; 102 103 rate_diff = abs(rate - tmp_rate); 104 105 if (!rate_diff || !*best_parent_p 106 || best_rate_diff > rate_diff) { 107 *best_parent_p = __clk_get_hw(parent); 108 *best_parent_rate = parent_rate; 109 best_rate_diff = rate_diff; 110 best_rate = tmp_rate; 111 } 112 113 if (!rate_diff) 114 return rate; 115 } 116 117 return best_rate; 118 } else if (mux_hw && mux_ops && mux_ops->determine_rate) { 119 mux_hw->clk = hw->clk; 120 return mux_ops->determine_rate(mux_hw, rate, best_parent_rate, 121 best_parent_p); 122 } else { 123 pr_err("clk: clk_composite_determine_rate function called, but no mux or rate callback set!\n"); 124 return 0; 125 } 126 } 127 128 static long clk_composite_round_rate(struct clk_hw *hw, unsigned long rate, 129 unsigned long *prate) 130 { 131 struct clk_composite *composite = to_clk_composite(hw); 132 const struct clk_ops *rate_ops = composite->rate_ops; 133 struct clk_hw *rate_hw = composite->rate_hw; 134 135 rate_hw->clk = hw->clk; 136 137 return rate_ops->round_rate(rate_hw, rate, prate); 138 } 139 140 static int clk_composite_set_rate(struct clk_hw *hw, unsigned long rate, 141 unsigned long parent_rate) 142 { 143 struct clk_composite *composite = to_clk_composite(hw); 144 const struct clk_ops *rate_ops = composite->rate_ops; 145 struct clk_hw *rate_hw = composite->rate_hw; 146 147 rate_hw->clk = hw->clk; 148 149 return rate_ops->set_rate(rate_hw, rate, parent_rate); 150 } 151 152 static int clk_composite_is_enabled(struct clk_hw *hw) 153 { 154 struct clk_composite *composite = to_clk_composite(hw); 155 const struct clk_ops *gate_ops = composite->gate_ops; 156 struct clk_hw *gate_hw = composite->gate_hw; 157 158 gate_hw->clk = hw->clk; 159 160 return gate_ops->is_enabled(gate_hw); 161 } 162 163 static int clk_composite_enable(struct clk_hw *hw) 164 { 165 struct clk_composite *composite = to_clk_composite(hw); 166 const struct clk_ops *gate_ops = composite->gate_ops; 167 struct clk_hw *gate_hw = composite->gate_hw; 168 169 gate_hw->clk = hw->clk; 170 171 return gate_ops->enable(gate_hw); 172 } 173 174 static void clk_composite_disable(struct clk_hw *hw) 175 { 176 struct clk_composite *composite = to_clk_composite(hw); 177 const struct clk_ops *gate_ops = composite->gate_ops; 178 struct clk_hw *gate_hw = composite->gate_hw; 179 180 gate_hw->clk = hw->clk; 181 182 gate_ops->disable(gate_hw); 183 } 184 185 struct clk *clk_register_composite(struct device *dev, const char *name, 186 const char **parent_names, int num_parents, 187 struct clk_hw *mux_hw, const struct clk_ops *mux_ops, 188 struct clk_hw *rate_hw, const struct clk_ops *rate_ops, 189 struct clk_hw *gate_hw, const struct clk_ops *gate_ops, 190 unsigned long flags) 191 { 192 struct clk *clk; 193 struct clk_init_data init; 194 struct clk_composite *composite; 195 struct clk_ops *clk_composite_ops; 196 197 composite = kzalloc(sizeof(*composite), GFP_KERNEL); 198 if (!composite) { 199 pr_err("%s: could not allocate composite clk\n", __func__); 200 return ERR_PTR(-ENOMEM); 201 } 202 203 init.name = name; 204 init.flags = flags | CLK_IS_BASIC; 205 init.parent_names = parent_names; 206 init.num_parents = num_parents; 207 208 clk_composite_ops = &composite->ops; 209 210 if (mux_hw && mux_ops) { 211 if (!mux_ops->get_parent) { 212 clk = ERR_PTR(-EINVAL); 213 goto err; 214 } 215 216 composite->mux_hw = mux_hw; 217 composite->mux_ops = mux_ops; 218 clk_composite_ops->get_parent = clk_composite_get_parent; 219 if (mux_ops->set_parent) 220 clk_composite_ops->set_parent = clk_composite_set_parent; 221 if (mux_ops->determine_rate) 222 clk_composite_ops->determine_rate = clk_composite_determine_rate; 223 } 224 225 if (rate_hw && rate_ops) { 226 if (!rate_ops->recalc_rate) { 227 clk = ERR_PTR(-EINVAL); 228 goto err; 229 } 230 clk_composite_ops->recalc_rate = clk_composite_recalc_rate; 231 232 if (rate_ops->determine_rate) 233 clk_composite_ops->determine_rate = 234 clk_composite_determine_rate; 235 else if (rate_ops->round_rate) 236 clk_composite_ops->round_rate = 237 clk_composite_round_rate; 238 239 /* .set_rate requires either .round_rate or .determine_rate */ 240 if (rate_ops->set_rate) { 241 if (rate_ops->determine_rate || rate_ops->round_rate) 242 clk_composite_ops->set_rate = 243 clk_composite_set_rate; 244 else 245 WARN(1, "%s: missing round_rate op is required\n", 246 __func__); 247 } 248 249 composite->rate_hw = rate_hw; 250 composite->rate_ops = rate_ops; 251 } 252 253 if (gate_hw && gate_ops) { 254 if (!gate_ops->is_enabled || !gate_ops->enable || 255 !gate_ops->disable) { 256 clk = ERR_PTR(-EINVAL); 257 goto err; 258 } 259 260 composite->gate_hw = gate_hw; 261 composite->gate_ops = gate_ops; 262 clk_composite_ops->is_enabled = clk_composite_is_enabled; 263 clk_composite_ops->enable = clk_composite_enable; 264 clk_composite_ops->disable = clk_composite_disable; 265 } 266 267 init.ops = clk_composite_ops; 268 composite->hw.init = &init; 269 270 clk = clk_register(dev, &composite->hw); 271 if (IS_ERR(clk)) 272 goto err; 273 274 if (composite->mux_hw) 275 composite->mux_hw->clk = clk; 276 277 if (composite->rate_hw) 278 composite->rate_hw->clk = clk; 279 280 if (composite->gate_hw) 281 composite->gate_hw->clk = clk; 282 283 return clk; 284 285 err: 286 kfree(composite); 287 return clk; 288 } 289