1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Raspberry Pi driver for firmware controlled clocks 4 * 5 * Even though clk-bcm2835 provides an interface to the hardware registers for 6 * the system clocks we've had to factor out 'pllb' as the firmware 'owns' it. 7 * We're not allowed to change it directly as we might race with the 8 * over-temperature and under-voltage protections provided by the firmware. 9 * 10 * Copyright (C) 2019 Nicolas Saenz Julienne <nsaenzjulienne@suse.de> 11 */ 12 13 #include <linux/clkdev.h> 14 #include <linux/clk-provider.h> 15 #include <linux/io.h> 16 #include <linux/module.h> 17 #include <linux/platform_device.h> 18 19 #include <soc/bcm2835/raspberrypi-firmware.h> 20 21 enum rpi_firmware_clk_id { 22 RPI_FIRMWARE_EMMC_CLK_ID = 1, 23 RPI_FIRMWARE_UART_CLK_ID, 24 RPI_FIRMWARE_ARM_CLK_ID, 25 RPI_FIRMWARE_CORE_CLK_ID, 26 RPI_FIRMWARE_V3D_CLK_ID, 27 RPI_FIRMWARE_H264_CLK_ID, 28 RPI_FIRMWARE_ISP_CLK_ID, 29 RPI_FIRMWARE_SDRAM_CLK_ID, 30 RPI_FIRMWARE_PIXEL_CLK_ID, 31 RPI_FIRMWARE_PWM_CLK_ID, 32 RPI_FIRMWARE_HEVC_CLK_ID, 33 RPI_FIRMWARE_EMMC2_CLK_ID, 34 RPI_FIRMWARE_M2MC_CLK_ID, 35 RPI_FIRMWARE_PIXEL_BVB_CLK_ID, 36 RPI_FIRMWARE_VEC_CLK_ID, 37 RPI_FIRMWARE_NUM_CLK_ID, 38 }; 39 40 static char *rpi_firmware_clk_names[] = { 41 [RPI_FIRMWARE_EMMC_CLK_ID] = "emmc", 42 [RPI_FIRMWARE_UART_CLK_ID] = "uart", 43 [RPI_FIRMWARE_ARM_CLK_ID] = "arm", 44 [RPI_FIRMWARE_CORE_CLK_ID] = "core", 45 [RPI_FIRMWARE_V3D_CLK_ID] = "v3d", 46 [RPI_FIRMWARE_H264_CLK_ID] = "h264", 47 [RPI_FIRMWARE_ISP_CLK_ID] = "isp", 48 [RPI_FIRMWARE_SDRAM_CLK_ID] = "sdram", 49 [RPI_FIRMWARE_PIXEL_CLK_ID] = "pixel", 50 [RPI_FIRMWARE_PWM_CLK_ID] = "pwm", 51 [RPI_FIRMWARE_HEVC_CLK_ID] = "hevc", 52 [RPI_FIRMWARE_EMMC2_CLK_ID] = "emmc2", 53 [RPI_FIRMWARE_M2MC_CLK_ID] = "m2mc", 54 [RPI_FIRMWARE_PIXEL_BVB_CLK_ID] = "pixel-bvb", 55 [RPI_FIRMWARE_VEC_CLK_ID] = "vec", 56 }; 57 58 #define RPI_FIRMWARE_STATE_ENABLE_BIT BIT(0) 59 #define RPI_FIRMWARE_STATE_WAIT_BIT BIT(1) 60 61 struct raspberrypi_clk_variant; 62 63 struct raspberrypi_clk { 64 struct device *dev; 65 struct rpi_firmware *firmware; 66 struct platform_device *cpufreq; 67 }; 68 69 struct raspberrypi_clk_data { 70 struct clk_hw hw; 71 72 unsigned int id; 73 struct raspberrypi_clk_variant *variant; 74 75 struct raspberrypi_clk *rpi; 76 }; 77 78 struct raspberrypi_clk_variant { 79 bool export; 80 char *clkdev; 81 unsigned long min_rate; 82 bool minimize; 83 }; 84 85 static struct raspberrypi_clk_variant 86 raspberrypi_clk_variants[RPI_FIRMWARE_NUM_CLK_ID] = { 87 [RPI_FIRMWARE_ARM_CLK_ID] = { 88 .export = true, 89 .clkdev = "cpu0", 90 }, 91 [RPI_FIRMWARE_CORE_CLK_ID] = { 92 .export = true, 93 94 /* 95 * The clock is shared between the HVS and the CSI 96 * controllers, on the BCM2711 and will change depending 97 * on the pixels composited on the HVS and the capture 98 * resolution on Unicam. 99 * 100 * Since the rate can get quite large, and we need to 101 * coordinate between both driver instances, let's 102 * always use the minimum the drivers will let us. 103 */ 104 .minimize = true, 105 }, 106 [RPI_FIRMWARE_M2MC_CLK_ID] = { 107 .export = true, 108 109 /* 110 * If we boot without any cable connected to any of the 111 * HDMI connector, the firmware will skip the HSM 112 * initialization and leave it with a rate of 0, 113 * resulting in a bus lockup when we're accessing the 114 * registers even if it's enabled. 115 * 116 * Let's put a sensible default so that we don't end up 117 * in this situation. 118 */ 119 .min_rate = 120000000, 120 121 /* 122 * The clock is shared between the two HDMI controllers 123 * on the BCM2711 and will change depending on the 124 * resolution output on each. Since the rate can get 125 * quite large, and we need to coordinate between both 126 * driver instances, let's always use the minimum the 127 * drivers will let us. 128 */ 129 .minimize = true, 130 }, 131 [RPI_FIRMWARE_V3D_CLK_ID] = { 132 .export = true, 133 }, 134 [RPI_FIRMWARE_PIXEL_CLK_ID] = { 135 .export = true, 136 }, 137 [RPI_FIRMWARE_HEVC_CLK_ID] = { 138 .export = true, 139 }, 140 [RPI_FIRMWARE_PIXEL_BVB_CLK_ID] = { 141 .export = true, 142 }, 143 [RPI_FIRMWARE_VEC_CLK_ID] = { 144 .export = true, 145 }, 146 }; 147 148 /* 149 * Structure of the message passed to Raspberry Pi's firmware in order to 150 * change clock rates. The 'disable_turbo' option is only available to the ARM 151 * clock (pllb) which we enable by default as turbo mode will alter multiple 152 * clocks at once. 153 * 154 * Even though we're able to access the clock registers directly we're bound to 155 * use the firmware interface as the firmware ultimately takes care of 156 * mitigating overheating/undervoltage situations and we would be changing 157 * frequencies behind his back. 158 * 159 * For more information on the firmware interface check: 160 * https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface 161 */ 162 struct raspberrypi_firmware_prop { 163 __le32 id; 164 __le32 val; 165 __le32 disable_turbo; 166 } __packed; 167 168 static int raspberrypi_clock_property(struct rpi_firmware *firmware, 169 const struct raspberrypi_clk_data *data, 170 u32 tag, u32 *val) 171 { 172 struct raspberrypi_firmware_prop msg = { 173 .id = cpu_to_le32(data->id), 174 .val = cpu_to_le32(*val), 175 .disable_turbo = cpu_to_le32(1), 176 }; 177 int ret; 178 179 ret = rpi_firmware_property(firmware, tag, &msg, sizeof(msg)); 180 if (ret) 181 return ret; 182 183 *val = le32_to_cpu(msg.val); 184 185 return 0; 186 } 187 188 static int raspberrypi_fw_is_prepared(struct clk_hw *hw) 189 { 190 struct raspberrypi_clk_data *data = 191 container_of(hw, struct raspberrypi_clk_data, hw); 192 struct raspberrypi_clk *rpi = data->rpi; 193 u32 val = 0; 194 int ret; 195 196 ret = raspberrypi_clock_property(rpi->firmware, data, 197 RPI_FIRMWARE_GET_CLOCK_STATE, &val); 198 if (ret) 199 return 0; 200 201 return !!(val & RPI_FIRMWARE_STATE_ENABLE_BIT); 202 } 203 204 205 static unsigned long raspberrypi_fw_get_rate(struct clk_hw *hw, 206 unsigned long parent_rate) 207 { 208 struct raspberrypi_clk_data *data = 209 container_of(hw, struct raspberrypi_clk_data, hw); 210 struct raspberrypi_clk *rpi = data->rpi; 211 u32 val = 0; 212 int ret; 213 214 ret = raspberrypi_clock_property(rpi->firmware, data, 215 RPI_FIRMWARE_GET_CLOCK_RATE, &val); 216 if (ret) 217 return 0; 218 219 return val; 220 } 221 222 static int raspberrypi_fw_set_rate(struct clk_hw *hw, unsigned long rate, 223 unsigned long parent_rate) 224 { 225 struct raspberrypi_clk_data *data = 226 container_of(hw, struct raspberrypi_clk_data, hw); 227 struct raspberrypi_clk *rpi = data->rpi; 228 u32 _rate = rate; 229 int ret; 230 231 ret = raspberrypi_clock_property(rpi->firmware, data, 232 RPI_FIRMWARE_SET_CLOCK_RATE, &_rate); 233 if (ret) 234 dev_err_ratelimited(rpi->dev, "Failed to change %s frequency: %d\n", 235 clk_hw_get_name(hw), ret); 236 237 return ret; 238 } 239 240 static int raspberrypi_fw_dumb_determine_rate(struct clk_hw *hw, 241 struct clk_rate_request *req) 242 { 243 struct raspberrypi_clk_data *data = 244 container_of(hw, struct raspberrypi_clk_data, hw); 245 struct raspberrypi_clk_variant *variant = data->variant; 246 247 /* 248 * The firmware will do the rounding but that isn't part of 249 * the interface with the firmware, so we just do our best 250 * here. 251 */ 252 253 req->rate = clamp(req->rate, req->min_rate, req->max_rate); 254 255 /* 256 * We want to aggressively reduce the clock rate here, so let's 257 * just ignore the requested rate and return the bare minimum 258 * rate we can get away with. 259 */ 260 if (variant->minimize && req->min_rate > 0) 261 req->rate = req->min_rate; 262 263 return 0; 264 } 265 266 static const struct clk_ops raspberrypi_firmware_clk_ops = { 267 .is_prepared = raspberrypi_fw_is_prepared, 268 .recalc_rate = raspberrypi_fw_get_rate, 269 .determine_rate = raspberrypi_fw_dumb_determine_rate, 270 .set_rate = raspberrypi_fw_set_rate, 271 }; 272 273 static struct clk_hw *raspberrypi_clk_register(struct raspberrypi_clk *rpi, 274 unsigned int parent, 275 unsigned int id, 276 struct raspberrypi_clk_variant *variant) 277 { 278 struct raspberrypi_clk_data *data; 279 struct clk_init_data init = {}; 280 u32 min_rate, max_rate; 281 int ret; 282 283 data = devm_kzalloc(rpi->dev, sizeof(*data), GFP_KERNEL); 284 if (!data) 285 return ERR_PTR(-ENOMEM); 286 data->rpi = rpi; 287 data->id = id; 288 data->variant = variant; 289 290 init.name = devm_kasprintf(rpi->dev, GFP_KERNEL, 291 "fw-clk-%s", 292 rpi_firmware_clk_names[id]); 293 init.ops = &raspberrypi_firmware_clk_ops; 294 init.flags = CLK_GET_RATE_NOCACHE; 295 296 data->hw.init = &init; 297 298 ret = raspberrypi_clock_property(rpi->firmware, data, 299 RPI_FIRMWARE_GET_MIN_CLOCK_RATE, 300 &min_rate); 301 if (ret) { 302 dev_err(rpi->dev, "Failed to get clock %d min freq: %d\n", 303 id, ret); 304 return ERR_PTR(ret); 305 } 306 307 ret = raspberrypi_clock_property(rpi->firmware, data, 308 RPI_FIRMWARE_GET_MAX_CLOCK_RATE, 309 &max_rate); 310 if (ret) { 311 dev_err(rpi->dev, "Failed to get clock %d max freq: %d\n", 312 id, ret); 313 return ERR_PTR(ret); 314 } 315 316 ret = devm_clk_hw_register(rpi->dev, &data->hw); 317 if (ret) 318 return ERR_PTR(ret); 319 320 clk_hw_set_rate_range(&data->hw, min_rate, max_rate); 321 322 if (variant->clkdev) { 323 ret = devm_clk_hw_register_clkdev(rpi->dev, &data->hw, 324 NULL, variant->clkdev); 325 if (ret) { 326 dev_err(rpi->dev, "Failed to initialize clkdev\n"); 327 return ERR_PTR(ret); 328 } 329 } 330 331 if (variant->min_rate) { 332 unsigned long rate; 333 334 clk_hw_set_rate_range(&data->hw, variant->min_rate, max_rate); 335 336 rate = raspberrypi_fw_get_rate(&data->hw, 0); 337 if (rate < variant->min_rate) { 338 ret = raspberrypi_fw_set_rate(&data->hw, variant->min_rate, 0); 339 if (ret) 340 return ERR_PTR(ret); 341 } 342 } 343 344 return &data->hw; 345 } 346 347 struct rpi_firmware_get_clocks_response { 348 u32 parent; 349 u32 id; 350 }; 351 352 static int raspberrypi_discover_clocks(struct raspberrypi_clk *rpi, 353 struct clk_hw_onecell_data *data) 354 { 355 struct rpi_firmware_get_clocks_response *clks; 356 int ret; 357 358 /* 359 * The firmware doesn't guarantee that the last element of 360 * RPI_FIRMWARE_GET_CLOCKS is zeroed. So allocate an additional 361 * zero element as sentinel. 362 */ 363 clks = devm_kcalloc(rpi->dev, 364 RPI_FIRMWARE_NUM_CLK_ID + 1, sizeof(*clks), 365 GFP_KERNEL); 366 if (!clks) 367 return -ENOMEM; 368 369 ret = rpi_firmware_property(rpi->firmware, RPI_FIRMWARE_GET_CLOCKS, 370 clks, 371 sizeof(*clks) * RPI_FIRMWARE_NUM_CLK_ID); 372 if (ret) 373 return ret; 374 375 while (clks->id) { 376 struct raspberrypi_clk_variant *variant; 377 378 if (clks->id > RPI_FIRMWARE_NUM_CLK_ID) { 379 dev_err(rpi->dev, "Unknown clock id: %u (max: %u)\n", 380 clks->id, RPI_FIRMWARE_NUM_CLK_ID); 381 return -EINVAL; 382 } 383 384 variant = &raspberrypi_clk_variants[clks->id]; 385 if (variant->export) { 386 struct clk_hw *hw; 387 388 hw = raspberrypi_clk_register(rpi, clks->parent, 389 clks->id, variant); 390 if (IS_ERR(hw)) 391 return PTR_ERR(hw); 392 393 data->hws[clks->id] = hw; 394 data->num = clks->id + 1; 395 } 396 397 clks++; 398 } 399 400 return 0; 401 } 402 403 static int raspberrypi_clk_probe(struct platform_device *pdev) 404 { 405 struct clk_hw_onecell_data *clk_data; 406 struct device_node *firmware_node; 407 struct device *dev = &pdev->dev; 408 struct rpi_firmware *firmware; 409 struct raspberrypi_clk *rpi; 410 int ret; 411 412 /* 413 * We can be probed either through the an old-fashioned 414 * platform device registration or through a DT node that is a 415 * child of the firmware node. Handle both cases. 416 */ 417 if (dev->of_node) 418 firmware_node = of_get_parent(dev->of_node); 419 else 420 firmware_node = of_find_compatible_node(NULL, NULL, 421 "raspberrypi,bcm2835-firmware"); 422 if (!firmware_node) { 423 dev_err(dev, "Missing firmware node\n"); 424 return -ENOENT; 425 } 426 427 firmware = devm_rpi_firmware_get(&pdev->dev, firmware_node); 428 of_node_put(firmware_node); 429 if (!firmware) 430 return -EPROBE_DEFER; 431 432 rpi = devm_kzalloc(dev, sizeof(*rpi), GFP_KERNEL); 433 if (!rpi) 434 return -ENOMEM; 435 436 rpi->dev = dev; 437 rpi->firmware = firmware; 438 platform_set_drvdata(pdev, rpi); 439 440 clk_data = devm_kzalloc(dev, struct_size(clk_data, hws, 441 RPI_FIRMWARE_NUM_CLK_ID), 442 GFP_KERNEL); 443 if (!clk_data) 444 return -ENOMEM; 445 446 ret = raspberrypi_discover_clocks(rpi, clk_data); 447 if (ret) 448 return ret; 449 450 ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, 451 clk_data); 452 if (ret) 453 return ret; 454 455 rpi->cpufreq = platform_device_register_data(dev, "raspberrypi-cpufreq", 456 -1, NULL, 0); 457 458 return 0; 459 } 460 461 static int raspberrypi_clk_remove(struct platform_device *pdev) 462 { 463 struct raspberrypi_clk *rpi = platform_get_drvdata(pdev); 464 465 platform_device_unregister(rpi->cpufreq); 466 467 return 0; 468 } 469 470 static const struct of_device_id raspberrypi_clk_match[] = { 471 { .compatible = "raspberrypi,firmware-clocks" }, 472 { }, 473 }; 474 MODULE_DEVICE_TABLE(of, raspberrypi_clk_match); 475 476 static struct platform_driver raspberrypi_clk_driver = { 477 .driver = { 478 .name = "raspberrypi-clk", 479 .of_match_table = raspberrypi_clk_match, 480 }, 481 .probe = raspberrypi_clk_probe, 482 .remove = raspberrypi_clk_remove, 483 }; 484 module_platform_driver(raspberrypi_clk_driver); 485 486 MODULE_AUTHOR("Nicolas Saenz Julienne <nsaenzjulienne@suse.de>"); 487 MODULE_DESCRIPTION("Raspberry Pi firmware clock driver"); 488 MODULE_LICENSE("GPL"); 489 MODULE_ALIAS("platform:raspberrypi-clk"); 490