11bc95972SMaxime Ripard // SPDX-License-Identifier: GPL-2.0-or-later 21bc95972SMaxime Ripard // Copyright 2020 Cerno 31bc95972SMaxime Ripard 41bc95972SMaxime Ripard #include <linux/clk-provider.h> 51bc95972SMaxime Ripard #include <linux/module.h> 61bc95972SMaxime Ripard #include <linux/platform_device.h> 71bc95972SMaxime Ripard #include <linux/reset-controller.h> 81bc95972SMaxime Ripard #include <linux/reset/reset-simple.h> 91bc95972SMaxime Ripard 101bc95972SMaxime Ripard #define DVP_HT_RPI_SW_INIT 0x04 111bc95972SMaxime Ripard #define DVP_HT_RPI_MISC_CONFIG 0x08 121bc95972SMaxime Ripard 131bc95972SMaxime Ripard #define NR_CLOCKS 2 141bc95972SMaxime Ripard #define NR_RESETS 6 151bc95972SMaxime Ripard 161bc95972SMaxime Ripard struct clk_dvp { 171bc95972SMaxime Ripard struct clk_hw_onecell_data *data; 181bc95972SMaxime Ripard struct reset_simple_data reset; 191bc95972SMaxime Ripard }; 201bc95972SMaxime Ripard 211bc95972SMaxime Ripard static const struct clk_parent_data clk_dvp_parent = { 221bc95972SMaxime Ripard .index = 0, 231bc95972SMaxime Ripard }; 241bc95972SMaxime Ripard 251bc95972SMaxime Ripard static int clk_dvp_probe(struct platform_device *pdev) 261bc95972SMaxime Ripard { 271bc95972SMaxime Ripard struct clk_hw_onecell_data *data; 281bc95972SMaxime Ripard struct clk_dvp *dvp; 291bc95972SMaxime Ripard void __iomem *base; 301bc95972SMaxime Ripard int ret; 311bc95972SMaxime Ripard 321bc95972SMaxime Ripard dvp = devm_kzalloc(&pdev->dev, sizeof(*dvp), GFP_KERNEL); 331bc95972SMaxime Ripard if (!dvp) 341bc95972SMaxime Ripard return -ENOMEM; 351bc95972SMaxime Ripard platform_set_drvdata(pdev, dvp); 361bc95972SMaxime Ripard 371bc95972SMaxime Ripard dvp->data = devm_kzalloc(&pdev->dev, 381bc95972SMaxime Ripard struct_size(dvp->data, hws, NR_CLOCKS), 391bc95972SMaxime Ripard GFP_KERNEL); 401bc95972SMaxime Ripard if (!dvp->data) 411bc95972SMaxime Ripard return -ENOMEM; 421bc95972SMaxime Ripard data = dvp->data; 431bc95972SMaxime Ripard 44*c82cf051SUwe Kleine-König base = devm_platform_ioremap_resource(pdev, 0); 451bc95972SMaxime Ripard if (IS_ERR(base)) 461bc95972SMaxime Ripard return PTR_ERR(base); 471bc95972SMaxime Ripard 481bc95972SMaxime Ripard dvp->reset.rcdev.owner = THIS_MODULE; 491bc95972SMaxime Ripard dvp->reset.rcdev.nr_resets = NR_RESETS; 501bc95972SMaxime Ripard dvp->reset.rcdev.ops = &reset_simple_ops; 511bc95972SMaxime Ripard dvp->reset.rcdev.of_node = pdev->dev.of_node; 521bc95972SMaxime Ripard dvp->reset.membase = base + DVP_HT_RPI_SW_INIT; 531bc95972SMaxime Ripard spin_lock_init(&dvp->reset.lock); 541bc95972SMaxime Ripard 551bc95972SMaxime Ripard ret = devm_reset_controller_register(&pdev->dev, &dvp->reset.rcdev); 561bc95972SMaxime Ripard if (ret) 571bc95972SMaxime Ripard return ret; 581bc95972SMaxime Ripard 591bc95972SMaxime Ripard data->hws[0] = clk_hw_register_gate_parent_data(&pdev->dev, 601bc95972SMaxime Ripard "hdmi0-108MHz", 611bc95972SMaxime Ripard &clk_dvp_parent, 0, 621bc95972SMaxime Ripard base + DVP_HT_RPI_MISC_CONFIG, 3, 631bc95972SMaxime Ripard CLK_GATE_SET_TO_DISABLE, 641bc95972SMaxime Ripard &dvp->reset.lock); 651bc95972SMaxime Ripard if (IS_ERR(data->hws[0])) 661bc95972SMaxime Ripard return PTR_ERR(data->hws[0]); 671bc95972SMaxime Ripard 681bc95972SMaxime Ripard data->hws[1] = clk_hw_register_gate_parent_data(&pdev->dev, 691bc95972SMaxime Ripard "hdmi1-108MHz", 701bc95972SMaxime Ripard &clk_dvp_parent, 0, 711bc95972SMaxime Ripard base + DVP_HT_RPI_MISC_CONFIG, 4, 721bc95972SMaxime Ripard CLK_GATE_SET_TO_DISABLE, 731bc95972SMaxime Ripard &dvp->reset.lock); 741bc95972SMaxime Ripard if (IS_ERR(data->hws[1])) { 751bc95972SMaxime Ripard ret = PTR_ERR(data->hws[1]); 761bc95972SMaxime Ripard goto unregister_clk0; 771bc95972SMaxime Ripard } 781bc95972SMaxime Ripard 791bc95972SMaxime Ripard data->num = NR_CLOCKS; 801bc95972SMaxime Ripard ret = of_clk_add_hw_provider(pdev->dev.of_node, of_clk_hw_onecell_get, 811bc95972SMaxime Ripard data); 821bc95972SMaxime Ripard if (ret) 831bc95972SMaxime Ripard goto unregister_clk1; 841bc95972SMaxime Ripard 851bc95972SMaxime Ripard return 0; 861bc95972SMaxime Ripard 871bc95972SMaxime Ripard unregister_clk1: 881bc95972SMaxime Ripard clk_hw_unregister_gate(data->hws[1]); 891bc95972SMaxime Ripard 901bc95972SMaxime Ripard unregister_clk0: 911bc95972SMaxime Ripard clk_hw_unregister_gate(data->hws[0]); 921bc95972SMaxime Ripard return ret; 931bc95972SMaxime Ripard }; 941bc95972SMaxime Ripard 951bc95972SMaxime Ripard static int clk_dvp_remove(struct platform_device *pdev) 961bc95972SMaxime Ripard { 971bc95972SMaxime Ripard struct clk_dvp *dvp = platform_get_drvdata(pdev); 981bc95972SMaxime Ripard struct clk_hw_onecell_data *data = dvp->data; 991bc95972SMaxime Ripard 1001bc95972SMaxime Ripard clk_hw_unregister_gate(data->hws[1]); 1011bc95972SMaxime Ripard clk_hw_unregister_gate(data->hws[0]); 1021bc95972SMaxime Ripard 1031bc95972SMaxime Ripard return 0; 1041bc95972SMaxime Ripard } 1051bc95972SMaxime Ripard 1061bc95972SMaxime Ripard static const struct of_device_id clk_dvp_dt_ids[] = { 1071bc95972SMaxime Ripard { .compatible = "brcm,brcm2711-dvp", }, 1081bc95972SMaxime Ripard { /* sentinel */ } 1091bc95972SMaxime Ripard }; 1101bc95972SMaxime Ripard 1111bc95972SMaxime Ripard static struct platform_driver clk_dvp_driver = { 1121bc95972SMaxime Ripard .probe = clk_dvp_probe, 1131bc95972SMaxime Ripard .remove = clk_dvp_remove, 1141bc95972SMaxime Ripard .driver = { 1151bc95972SMaxime Ripard .name = "brcm2711-dvp", 1161bc95972SMaxime Ripard .of_match_table = clk_dvp_dt_ids, 1171bc95972SMaxime Ripard }, 1181bc95972SMaxime Ripard }; 1191bc95972SMaxime Ripard module_platform_driver(clk_dvp_driver); 120eb46f547SMaxime Ripard 121eb46f547SMaxime Ripard MODULE_AUTHOR("Maxime Ripard <maxime@cerno.tech>"); 122eb46f547SMaxime Ripard MODULE_DESCRIPTION("BCM2711 DVP clock driver"); 123eb46f547SMaxime Ripard MODULE_LICENSE("GPL"); 124