1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * drivers/clk/at91/pmc.h 4 * 5 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> 6 */ 7 8 #ifndef __PMC_H_ 9 #define __PMC_H_ 10 11 #include <linux/io.h> 12 #include <linux/irqdomain.h> 13 #include <linux/regmap.h> 14 #include <linux/spinlock.h> 15 16 extern spinlock_t pmc_pcr_lock; 17 18 struct pmc_data { 19 unsigned int ncore; 20 struct clk_hw **chws; 21 unsigned int nsystem; 22 struct clk_hw **shws; 23 unsigned int nperiph; 24 struct clk_hw **phws; 25 unsigned int ngck; 26 struct clk_hw **ghws; 27 unsigned int npck; 28 struct clk_hw **pchws; 29 30 struct clk_hw *hwtable[]; 31 }; 32 33 struct clk_range { 34 unsigned long min; 35 unsigned long max; 36 }; 37 38 #define CLK_RANGE(MIN, MAX) {.min = MIN, .max = MAX,} 39 40 struct clk_master_layout { 41 u32 offset; 42 u32 mask; 43 u8 pres_shift; 44 }; 45 46 extern const struct clk_master_layout at91rm9200_master_layout; 47 extern const struct clk_master_layout at91sam9x5_master_layout; 48 49 struct clk_master_characteristics { 50 struct clk_range output; 51 u32 divisors[5]; 52 u8 have_div3_pres; 53 }; 54 55 struct clk_pll_layout { 56 u32 pllr_mask; 57 u32 mul_mask; 58 u32 frac_mask; 59 u32 div_mask; 60 u32 endiv_mask; 61 u8 mul_shift; 62 u8 frac_shift; 63 u8 div_shift; 64 u8 endiv_shift; 65 }; 66 67 extern const struct clk_pll_layout at91rm9200_pll_layout; 68 extern const struct clk_pll_layout at91sam9g45_pll_layout; 69 extern const struct clk_pll_layout at91sam9g20_pllb_layout; 70 extern const struct clk_pll_layout sama5d3_pll_layout; 71 72 struct clk_pll_characteristics { 73 struct clk_range input; 74 int num_output; 75 const struct clk_range *output; 76 u16 *icpll; 77 u8 *out; 78 u8 upll : 1; 79 }; 80 81 struct clk_programmable_layout { 82 u8 pres_mask; 83 u8 pres_shift; 84 u8 css_mask; 85 u8 have_slck_mck; 86 u8 is_pres_direct; 87 }; 88 89 extern const struct clk_programmable_layout at91rm9200_programmable_layout; 90 extern const struct clk_programmable_layout at91sam9g45_programmable_layout; 91 extern const struct clk_programmable_layout at91sam9x5_programmable_layout; 92 93 struct clk_pcr_layout { 94 u32 offset; 95 u32 cmd; 96 u32 div_mask; 97 u32 gckcss_mask; 98 u32 pid_mask; 99 }; 100 101 #define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) 102 #define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) 103 104 #define ndck(a, s) (a[s - 1].id + 1) 105 #define nck(a) (a[ARRAY_SIZE(a) - 1].id + 1) 106 struct pmc_data *pmc_data_allocate(unsigned int ncore, unsigned int nsystem, 107 unsigned int nperiph, unsigned int ngck, 108 unsigned int npck); 109 110 int of_at91_get_clk_range(struct device_node *np, const char *propname, 111 struct clk_range *range); 112 113 struct clk_hw *of_clk_hw_pmc_get(struct of_phandle_args *clkspec, void *data); 114 115 struct clk_hw * __init 116 at91_clk_register_audio_pll_frac(struct regmap *regmap, const char *name, 117 const char *parent_name); 118 119 struct clk_hw * __init 120 at91_clk_register_audio_pll_pad(struct regmap *regmap, const char *name, 121 const char *parent_name); 122 123 struct clk_hw * __init 124 at91_clk_register_audio_pll_pmc(struct regmap *regmap, const char *name, 125 const char *parent_name); 126 127 struct clk_hw * __init 128 at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock, 129 const struct clk_pcr_layout *layout, 130 const char *name, const char **parent_names, 131 u32 *mux_table, u8 num_parents, u8 id, 132 const struct clk_range *range, int chg_pid); 133 134 struct clk_hw * __init 135 at91_clk_register_h32mx(struct regmap *regmap, const char *name, 136 const char *parent_name); 137 138 struct clk_hw * __init 139 at91_clk_i2s_mux_register(struct regmap *regmap, const char *name, 140 const char * const *parent_names, 141 unsigned int num_parents, u8 bus_id); 142 143 struct clk_hw * __init 144 at91_clk_register_main_rc_osc(struct regmap *regmap, const char *name, 145 u32 frequency, u32 accuracy); 146 struct clk_hw * __init 147 at91_clk_register_main_osc(struct regmap *regmap, const char *name, 148 const char *parent_name, bool bypass); 149 struct clk_hw * __init 150 at91_clk_register_rm9200_main(struct regmap *regmap, 151 const char *name, 152 const char *parent_name); 153 struct clk_hw * __init 154 at91_clk_register_sam9x5_main(struct regmap *regmap, const char *name, 155 const char **parent_names, int num_parents); 156 157 struct clk_hw * __init 158 at91_clk_register_master_pres(struct regmap *regmap, const char *name, 159 int num_parents, const char **parent_names, 160 const struct clk_master_layout *layout, 161 const struct clk_master_characteristics *characteristics, 162 spinlock_t *lock, u32 flags, int chg_pid); 163 164 struct clk_hw * __init 165 at91_clk_register_master_div(struct regmap *regmap, const char *name, 166 const char *parent_names, 167 const struct clk_master_layout *layout, 168 const struct clk_master_characteristics *characteristics, 169 spinlock_t *lock, u32 flags); 170 171 struct clk_hw * __init 172 at91_clk_sama7g5_register_master(struct regmap *regmap, 173 const char *name, int num_parents, 174 const char **parent_names, u32 *mux_table, 175 spinlock_t *lock, u8 id, bool critical, 176 int chg_pid); 177 178 struct clk_hw * __init 179 at91_clk_register_peripheral(struct regmap *regmap, const char *name, 180 const char *parent_name, u32 id); 181 struct clk_hw * __init 182 at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock, 183 const struct clk_pcr_layout *layout, 184 const char *name, const char *parent_name, 185 u32 id, const struct clk_range *range, 186 int chg_pid); 187 188 struct clk_hw * __init 189 at91_clk_register_pll(struct regmap *regmap, const char *name, 190 const char *parent_name, u8 id, 191 const struct clk_pll_layout *layout, 192 const struct clk_pll_characteristics *characteristics); 193 struct clk_hw * __init 194 at91_clk_register_plldiv(struct regmap *regmap, const char *name, 195 const char *parent_name); 196 197 struct clk_hw * __init 198 sam9x60_clk_register_div_pll(struct regmap *regmap, spinlock_t *lock, 199 const char *name, const char *parent_name, u8 id, 200 const struct clk_pll_characteristics *characteristics, 201 const struct clk_pll_layout *layout, u32 flags); 202 203 struct clk_hw * __init 204 sam9x60_clk_register_frac_pll(struct regmap *regmap, spinlock_t *lock, 205 const char *name, const char *parent_name, 206 struct clk_hw *parent_hw, u8 id, 207 const struct clk_pll_characteristics *characteristics, 208 const struct clk_pll_layout *layout, u32 flags); 209 210 struct clk_hw * __init 211 at91_clk_register_programmable(struct regmap *regmap, const char *name, 212 const char **parent_names, u8 num_parents, u8 id, 213 const struct clk_programmable_layout *layout, 214 u32 *mux_table); 215 216 struct clk_hw * __init 217 at91_clk_register_sam9260_slow(struct regmap *regmap, 218 const char *name, 219 const char **parent_names, 220 int num_parents); 221 222 struct clk_hw * __init 223 at91sam9x5_clk_register_smd(struct regmap *regmap, const char *name, 224 const char **parent_names, u8 num_parents); 225 226 struct clk_hw * __init 227 at91_clk_register_system(struct regmap *regmap, const char *name, 228 const char *parent_name, u8 id); 229 230 struct clk_hw * __init 231 at91sam9x5_clk_register_usb(struct regmap *regmap, const char *name, 232 const char **parent_names, u8 num_parents); 233 struct clk_hw * __init 234 at91sam9n12_clk_register_usb(struct regmap *regmap, const char *name, 235 const char *parent_name); 236 struct clk_hw * __init 237 sam9x60_clk_register_usb(struct regmap *regmap, const char *name, 238 const char **parent_names, u8 num_parents); 239 struct clk_hw * __init 240 at91rm9200_clk_register_usb(struct regmap *regmap, const char *name, 241 const char *parent_name, const u32 *divisors); 242 243 struct clk_hw * __init 244 at91_clk_register_utmi(struct regmap *regmap_pmc, struct regmap *regmap_sfr, 245 const char *name, const char *parent_name); 246 247 struct clk_hw * __init 248 at91_clk_sama7g5_register_utmi(struct regmap *regmap, const char *name, 249 const char *parent_name); 250 251 #ifdef CONFIG_PM 252 void pmc_register_id(u8 id); 253 void pmc_register_pck(u8 pck); 254 #else 255 static inline void pmc_register_id(u8 id) {} 256 static inline void pmc_register_pck(u8 pck) {} 257 #endif 258 259 #endif /* __PMC_H_ */ 260