10ad6125bSBoris BREZILLON /* 20ad6125bSBoris BREZILLON * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> 30ad6125bSBoris BREZILLON * 40ad6125bSBoris BREZILLON * This program is free software; you can redistribute it and/or modify 50ad6125bSBoris BREZILLON * it under the terms of the GNU General Public License as published by 60ad6125bSBoris BREZILLON * the Free Software Foundation; either version 2 of the License, or 70ad6125bSBoris BREZILLON * (at your option) any later version. 80ad6125bSBoris BREZILLON * 90ad6125bSBoris BREZILLON */ 100ad6125bSBoris BREZILLON 110ad6125bSBoris BREZILLON #include <linux/clk-provider.h> 120ad6125bSBoris BREZILLON #include <linux/clkdev.h> 130ad6125bSBoris BREZILLON #include <linux/clk/at91_pmc.h> 140ad6125bSBoris BREZILLON #include <linux/of.h> 150ad6125bSBoris BREZILLON #include <linux/of_address.h> 160ad6125bSBoris BREZILLON #include <linux/io.h> 170ad6125bSBoris BREZILLON #include <linux/interrupt.h> 180ad6125bSBoris BREZILLON #include <linux/irq.h> 190ad6125bSBoris BREZILLON #include <linux/irqchip/chained_irq.h> 200ad6125bSBoris BREZILLON #include <linux/irqdomain.h> 210ad6125bSBoris BREZILLON #include <linux/of_irq.h> 220ad6125bSBoris BREZILLON 230ad6125bSBoris BREZILLON #include <asm/proc-fns.h> 240ad6125bSBoris BREZILLON 250ad6125bSBoris BREZILLON #include "pmc.h" 260ad6125bSBoris BREZILLON 270ad6125bSBoris BREZILLON void __iomem *at91_pmc_base; 280ad6125bSBoris BREZILLON EXPORT_SYMBOL_GPL(at91_pmc_base); 290ad6125bSBoris BREZILLON 3029ee506dSAlexandre Belloni void at91rm9200_idle(void) 3129ee506dSAlexandre Belloni { 3229ee506dSAlexandre Belloni /* 3329ee506dSAlexandre Belloni * Disable the processor clock. The processor will be automatically 3429ee506dSAlexandre Belloni * re-enabled by an interrupt or by a reset. 3529ee506dSAlexandre Belloni */ 3629ee506dSAlexandre Belloni at91_pmc_write(AT91_PMC_SCDR, AT91_PMC_PCK); 3729ee506dSAlexandre Belloni } 3829ee506dSAlexandre Belloni 390ad6125bSBoris BREZILLON void at91sam9_idle(void) 400ad6125bSBoris BREZILLON { 410ad6125bSBoris BREZILLON at91_pmc_write(AT91_PMC_SCDR, AT91_PMC_PCK); 420ad6125bSBoris BREZILLON cpu_do_idle(); 430ad6125bSBoris BREZILLON } 440ad6125bSBoris BREZILLON 450ad6125bSBoris BREZILLON int of_at91_get_clk_range(struct device_node *np, const char *propname, 460ad6125bSBoris BREZILLON struct clk_range *range) 470ad6125bSBoris BREZILLON { 480ad6125bSBoris BREZILLON u32 min, max; 490ad6125bSBoris BREZILLON int ret; 500ad6125bSBoris BREZILLON 510ad6125bSBoris BREZILLON ret = of_property_read_u32_index(np, propname, 0, &min); 520ad6125bSBoris BREZILLON if (ret) 530ad6125bSBoris BREZILLON return ret; 540ad6125bSBoris BREZILLON 550ad6125bSBoris BREZILLON ret = of_property_read_u32_index(np, propname, 1, &max); 560ad6125bSBoris BREZILLON if (ret) 570ad6125bSBoris BREZILLON return ret; 580ad6125bSBoris BREZILLON 590ad6125bSBoris BREZILLON if (range) { 600ad6125bSBoris BREZILLON range->min = min; 610ad6125bSBoris BREZILLON range->max = max; 620ad6125bSBoris BREZILLON } 630ad6125bSBoris BREZILLON 640ad6125bSBoris BREZILLON return 0; 650ad6125bSBoris BREZILLON } 660ad6125bSBoris BREZILLON EXPORT_SYMBOL_GPL(of_at91_get_clk_range); 670ad6125bSBoris BREZILLON 680ad6125bSBoris BREZILLON static void pmc_irq_mask(struct irq_data *d) 690ad6125bSBoris BREZILLON { 700ad6125bSBoris BREZILLON struct at91_pmc *pmc = irq_data_get_irq_chip_data(d); 710ad6125bSBoris BREZILLON 720ad6125bSBoris BREZILLON pmc_write(pmc, AT91_PMC_IDR, 1 << d->hwirq); 730ad6125bSBoris BREZILLON } 740ad6125bSBoris BREZILLON 750ad6125bSBoris BREZILLON static void pmc_irq_unmask(struct irq_data *d) 760ad6125bSBoris BREZILLON { 770ad6125bSBoris BREZILLON struct at91_pmc *pmc = irq_data_get_irq_chip_data(d); 780ad6125bSBoris BREZILLON 790ad6125bSBoris BREZILLON pmc_write(pmc, AT91_PMC_IER, 1 << d->hwirq); 800ad6125bSBoris BREZILLON } 810ad6125bSBoris BREZILLON 820ad6125bSBoris BREZILLON static int pmc_irq_set_type(struct irq_data *d, unsigned type) 830ad6125bSBoris BREZILLON { 840ad6125bSBoris BREZILLON if (type != IRQ_TYPE_LEVEL_HIGH) { 850ad6125bSBoris BREZILLON pr_warn("PMC: type not supported (support only IRQ_TYPE_LEVEL_HIGH type)\n"); 860ad6125bSBoris BREZILLON return -EINVAL; 870ad6125bSBoris BREZILLON } 880ad6125bSBoris BREZILLON 890ad6125bSBoris BREZILLON return 0; 900ad6125bSBoris BREZILLON } 910ad6125bSBoris BREZILLON 92947f5b10SBoris BREZILLON static void pmc_irq_suspend(struct irq_data *d) 93947f5b10SBoris BREZILLON { 94947f5b10SBoris BREZILLON struct at91_pmc *pmc = irq_data_get_irq_chip_data(d); 95947f5b10SBoris BREZILLON 96947f5b10SBoris BREZILLON pmc->imr = pmc_read(pmc, AT91_PMC_IMR); 97947f5b10SBoris BREZILLON pmc_write(pmc, AT91_PMC_IDR, pmc->imr); 98947f5b10SBoris BREZILLON } 99947f5b10SBoris BREZILLON 100947f5b10SBoris BREZILLON static void pmc_irq_resume(struct irq_data *d) 101947f5b10SBoris BREZILLON { 102947f5b10SBoris BREZILLON struct at91_pmc *pmc = irq_data_get_irq_chip_data(d); 103947f5b10SBoris BREZILLON 104947f5b10SBoris BREZILLON pmc_write(pmc, AT91_PMC_IER, pmc->imr); 105947f5b10SBoris BREZILLON } 106947f5b10SBoris BREZILLON 1070ad6125bSBoris BREZILLON static struct irq_chip pmc_irq = { 1080ad6125bSBoris BREZILLON .name = "PMC", 1090ad6125bSBoris BREZILLON .irq_disable = pmc_irq_mask, 1100ad6125bSBoris BREZILLON .irq_mask = pmc_irq_mask, 1110ad6125bSBoris BREZILLON .irq_unmask = pmc_irq_unmask, 1120ad6125bSBoris BREZILLON .irq_set_type = pmc_irq_set_type, 113947f5b10SBoris BREZILLON .irq_suspend = pmc_irq_suspend, 114947f5b10SBoris BREZILLON .irq_resume = pmc_irq_resume, 1150ad6125bSBoris BREZILLON }; 1160ad6125bSBoris BREZILLON 1170ad6125bSBoris BREZILLON static struct lock_class_key pmc_lock_class; 1180ad6125bSBoris BREZILLON 1190ad6125bSBoris BREZILLON static int pmc_irq_map(struct irq_domain *h, unsigned int virq, 1200ad6125bSBoris BREZILLON irq_hw_number_t hw) 1210ad6125bSBoris BREZILLON { 1220ad6125bSBoris BREZILLON struct at91_pmc *pmc = h->host_data; 1230ad6125bSBoris BREZILLON 1240ad6125bSBoris BREZILLON irq_set_lockdep_class(virq, &pmc_lock_class); 1250ad6125bSBoris BREZILLON 1260ad6125bSBoris BREZILLON irq_set_chip_and_handler(virq, &pmc_irq, 1270ad6125bSBoris BREZILLON handle_level_irq); 1280ad6125bSBoris BREZILLON set_irq_flags(virq, IRQF_VALID); 1290ad6125bSBoris BREZILLON irq_set_chip_data(virq, pmc); 1300ad6125bSBoris BREZILLON 1310ad6125bSBoris BREZILLON return 0; 1320ad6125bSBoris BREZILLON } 1330ad6125bSBoris BREZILLON 1340ad6125bSBoris BREZILLON static int pmc_irq_domain_xlate(struct irq_domain *d, 1350ad6125bSBoris BREZILLON struct device_node *ctrlr, 1360ad6125bSBoris BREZILLON const u32 *intspec, unsigned int intsize, 1370ad6125bSBoris BREZILLON irq_hw_number_t *out_hwirq, 1380ad6125bSBoris BREZILLON unsigned int *out_type) 1390ad6125bSBoris BREZILLON { 1400ad6125bSBoris BREZILLON struct at91_pmc *pmc = d->host_data; 1410ad6125bSBoris BREZILLON const struct at91_pmc_caps *caps = pmc->caps; 1420ad6125bSBoris BREZILLON 1430ad6125bSBoris BREZILLON if (WARN_ON(intsize < 1)) 1440ad6125bSBoris BREZILLON return -EINVAL; 1450ad6125bSBoris BREZILLON 1460ad6125bSBoris BREZILLON *out_hwirq = intspec[0]; 1470ad6125bSBoris BREZILLON 1480ad6125bSBoris BREZILLON if (!(caps->available_irqs & (1 << *out_hwirq))) 1490ad6125bSBoris BREZILLON return -EINVAL; 1500ad6125bSBoris BREZILLON 1510ad6125bSBoris BREZILLON *out_type = IRQ_TYPE_LEVEL_HIGH; 1520ad6125bSBoris BREZILLON 1530ad6125bSBoris BREZILLON return 0; 1540ad6125bSBoris BREZILLON } 1550ad6125bSBoris BREZILLON 1560ad6125bSBoris BREZILLON static struct irq_domain_ops pmc_irq_ops = { 1570ad6125bSBoris BREZILLON .map = pmc_irq_map, 1580ad6125bSBoris BREZILLON .xlate = pmc_irq_domain_xlate, 1590ad6125bSBoris BREZILLON }; 1600ad6125bSBoris BREZILLON 1610ad6125bSBoris BREZILLON static irqreturn_t pmc_irq_handler(int irq, void *data) 1620ad6125bSBoris BREZILLON { 1630ad6125bSBoris BREZILLON struct at91_pmc *pmc = (struct at91_pmc *)data; 1640ad6125bSBoris BREZILLON unsigned long sr; 1650ad6125bSBoris BREZILLON int n; 1660ad6125bSBoris BREZILLON 1670ad6125bSBoris BREZILLON sr = pmc_read(pmc, AT91_PMC_SR) & pmc_read(pmc, AT91_PMC_IMR); 1680ad6125bSBoris BREZILLON if (!sr) 1690ad6125bSBoris BREZILLON return IRQ_NONE; 1700ad6125bSBoris BREZILLON 1710ad6125bSBoris BREZILLON for_each_set_bit(n, &sr, BITS_PER_LONG) 1720ad6125bSBoris BREZILLON generic_handle_irq(irq_find_mapping(pmc->irqdomain, n)); 1730ad6125bSBoris BREZILLON 1740ad6125bSBoris BREZILLON return IRQ_HANDLED; 1750ad6125bSBoris BREZILLON } 1760ad6125bSBoris BREZILLON 1770ad6125bSBoris BREZILLON static const struct at91_pmc_caps at91rm9200_caps = { 1780ad6125bSBoris BREZILLON .available_irqs = AT91_PMC_MOSCS | AT91_PMC_LOCKA | AT91_PMC_LOCKB | 1790ad6125bSBoris BREZILLON AT91_PMC_MCKRDY | AT91_PMC_PCK0RDY | 1800ad6125bSBoris BREZILLON AT91_PMC_PCK1RDY | AT91_PMC_PCK2RDY | 1810ad6125bSBoris BREZILLON AT91_PMC_PCK3RDY, 1820ad6125bSBoris BREZILLON }; 1830ad6125bSBoris BREZILLON 1840ad6125bSBoris BREZILLON static const struct at91_pmc_caps at91sam9260_caps = { 1850ad6125bSBoris BREZILLON .available_irqs = AT91_PMC_MOSCS | AT91_PMC_LOCKA | AT91_PMC_LOCKB | 1860ad6125bSBoris BREZILLON AT91_PMC_MCKRDY | AT91_PMC_PCK0RDY | 1870ad6125bSBoris BREZILLON AT91_PMC_PCK1RDY, 1880ad6125bSBoris BREZILLON }; 1890ad6125bSBoris BREZILLON 1900ad6125bSBoris BREZILLON static const struct at91_pmc_caps at91sam9g45_caps = { 1910ad6125bSBoris BREZILLON .available_irqs = AT91_PMC_MOSCS | AT91_PMC_LOCKA | AT91_PMC_MCKRDY | 1920ad6125bSBoris BREZILLON AT91_PMC_LOCKU | AT91_PMC_PCK0RDY | 1930ad6125bSBoris BREZILLON AT91_PMC_PCK1RDY, 1940ad6125bSBoris BREZILLON }; 1950ad6125bSBoris BREZILLON 1960ad6125bSBoris BREZILLON static const struct at91_pmc_caps at91sam9n12_caps = { 1970ad6125bSBoris BREZILLON .available_irqs = AT91_PMC_MOSCS | AT91_PMC_LOCKA | AT91_PMC_LOCKB | 1980ad6125bSBoris BREZILLON AT91_PMC_MCKRDY | AT91_PMC_PCK0RDY | 1990ad6125bSBoris BREZILLON AT91_PMC_PCK1RDY | AT91_PMC_MOSCSELS | 2000ad6125bSBoris BREZILLON AT91_PMC_MOSCRCS | AT91_PMC_CFDEV, 2010ad6125bSBoris BREZILLON }; 2020ad6125bSBoris BREZILLON 2030ad6125bSBoris BREZILLON static const struct at91_pmc_caps at91sam9x5_caps = { 2040ad6125bSBoris BREZILLON .available_irqs = AT91_PMC_MOSCS | AT91_PMC_LOCKA | AT91_PMC_MCKRDY | 2050ad6125bSBoris BREZILLON AT91_PMC_LOCKU | AT91_PMC_PCK0RDY | 2060ad6125bSBoris BREZILLON AT91_PMC_PCK1RDY | AT91_PMC_MOSCSELS | 2070ad6125bSBoris BREZILLON AT91_PMC_MOSCRCS | AT91_PMC_CFDEV, 2080ad6125bSBoris BREZILLON }; 2090ad6125bSBoris BREZILLON 2100ad6125bSBoris BREZILLON static const struct at91_pmc_caps sama5d3_caps = { 2110ad6125bSBoris BREZILLON .available_irqs = AT91_PMC_MOSCS | AT91_PMC_LOCKA | AT91_PMC_MCKRDY | 2120ad6125bSBoris BREZILLON AT91_PMC_LOCKU | AT91_PMC_PCK0RDY | 2130ad6125bSBoris BREZILLON AT91_PMC_PCK1RDY | AT91_PMC_PCK2RDY | 2140ad6125bSBoris BREZILLON AT91_PMC_MOSCSELS | AT91_PMC_MOSCRCS | 2150ad6125bSBoris BREZILLON AT91_PMC_CFDEV, 2160ad6125bSBoris BREZILLON }; 2170ad6125bSBoris BREZILLON 2180ad6125bSBoris BREZILLON static struct at91_pmc *__init at91_pmc_init(struct device_node *np, 2190ad6125bSBoris BREZILLON void __iomem *regbase, int virq, 2200ad6125bSBoris BREZILLON const struct at91_pmc_caps *caps) 2210ad6125bSBoris BREZILLON { 2220ad6125bSBoris BREZILLON struct at91_pmc *pmc; 2230ad6125bSBoris BREZILLON 2240ad6125bSBoris BREZILLON if (!regbase || !virq || !caps) 2250ad6125bSBoris BREZILLON return NULL; 2260ad6125bSBoris BREZILLON 2270ad6125bSBoris BREZILLON at91_pmc_base = regbase; 2280ad6125bSBoris BREZILLON 2290ad6125bSBoris BREZILLON pmc = kzalloc(sizeof(*pmc), GFP_KERNEL); 2300ad6125bSBoris BREZILLON if (!pmc) 2310ad6125bSBoris BREZILLON return NULL; 2320ad6125bSBoris BREZILLON 2330ad6125bSBoris BREZILLON spin_lock_init(&pmc->lock); 2340ad6125bSBoris BREZILLON pmc->regbase = regbase; 2350ad6125bSBoris BREZILLON pmc->virq = virq; 2360ad6125bSBoris BREZILLON pmc->caps = caps; 2370ad6125bSBoris BREZILLON 2380ad6125bSBoris BREZILLON pmc->irqdomain = irq_domain_add_linear(np, 32, &pmc_irq_ops, pmc); 2390ad6125bSBoris BREZILLON 2400ad6125bSBoris BREZILLON if (!pmc->irqdomain) 2410ad6125bSBoris BREZILLON goto out_free_pmc; 2420ad6125bSBoris BREZILLON 2430ad6125bSBoris BREZILLON pmc_write(pmc, AT91_PMC_IDR, 0xffffffff); 244947f5b10SBoris BREZILLON if (request_irq(pmc->virq, pmc_irq_handler, 245947f5b10SBoris BREZILLON IRQF_SHARED | IRQF_COND_SUSPEND, "pmc", pmc)) 2460ad6125bSBoris BREZILLON goto out_remove_irqdomain; 2470ad6125bSBoris BREZILLON 2480ad6125bSBoris BREZILLON return pmc; 2490ad6125bSBoris BREZILLON 2500ad6125bSBoris BREZILLON out_remove_irqdomain: 2510ad6125bSBoris BREZILLON irq_domain_remove(pmc->irqdomain); 2520ad6125bSBoris BREZILLON out_free_pmc: 2530ad6125bSBoris BREZILLON kfree(pmc); 2540ad6125bSBoris BREZILLON 2550ad6125bSBoris BREZILLON return NULL; 2560ad6125bSBoris BREZILLON } 2570ad6125bSBoris BREZILLON 2587736c715SBoris BREZILLON static const struct of_device_id pmc_clk_ids[] __initconst = { 25980eded6cSBoris BREZILLON /* Slow oscillator */ 26080eded6cSBoris BREZILLON { 26180eded6cSBoris BREZILLON .compatible = "atmel,at91sam9260-clk-slow", 26280eded6cSBoris BREZILLON .data = of_at91sam9260_clk_slow_setup, 26380eded6cSBoris BREZILLON }, 26438d34c31SBoris BREZILLON /* Main clock */ 26538d34c31SBoris BREZILLON { 26627cb1c20SBoris BREZILLON .compatible = "atmel,at91rm9200-clk-main-osc", 26727cb1c20SBoris BREZILLON .data = of_at91rm9200_clk_main_osc_setup, 26827cb1c20SBoris BREZILLON }, 26927cb1c20SBoris BREZILLON { 27027cb1c20SBoris BREZILLON .compatible = "atmel,at91sam9x5-clk-main-rc-osc", 27127cb1c20SBoris BREZILLON .data = of_at91sam9x5_clk_main_rc_osc_setup, 27227cb1c20SBoris BREZILLON }, 27327cb1c20SBoris BREZILLON { 27438d34c31SBoris BREZILLON .compatible = "atmel,at91rm9200-clk-main", 27538d34c31SBoris BREZILLON .data = of_at91rm9200_clk_main_setup, 27638d34c31SBoris BREZILLON }, 27727cb1c20SBoris BREZILLON { 27827cb1c20SBoris BREZILLON .compatible = "atmel,at91sam9x5-clk-main", 27927cb1c20SBoris BREZILLON .data = of_at91sam9x5_clk_main_setup, 28027cb1c20SBoris BREZILLON }, 2811a748d2bSBoris BREZILLON /* PLL clocks */ 2821a748d2bSBoris BREZILLON { 2831a748d2bSBoris BREZILLON .compatible = "atmel,at91rm9200-clk-pll", 2841a748d2bSBoris BREZILLON .data = of_at91rm9200_clk_pll_setup, 2851a748d2bSBoris BREZILLON }, 2861a748d2bSBoris BREZILLON { 2871a748d2bSBoris BREZILLON .compatible = "atmel,at91sam9g45-clk-pll", 2881a748d2bSBoris BREZILLON .data = of_at91sam9g45_clk_pll_setup, 2891a748d2bSBoris BREZILLON }, 2901a748d2bSBoris BREZILLON { 2911a748d2bSBoris BREZILLON .compatible = "atmel,at91sam9g20-clk-pllb", 2921a748d2bSBoris BREZILLON .data = of_at91sam9g20_clk_pllb_setup, 2931a748d2bSBoris BREZILLON }, 2941a748d2bSBoris BREZILLON { 2951a748d2bSBoris BREZILLON .compatible = "atmel,sama5d3-clk-pll", 2961a748d2bSBoris BREZILLON .data = of_sama5d3_clk_pll_setup, 2971a748d2bSBoris BREZILLON }, 2981a748d2bSBoris BREZILLON { 2991a748d2bSBoris BREZILLON .compatible = "atmel,at91sam9x5-clk-plldiv", 3001a748d2bSBoris BREZILLON .data = of_at91sam9x5_clk_plldiv_setup, 3011a748d2bSBoris BREZILLON }, 302e442d234SBoris BREZILLON /* Master clock */ 303e442d234SBoris BREZILLON { 304e442d234SBoris BREZILLON .compatible = "atmel,at91rm9200-clk-master", 305e442d234SBoris BREZILLON .data = of_at91rm9200_clk_master_setup, 306e442d234SBoris BREZILLON }, 307e442d234SBoris BREZILLON { 308e442d234SBoris BREZILLON .compatible = "atmel,at91sam9x5-clk-master", 309e442d234SBoris BREZILLON .data = of_at91sam9x5_clk_master_setup, 310e442d234SBoris BREZILLON }, 3115fba62eaSBoris BREZILLON /* System clocks */ 3125fba62eaSBoris BREZILLON { 3135fba62eaSBoris BREZILLON .compatible = "atmel,at91rm9200-clk-system", 3145fba62eaSBoris BREZILLON .data = of_at91rm9200_clk_sys_setup, 3155fba62eaSBoris BREZILLON }, 3166114067eSBoris BREZILLON /* Peripheral clocks */ 3176114067eSBoris BREZILLON { 3186114067eSBoris BREZILLON .compatible = "atmel,at91rm9200-clk-peripheral", 3196114067eSBoris BREZILLON .data = of_at91rm9200_clk_periph_setup, 3206114067eSBoris BREZILLON }, 3216114067eSBoris BREZILLON { 3226114067eSBoris BREZILLON .compatible = "atmel,at91sam9x5-clk-peripheral", 3236114067eSBoris BREZILLON .data = of_at91sam9x5_clk_periph_setup, 3246114067eSBoris BREZILLON }, 3251f22f8bbSBoris BREZILLON /* Programmable clocks */ 3261f22f8bbSBoris BREZILLON { 3271f22f8bbSBoris BREZILLON .compatible = "atmel,at91rm9200-clk-programmable", 3281f22f8bbSBoris BREZILLON .data = of_at91rm9200_clk_prog_setup, 3291f22f8bbSBoris BREZILLON }, 3301f22f8bbSBoris BREZILLON { 3311f22f8bbSBoris BREZILLON .compatible = "atmel,at91sam9g45-clk-programmable", 3321f22f8bbSBoris BREZILLON .data = of_at91sam9g45_clk_prog_setup, 3331f22f8bbSBoris BREZILLON }, 3341f22f8bbSBoris BREZILLON { 3351f22f8bbSBoris BREZILLON .compatible = "atmel,at91sam9x5-clk-programmable", 3361f22f8bbSBoris BREZILLON .data = of_at91sam9x5_clk_prog_setup, 3371f22f8bbSBoris BREZILLON }, 338f090fb37SBoris BREZILLON /* UTMI clock */ 339f090fb37SBoris BREZILLON #if defined(CONFIG_HAVE_AT91_UTMI) 340f090fb37SBoris BREZILLON { 341f090fb37SBoris BREZILLON .compatible = "atmel,at91sam9x5-clk-utmi", 342f090fb37SBoris BREZILLON .data = of_at91sam9x5_clk_utmi_setup, 343f090fb37SBoris BREZILLON }, 344f090fb37SBoris BREZILLON #endif 345c84a61d8SBoris BREZILLON /* USB clock */ 346c84a61d8SBoris BREZILLON #if defined(CONFIG_HAVE_AT91_USB_CLK) 347c84a61d8SBoris BREZILLON { 348c84a61d8SBoris BREZILLON .compatible = "atmel,at91rm9200-clk-usb", 349c84a61d8SBoris BREZILLON .data = of_at91rm9200_clk_usb_setup, 350c84a61d8SBoris BREZILLON }, 351c84a61d8SBoris BREZILLON { 352c84a61d8SBoris BREZILLON .compatible = "atmel,at91sam9x5-clk-usb", 353c84a61d8SBoris BREZILLON .data = of_at91sam9x5_clk_usb_setup, 354c84a61d8SBoris BREZILLON }, 355c84a61d8SBoris BREZILLON { 356c84a61d8SBoris BREZILLON .compatible = "atmel,at91sam9n12-clk-usb", 357c84a61d8SBoris BREZILLON .data = of_at91sam9n12_clk_usb_setup, 358c84a61d8SBoris BREZILLON }, 359c84a61d8SBoris BREZILLON #endif 360a9c0688fSBoris BREZILLON /* SMD clock */ 361a9c0688fSBoris BREZILLON #if defined(CONFIG_HAVE_AT91_SMD) 362a9c0688fSBoris BREZILLON { 363a9c0688fSBoris BREZILLON .compatible = "atmel,at91sam9x5-clk-smd", 364a9c0688fSBoris BREZILLON .data = of_at91sam9x5_clk_smd_setup, 365a9c0688fSBoris BREZILLON }, 366a9c0688fSBoris BREZILLON #endif 367bcc5fd49SAlexandre Belloni #if defined(CONFIG_HAVE_AT91_H32MX) 368bcc5fd49SAlexandre Belloni { 369bcc5fd49SAlexandre Belloni .compatible = "atmel,sama5d4-clk-h32mx", 370bcc5fd49SAlexandre Belloni .data = of_sama5d4_clk_h32mx_setup, 371bcc5fd49SAlexandre Belloni }, 372bcc5fd49SAlexandre Belloni #endif 3730ad6125bSBoris BREZILLON { /*sentinel*/ } 3740ad6125bSBoris BREZILLON }; 3750ad6125bSBoris BREZILLON 3760ad6125bSBoris BREZILLON static void __init of_at91_pmc_setup(struct device_node *np, 3770ad6125bSBoris BREZILLON const struct at91_pmc_caps *caps) 3780ad6125bSBoris BREZILLON { 3790ad6125bSBoris BREZILLON struct at91_pmc *pmc; 3800ad6125bSBoris BREZILLON struct device_node *childnp; 3810ad6125bSBoris BREZILLON void (*clk_setup)(struct device_node *, struct at91_pmc *); 3820ad6125bSBoris BREZILLON const struct of_device_id *clk_id; 3830ad6125bSBoris BREZILLON void __iomem *regbase = of_iomap(np, 0); 3840ad6125bSBoris BREZILLON int virq; 3850ad6125bSBoris BREZILLON 3860ad6125bSBoris BREZILLON if (!regbase) 3870ad6125bSBoris BREZILLON return; 3880ad6125bSBoris BREZILLON 3890ad6125bSBoris BREZILLON virq = irq_of_parse_and_map(np, 0); 3900ad6125bSBoris BREZILLON if (!virq) 3910ad6125bSBoris BREZILLON return; 3920ad6125bSBoris BREZILLON 3930ad6125bSBoris BREZILLON pmc = at91_pmc_init(np, regbase, virq, caps); 3940ad6125bSBoris BREZILLON if (!pmc) 3950ad6125bSBoris BREZILLON return; 3960ad6125bSBoris BREZILLON for_each_child_of_node(np, childnp) { 3970ad6125bSBoris BREZILLON clk_id = of_match_node(pmc_clk_ids, childnp); 3980ad6125bSBoris BREZILLON if (!clk_id) 3990ad6125bSBoris BREZILLON continue; 4000ad6125bSBoris BREZILLON clk_setup = clk_id->data; 4010ad6125bSBoris BREZILLON clk_setup(childnp, pmc); 4020ad6125bSBoris BREZILLON } 4030ad6125bSBoris BREZILLON } 4040ad6125bSBoris BREZILLON 4050ad6125bSBoris BREZILLON static void __init of_at91rm9200_pmc_setup(struct device_node *np) 4060ad6125bSBoris BREZILLON { 4070ad6125bSBoris BREZILLON of_at91_pmc_setup(np, &at91rm9200_caps); 4080ad6125bSBoris BREZILLON } 4090ad6125bSBoris BREZILLON CLK_OF_DECLARE(at91rm9200_clk_pmc, "atmel,at91rm9200-pmc", 4100ad6125bSBoris BREZILLON of_at91rm9200_pmc_setup); 4110ad6125bSBoris BREZILLON 4120ad6125bSBoris BREZILLON static void __init of_at91sam9260_pmc_setup(struct device_node *np) 4130ad6125bSBoris BREZILLON { 4140ad6125bSBoris BREZILLON of_at91_pmc_setup(np, &at91sam9260_caps); 4150ad6125bSBoris BREZILLON } 4160ad6125bSBoris BREZILLON CLK_OF_DECLARE(at91sam9260_clk_pmc, "atmel,at91sam9260-pmc", 4170ad6125bSBoris BREZILLON of_at91sam9260_pmc_setup); 4180ad6125bSBoris BREZILLON 4190ad6125bSBoris BREZILLON static void __init of_at91sam9g45_pmc_setup(struct device_node *np) 4200ad6125bSBoris BREZILLON { 4210ad6125bSBoris BREZILLON of_at91_pmc_setup(np, &at91sam9g45_caps); 4220ad6125bSBoris BREZILLON } 4230ad6125bSBoris BREZILLON CLK_OF_DECLARE(at91sam9g45_clk_pmc, "atmel,at91sam9g45-pmc", 4240ad6125bSBoris BREZILLON of_at91sam9g45_pmc_setup); 4250ad6125bSBoris BREZILLON 4260ad6125bSBoris BREZILLON static void __init of_at91sam9n12_pmc_setup(struct device_node *np) 4270ad6125bSBoris BREZILLON { 4280ad6125bSBoris BREZILLON of_at91_pmc_setup(np, &at91sam9n12_caps); 4290ad6125bSBoris BREZILLON } 4300ad6125bSBoris BREZILLON CLK_OF_DECLARE(at91sam9n12_clk_pmc, "atmel,at91sam9n12-pmc", 4310ad6125bSBoris BREZILLON of_at91sam9n12_pmc_setup); 4320ad6125bSBoris BREZILLON 4330ad6125bSBoris BREZILLON static void __init of_at91sam9x5_pmc_setup(struct device_node *np) 4340ad6125bSBoris BREZILLON { 4350ad6125bSBoris BREZILLON of_at91_pmc_setup(np, &at91sam9x5_caps); 4360ad6125bSBoris BREZILLON } 4370ad6125bSBoris BREZILLON CLK_OF_DECLARE(at91sam9x5_clk_pmc, "atmel,at91sam9x5-pmc", 4380ad6125bSBoris BREZILLON of_at91sam9x5_pmc_setup); 4390ad6125bSBoris BREZILLON 4400ad6125bSBoris BREZILLON static void __init of_sama5d3_pmc_setup(struct device_node *np) 4410ad6125bSBoris BREZILLON { 4420ad6125bSBoris BREZILLON of_at91_pmc_setup(np, &sama5d3_caps); 4430ad6125bSBoris BREZILLON } 4440ad6125bSBoris BREZILLON CLK_OF_DECLARE(sama5d3_clk_pmc, "atmel,sama5d3-pmc", 4450ad6125bSBoris BREZILLON of_sama5d3_pmc_setup); 446