1 // SPDX-License-Identifier: GPL-2.0+ 2 // 3 // OWL common clock driver 4 // 5 // Copyright (c) 2014 Actions Semi Inc. 6 // Author: David Liu <liuwei@actions-semi.com> 7 // 8 // Copyright (c) 2018 Linaro Ltd. 9 // Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 10 11 #include <linux/of_address.h> 12 #include <linux/of_platform.h> 13 #include <linux/platform_device.h> 14 #include <linux/regmap.h> 15 16 #include "owl-common.h" 17 18 static const struct regmap_config owl_regmap_config = { 19 .reg_bits = 32, 20 .reg_stride = 4, 21 .val_bits = 32, 22 .max_register = 0x00cc, 23 .fast_io = true, 24 }; 25 26 static void owl_clk_set_regmap(const struct owl_clk_desc *desc, 27 struct regmap *regmap) 28 { 29 int i; 30 struct owl_clk_common *clks; 31 32 for (i = 0; i < desc->num_clks; i++) { 33 clks = desc->clks[i]; 34 if (!clks) 35 continue; 36 37 clks->regmap = regmap; 38 } 39 } 40 41 int owl_clk_regmap_init(struct platform_device *pdev, 42 struct owl_clk_desc *desc) 43 { 44 void __iomem *base; 45 struct regmap *regmap; 46 struct resource *res; 47 48 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 49 base = devm_ioremap_resource(&pdev->dev, res); 50 if (IS_ERR(base)) 51 return PTR_ERR(base); 52 53 regmap = devm_regmap_init_mmio(&pdev->dev, base, &owl_regmap_config); 54 if (IS_ERR(regmap)) { 55 pr_err("failed to init regmap\n"); 56 return PTR_ERR(regmap); 57 } 58 59 owl_clk_set_regmap(desc, regmap); 60 desc->regmap = regmap; 61 62 return 0; 63 } 64 65 int owl_clk_probe(struct device *dev, struct clk_hw_onecell_data *hw_clks) 66 { 67 int i, ret; 68 struct clk_hw *hw; 69 70 for (i = 0; i < hw_clks->num; i++) { 71 const char *name; 72 73 hw = hw_clks->hws[i]; 74 if (IS_ERR_OR_NULL(hw)) 75 continue; 76 77 name = hw->init->name; 78 ret = devm_clk_hw_register(dev, hw); 79 if (ret) { 80 dev_err(dev, "Couldn't register clock %d - %s\n", 81 i, name); 82 return ret; 83 } 84 } 85 86 ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, hw_clks); 87 if (ret) 88 dev_err(dev, "Failed to add clock provider\n"); 89 90 return ret; 91 } 92