1 /***************************************************************************** 2 * 3 * Author: Xilinx, Inc. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License as published by the 7 * Free Software Foundation; either version 2 of the License, or (at your 8 * option) any later version. 9 * 10 * XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" 11 * AS A COURTESY TO YOU, SOLELY FOR USE IN DEVELOPING PROGRAMS AND 12 * SOLUTIONS FOR XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE, 13 * OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, 14 * APPLICATION OR STANDARD, XILINX IS MAKING NO REPRESENTATION 15 * THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT, 16 * AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE 17 * FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY 18 * WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE 19 * IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR 20 * REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF 21 * INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 22 * FOR A PARTICULAR PURPOSE. 23 * 24 * Xilinx products are not intended for use in life support appliances, 25 * devices, or systems. Use in such applications is expressly prohibited. 26 * 27 * (c) Copyright 2003-2007 Xilinx Inc. 28 * All rights reserved. 29 * 30 * You should have received a copy of the GNU General Public License along 31 * with this program; if not, write to the Free Software Foundation, Inc., 32 * 675 Mass Ave, Cambridge, MA 02139, USA. 33 * 34 *****************************************************************************/ 35 36 #ifndef XILINX_HWICAP_H_ /* prevent circular inclusions */ 37 #define XILINX_HWICAP_H_ /* by using protection macros */ 38 39 #include <linux/types.h> 40 #include <linux/cdev.h> 41 #include <linux/version.h> 42 #include <linux/platform_device.h> 43 44 #include <asm/io.h> 45 46 struct hwicap_drvdata { 47 u32 write_buffer_in_use; /* Always in [0,3] */ 48 u8 write_buffer[4]; 49 u32 read_buffer_in_use; /* Always in [0,3] */ 50 u8 read_buffer[4]; 51 resource_size_t mem_start;/* phys. address of the control registers */ 52 resource_size_t mem_end; /* phys. address of the control registers */ 53 resource_size_t mem_size; 54 void __iomem *base_address;/* virt. address of the control registers */ 55 56 struct device *dev; 57 struct cdev cdev; /* Char device structure */ 58 dev_t devt; 59 60 const struct hwicap_driver_config *config; 61 const struct config_registers *config_regs; 62 void *private_data; 63 bool is_open; 64 struct mutex sem; 65 }; 66 67 struct hwicap_driver_config { 68 int (*get_configuration)(struct hwicap_drvdata *drvdata, u32 *data, 69 u32 size); 70 int (*set_configuration)(struct hwicap_drvdata *drvdata, u32 *data, 71 u32 size); 72 void (*reset)(struct hwicap_drvdata *drvdata); 73 }; 74 75 /* Number of times to poll the done regsiter */ 76 #define XHI_MAX_RETRIES 10 77 78 /************ Constant Definitions *************/ 79 80 #define XHI_PAD_FRAMES 0x1 81 82 /* Mask for calculating configuration packet headers */ 83 #define XHI_WORD_COUNT_MASK_TYPE_1 0x7FFUL 84 #define XHI_WORD_COUNT_MASK_TYPE_2 0x1FFFFFUL 85 #define XHI_TYPE_MASK 0x7 86 #define XHI_REGISTER_MASK 0xF 87 #define XHI_OP_MASK 0x3 88 89 #define XHI_TYPE_SHIFT 29 90 #define XHI_REGISTER_SHIFT 13 91 #define XHI_OP_SHIFT 27 92 93 #define XHI_TYPE_1 1 94 #define XHI_TYPE_2 2 95 #define XHI_OP_WRITE 2 96 #define XHI_OP_READ 1 97 98 /* Address Block Types */ 99 #define XHI_FAR_CLB_BLOCK 0 100 #define XHI_FAR_BRAM_BLOCK 1 101 #define XHI_FAR_BRAM_INT_BLOCK 2 102 103 struct config_registers { 104 u32 CRC; 105 u32 FAR; 106 u32 FDRI; 107 u32 FDRO; 108 u32 CMD; 109 u32 CTL; 110 u32 MASK; 111 u32 STAT; 112 u32 LOUT; 113 u32 COR; 114 u32 MFWR; 115 u32 FLR; 116 u32 KEY; 117 u32 CBC; 118 u32 IDCODE; 119 u32 AXSS; 120 u32 C0R_1; 121 u32 CSOB; 122 u32 WBSTAR; 123 u32 TIMER; 124 u32 BOOTSTS; 125 u32 CTL_1; 126 }; 127 128 /* Configuration Commands */ 129 #define XHI_CMD_NULL 0 130 #define XHI_CMD_WCFG 1 131 #define XHI_CMD_MFW 2 132 #define XHI_CMD_DGHIGH 3 133 #define XHI_CMD_RCFG 4 134 #define XHI_CMD_START 5 135 #define XHI_CMD_RCAP 6 136 #define XHI_CMD_RCRC 7 137 #define XHI_CMD_AGHIGH 8 138 #define XHI_CMD_SWITCH 9 139 #define XHI_CMD_GRESTORE 10 140 #define XHI_CMD_SHUTDOWN 11 141 #define XHI_CMD_GCAPTURE 12 142 #define XHI_CMD_DESYNCH 13 143 #define XHI_CMD_IPROG 15 /* Only in Virtex5 */ 144 #define XHI_CMD_CRCC 16 /* Only in Virtex5 */ 145 #define XHI_CMD_LTIMER 17 /* Only in Virtex5 */ 146 147 /* Packet constants */ 148 #define XHI_SYNC_PACKET 0xAA995566UL 149 #define XHI_DUMMY_PACKET 0xFFFFFFFFUL 150 #define XHI_NOOP_PACKET (XHI_TYPE_1 << XHI_TYPE_SHIFT) 151 #define XHI_TYPE_2_READ ((XHI_TYPE_2 << XHI_TYPE_SHIFT) | \ 152 (XHI_OP_READ << XHI_OP_SHIFT)) 153 154 #define XHI_TYPE_2_WRITE ((XHI_TYPE_2 << XHI_TYPE_SHIFT) | \ 155 (XHI_OP_WRITE << XHI_OP_SHIFT)) 156 157 #define XHI_TYPE2_CNT_MASK 0x07FFFFFF 158 159 #define XHI_TYPE_1_PACKET_MAX_WORDS 2047UL 160 #define XHI_TYPE_1_HEADER_BYTES 4 161 #define XHI_TYPE_2_HEADER_BYTES 8 162 163 /* Constant to use for CRC check when CRC has been disabled */ 164 #define XHI_DISABLED_AUTO_CRC 0x0000DEFCUL 165 166 /** 167 * hwicap_type_1_read - Generates a Type 1 read packet header. 168 * @reg: is the address of the register to be read back. 169 * 170 * Generates a Type 1 read packet header, which is used to indirectly 171 * read registers in the configuration logic. This packet must then 172 * be sent through the icap device, and a return packet received with 173 * the information. 174 **/ 175 static inline u32 hwicap_type_1_read(u32 reg) 176 { 177 return (XHI_TYPE_1 << XHI_TYPE_SHIFT) | 178 (reg << XHI_REGISTER_SHIFT) | 179 (XHI_OP_READ << XHI_OP_SHIFT); 180 } 181 182 /** 183 * hwicap_type_1_write - Generates a Type 1 write packet header 184 * @reg: is the address of the register to be read back. 185 **/ 186 static inline u32 hwicap_type_1_write(u32 reg) 187 { 188 return (XHI_TYPE_1 << XHI_TYPE_SHIFT) | 189 (reg << XHI_REGISTER_SHIFT) | 190 (XHI_OP_WRITE << XHI_OP_SHIFT); 191 } 192 193 #endif 194