1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright 2020 Google Inc. 4 * 5 * Based on Infineon TPM driver by Peter Huewe. 6 * 7 * cr50 is a firmware for H1 secure modules that requires special 8 * handling for the I2C interface. 9 * 10 * - Use an interrupt for transaction status instead of hardcoded delays. 11 * - Must use write+wait+read read protocol. 12 * - All 4 bytes of status register must be read/written at once. 13 * - Burst count max is 63 bytes, and burst count behaves slightly differently 14 * than other I2C TPMs. 15 * - When reading from FIFO the full burstcnt must be read instead of just 16 * reading header and determining the remainder. 17 */ 18 19 #include <linux/acpi.h> 20 #include <linux/completion.h> 21 #include <linux/i2c.h> 22 #include <linux/interrupt.h> 23 #include <linux/module.h> 24 #include <linux/pm.h> 25 #include <linux/slab.h> 26 #include <linux/wait.h> 27 28 #include "tpm_tis_core.h" 29 30 #define TPM_CR50_MAX_BUFSIZE 64 31 #define TPM_CR50_TIMEOUT_SHORT_MS 2 /* Short timeout during transactions */ 32 #define TPM_CR50_TIMEOUT_NOIRQ_MS 20 /* Timeout for TPM ready without IRQ */ 33 #define TPM_CR50_I2C_DID_VID 0x00281ae0L /* Device and vendor ID reg value */ 34 #define TPM_TI50_I2C_DID_VID 0x504a6666L /* Device and vendor ID reg value */ 35 #define TPM_CR50_I2C_MAX_RETRIES 3 /* Max retries due to I2C errors */ 36 #define TPM_CR50_I2C_RETRY_DELAY_LO 55 /* Min usecs between retries on I2C */ 37 #define TPM_CR50_I2C_RETRY_DELAY_HI 65 /* Max usecs between retries on I2C */ 38 39 #define TPM_I2C_ACCESS(l) (0x0000 | ((l) << 4)) 40 #define TPM_I2C_STS(l) (0x0001 | ((l) << 4)) 41 #define TPM_I2C_DATA_FIFO(l) (0x0005 | ((l) << 4)) 42 #define TPM_I2C_DID_VID(l) (0x0006 | ((l) << 4)) 43 44 /** 45 * struct tpm_i2c_cr50_priv_data - Driver private data. 46 * @irq: Irq number used for this chip. 47 * If irq <= 0, then a fixed timeout is used instead of waiting for irq. 48 * @tpm_ready: Struct used by irq handler to signal R/W readiness. 49 * @buf: Buffer used for i2c writes, with i2c address prepended to content. 50 * 51 * Private driver struct used by kernel threads and interrupt context. 52 */ 53 struct tpm_i2c_cr50_priv_data { 54 int irq; 55 struct completion tpm_ready; 56 u8 buf[TPM_CR50_MAX_BUFSIZE]; 57 }; 58 59 /** 60 * tpm_cr50_i2c_int_handler() - cr50 interrupt handler. 61 * @dummy: Unused parameter. 62 * @tpm_info: TPM chip information. 63 * 64 * The cr50 interrupt handler signals waiting threads that the 65 * interrupt has been asserted. It does not do any interrupt triggered 66 * processing but is instead used to avoid fixed delays. 67 * 68 * Return: 69 * IRQ_HANDLED signifies irq was handled by this device. 70 */ 71 static irqreturn_t tpm_cr50_i2c_int_handler(int dummy, void *tpm_info) 72 { 73 struct tpm_chip *chip = tpm_info; 74 struct tpm_i2c_cr50_priv_data *priv = dev_get_drvdata(&chip->dev); 75 76 complete(&priv->tpm_ready); 77 78 return IRQ_HANDLED; 79 } 80 81 /** 82 * tpm_cr50_i2c_wait_tpm_ready() - Wait for tpm to signal ready. 83 * @chip: A TPM chip. 84 * 85 * Wait for completion interrupt if available, otherwise use a fixed 86 * delay for the TPM to be ready. 87 * 88 * Return: 89 * - 0: Success. 90 * - -errno: A POSIX error code. 91 */ 92 static int tpm_cr50_i2c_wait_tpm_ready(struct tpm_chip *chip) 93 { 94 struct tpm_i2c_cr50_priv_data *priv = dev_get_drvdata(&chip->dev); 95 96 /* Use a safe fixed delay if interrupt is not supported */ 97 if (priv->irq <= 0) { 98 msleep(TPM_CR50_TIMEOUT_NOIRQ_MS); 99 return 0; 100 } 101 102 /* Wait for interrupt to indicate TPM is ready to respond */ 103 if (!wait_for_completion_timeout(&priv->tpm_ready, 104 msecs_to_jiffies(chip->timeout_a))) { 105 dev_warn(&chip->dev, "Timeout waiting for TPM ready\n"); 106 return -ETIMEDOUT; 107 } 108 109 return 0; 110 } 111 112 /** 113 * tpm_cr50_i2c_enable_tpm_irq() - Enable TPM irq. 114 * @chip: A TPM chip. 115 */ 116 static void tpm_cr50_i2c_enable_tpm_irq(struct tpm_chip *chip) 117 { 118 struct tpm_i2c_cr50_priv_data *priv = dev_get_drvdata(&chip->dev); 119 120 if (priv->irq > 0) { 121 reinit_completion(&priv->tpm_ready); 122 enable_irq(priv->irq); 123 } 124 } 125 126 /** 127 * tpm_cr50_i2c_disable_tpm_irq() - Disable TPM irq. 128 * @chip: A TPM chip. 129 */ 130 static void tpm_cr50_i2c_disable_tpm_irq(struct tpm_chip *chip) 131 { 132 struct tpm_i2c_cr50_priv_data *priv = dev_get_drvdata(&chip->dev); 133 134 if (priv->irq > 0) 135 disable_irq(priv->irq); 136 } 137 138 /** 139 * tpm_cr50_i2c_transfer_message() - Transfer a message over i2c. 140 * @dev: Device information. 141 * @adapter: I2C adapter. 142 * @msg: Message to transfer. 143 * 144 * Call unlocked i2c transfer routine with the provided parameters and 145 * retry in case of bus errors. 146 * 147 * Return: 148 * - 0: Success. 149 * - -errno: A POSIX error code. 150 */ 151 static int tpm_cr50_i2c_transfer_message(struct device *dev, 152 struct i2c_adapter *adapter, 153 struct i2c_msg *msg) 154 { 155 unsigned int try; 156 int rc; 157 158 for (try = 0; try < TPM_CR50_I2C_MAX_RETRIES; try++) { 159 rc = __i2c_transfer(adapter, msg, 1); 160 if (rc == 1) 161 return 0; /* Successfully transferred the message */ 162 if (try) 163 dev_warn(dev, "i2c transfer failed (attempt %d/%d): %d\n", 164 try + 1, TPM_CR50_I2C_MAX_RETRIES, rc); 165 usleep_range(TPM_CR50_I2C_RETRY_DELAY_LO, TPM_CR50_I2C_RETRY_DELAY_HI); 166 } 167 168 /* No i2c message transferred */ 169 return -EIO; 170 } 171 172 /** 173 * tpm_cr50_i2c_read() - Read from TPM register. 174 * @chip: A TPM chip. 175 * @addr: Register address to read from. 176 * @buffer: Read destination, provided by caller. 177 * @len: Number of bytes to read. 178 * 179 * Sends the register address byte to the TPM, then waits until TPM 180 * is ready via interrupt signal or timeout expiration, then 'len' 181 * bytes are read from TPM response into the provided 'buffer'. 182 * 183 * Return: 184 * - 0: Success. 185 * - -errno: A POSIX error code. 186 */ 187 static int tpm_cr50_i2c_read(struct tpm_chip *chip, u8 addr, u8 *buffer, size_t len) 188 { 189 struct i2c_client *client = to_i2c_client(chip->dev.parent); 190 struct i2c_msg msg_reg_addr = { 191 .addr = client->addr, 192 .len = 1, 193 .buf = &addr 194 }; 195 struct i2c_msg msg_response = { 196 .addr = client->addr, 197 .flags = I2C_M_RD, 198 .len = len, 199 .buf = buffer 200 }; 201 int rc; 202 203 i2c_lock_bus(client->adapter, I2C_LOCK_SEGMENT); 204 205 /* Prepare for completion interrupt */ 206 tpm_cr50_i2c_enable_tpm_irq(chip); 207 208 /* Send the register address byte to the TPM */ 209 rc = tpm_cr50_i2c_transfer_message(&chip->dev, client->adapter, &msg_reg_addr); 210 if (rc < 0) 211 goto out; 212 213 /* Wait for TPM to be ready with response data */ 214 rc = tpm_cr50_i2c_wait_tpm_ready(chip); 215 if (rc < 0) 216 goto out; 217 218 /* Read response data from the TPM */ 219 rc = tpm_cr50_i2c_transfer_message(&chip->dev, client->adapter, &msg_response); 220 221 out: 222 tpm_cr50_i2c_disable_tpm_irq(chip); 223 i2c_unlock_bus(client->adapter, I2C_LOCK_SEGMENT); 224 225 if (rc < 0) 226 return rc; 227 228 return 0; 229 } 230 231 /** 232 * tpm_cr50_i2c_write()- Write to TPM register. 233 * @chip: A TPM chip. 234 * @addr: Register address to write to. 235 * @buffer: Data to write. 236 * @len: Number of bytes to write. 237 * 238 * The provided address is prepended to the data in 'buffer', the 239 * cobined address+data is sent to the TPM, then wait for TPM to 240 * indicate it is done writing. 241 * 242 * Return: 243 * - 0: Success. 244 * - -errno: A POSIX error code. 245 */ 246 static int tpm_cr50_i2c_write(struct tpm_chip *chip, u8 addr, u8 *buffer, 247 size_t len) 248 { 249 struct tpm_i2c_cr50_priv_data *priv = dev_get_drvdata(&chip->dev); 250 struct i2c_client *client = to_i2c_client(chip->dev.parent); 251 struct i2c_msg msg = { 252 .addr = client->addr, 253 .len = len + 1, 254 .buf = priv->buf 255 }; 256 int rc; 257 258 if (len > TPM_CR50_MAX_BUFSIZE - 1) 259 return -EINVAL; 260 261 /* Prepend the 'register address' to the buffer */ 262 priv->buf[0] = addr; 263 memcpy(priv->buf + 1, buffer, len); 264 265 i2c_lock_bus(client->adapter, I2C_LOCK_SEGMENT); 266 267 /* Prepare for completion interrupt */ 268 tpm_cr50_i2c_enable_tpm_irq(chip); 269 270 /* Send write request buffer with address */ 271 rc = tpm_cr50_i2c_transfer_message(&chip->dev, client->adapter, &msg); 272 if (rc < 0) 273 goto out; 274 275 /* Wait for TPM to be ready, ignore timeout */ 276 tpm_cr50_i2c_wait_tpm_ready(chip); 277 278 out: 279 tpm_cr50_i2c_disable_tpm_irq(chip); 280 i2c_unlock_bus(client->adapter, I2C_LOCK_SEGMENT); 281 282 if (rc < 0) 283 return rc; 284 285 return 0; 286 } 287 288 /** 289 * tpm_cr50_check_locality() - Verify TPM locality 0 is active. 290 * @chip: A TPM chip. 291 * 292 * Return: 293 * - 0: Success. 294 * - -errno: A POSIX error code. 295 */ 296 static int tpm_cr50_check_locality(struct tpm_chip *chip) 297 { 298 u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY; 299 u8 buf; 300 int rc; 301 302 rc = tpm_cr50_i2c_read(chip, TPM_I2C_ACCESS(0), &buf, sizeof(buf)); 303 if (rc < 0) 304 return rc; 305 306 if ((buf & mask) == mask) 307 return 0; 308 309 return -EIO; 310 } 311 312 /** 313 * tpm_cr50_release_locality() - Release TPM locality. 314 * @chip: A TPM chip. 315 * @force: Flag to force release if set. 316 */ 317 static void tpm_cr50_release_locality(struct tpm_chip *chip, bool force) 318 { 319 u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_REQUEST_PENDING; 320 u8 addr = TPM_I2C_ACCESS(0); 321 u8 buf; 322 323 if (tpm_cr50_i2c_read(chip, addr, &buf, sizeof(buf)) < 0) 324 return; 325 326 if (force || (buf & mask) == mask) { 327 buf = TPM_ACCESS_ACTIVE_LOCALITY; 328 tpm_cr50_i2c_write(chip, addr, &buf, sizeof(buf)); 329 } 330 } 331 332 /** 333 * tpm_cr50_request_locality() - Request TPM locality 0. 334 * @chip: A TPM chip. 335 * 336 * Return: 337 * - 0: Success. 338 * - -errno: A POSIX error code. 339 */ 340 static int tpm_cr50_request_locality(struct tpm_chip *chip) 341 { 342 u8 buf = TPM_ACCESS_REQUEST_USE; 343 unsigned long stop; 344 int rc; 345 346 if (!tpm_cr50_check_locality(chip)) 347 return 0; 348 349 rc = tpm_cr50_i2c_write(chip, TPM_I2C_ACCESS(0), &buf, sizeof(buf)); 350 if (rc < 0) 351 return rc; 352 353 stop = jiffies + chip->timeout_a; 354 do { 355 if (!tpm_cr50_check_locality(chip)) 356 return 0; 357 358 msleep(TPM_CR50_TIMEOUT_SHORT_MS); 359 } while (time_before(jiffies, stop)); 360 361 return -ETIMEDOUT; 362 } 363 364 /** 365 * tpm_cr50_i2c_tis_status() - Read cr50 tis status. 366 * @chip: A TPM chip. 367 * 368 * cr50 requires all 4 bytes of status register to be read. 369 * 370 * Return: 371 * TPM status byte. 372 */ 373 static u8 tpm_cr50_i2c_tis_status(struct tpm_chip *chip) 374 { 375 u8 buf[4]; 376 377 if (tpm_cr50_i2c_read(chip, TPM_I2C_STS(0), buf, sizeof(buf)) < 0) 378 return 0; 379 380 return buf[0]; 381 } 382 383 /** 384 * tpm_cr50_i2c_tis_set_ready() - Set status register to ready. 385 * @chip: A TPM chip. 386 * 387 * cr50 requires all 4 bytes of status register to be written. 388 */ 389 static void tpm_cr50_i2c_tis_set_ready(struct tpm_chip *chip) 390 { 391 u8 buf[4] = { TPM_STS_COMMAND_READY }; 392 393 tpm_cr50_i2c_write(chip, TPM_I2C_STS(0), buf, sizeof(buf)); 394 msleep(TPM_CR50_TIMEOUT_SHORT_MS); 395 } 396 397 /** 398 * tpm_cr50_i2c_get_burst_and_status() - Get burst count and status. 399 * @chip: A TPM chip. 400 * @mask: Status mask. 401 * @burst: Return value for burst. 402 * @status: Return value for status. 403 * 404 * cr50 uses bytes 3:2 of status register for burst count and 405 * all 4 bytes must be read. 406 * 407 * Return: 408 * - 0: Success. 409 * - -errno: A POSIX error code. 410 */ 411 static int tpm_cr50_i2c_get_burst_and_status(struct tpm_chip *chip, u8 mask, 412 size_t *burst, u32 *status) 413 { 414 unsigned long stop; 415 u8 buf[4]; 416 417 *status = 0; 418 419 /* wait for burstcount */ 420 stop = jiffies + chip->timeout_b; 421 422 do { 423 if (tpm_cr50_i2c_read(chip, TPM_I2C_STS(0), buf, sizeof(buf)) < 0) { 424 msleep(TPM_CR50_TIMEOUT_SHORT_MS); 425 continue; 426 } 427 428 *status = *buf; 429 *burst = le16_to_cpup((__le16 *)(buf + 1)); 430 431 if ((*status & mask) == mask && 432 *burst > 0 && *burst <= TPM_CR50_MAX_BUFSIZE - 1) 433 return 0; 434 435 msleep(TPM_CR50_TIMEOUT_SHORT_MS); 436 } while (time_before(jiffies, stop)); 437 438 dev_err(&chip->dev, "Timeout reading burst and status\n"); 439 return -ETIMEDOUT; 440 } 441 442 /** 443 * tpm_cr50_i2c_tis_recv() - TPM reception callback. 444 * @chip: A TPM chip. 445 * @buf: Reception buffer. 446 * @buf_len: Buffer length to read. 447 * 448 * Return: 449 * - >= 0: Number of read bytes. 450 * - -errno: A POSIX error code. 451 */ 452 static int tpm_cr50_i2c_tis_recv(struct tpm_chip *chip, u8 *buf, size_t buf_len) 453 { 454 455 u8 mask = TPM_STS_VALID | TPM_STS_DATA_AVAIL; 456 size_t burstcnt, cur, len, expected; 457 u8 addr = TPM_I2C_DATA_FIFO(0); 458 u32 status; 459 int rc; 460 461 if (buf_len < TPM_HEADER_SIZE) 462 return -EINVAL; 463 464 rc = tpm_cr50_i2c_get_burst_and_status(chip, mask, &burstcnt, &status); 465 if (rc < 0) 466 goto out_err; 467 468 if (burstcnt > buf_len || burstcnt < TPM_HEADER_SIZE) { 469 dev_err(&chip->dev, 470 "Unexpected burstcnt: %zu (max=%zu, min=%d)\n", 471 burstcnt, buf_len, TPM_HEADER_SIZE); 472 rc = -EIO; 473 goto out_err; 474 } 475 476 /* Read first chunk of burstcnt bytes */ 477 rc = tpm_cr50_i2c_read(chip, addr, buf, burstcnt); 478 if (rc < 0) { 479 dev_err(&chip->dev, "Read of first chunk failed\n"); 480 goto out_err; 481 } 482 483 /* Determine expected data in the return buffer */ 484 expected = be32_to_cpup((__be32 *)(buf + 2)); 485 if (expected > buf_len) { 486 dev_err(&chip->dev, "Buffer too small to receive i2c data\n"); 487 rc = -E2BIG; 488 goto out_err; 489 } 490 491 /* Now read the rest of the data */ 492 cur = burstcnt; 493 while (cur < expected) { 494 /* Read updated burst count and check status */ 495 rc = tpm_cr50_i2c_get_burst_and_status(chip, mask, &burstcnt, &status); 496 if (rc < 0) 497 goto out_err; 498 499 len = min_t(size_t, burstcnt, expected - cur); 500 rc = tpm_cr50_i2c_read(chip, addr, buf + cur, len); 501 if (rc < 0) { 502 dev_err(&chip->dev, "Read failed\n"); 503 goto out_err; 504 } 505 506 cur += len; 507 } 508 509 /* Ensure TPM is done reading data */ 510 rc = tpm_cr50_i2c_get_burst_and_status(chip, TPM_STS_VALID, &burstcnt, &status); 511 if (rc < 0) 512 goto out_err; 513 if (status & TPM_STS_DATA_AVAIL) { 514 dev_err(&chip->dev, "Data still available\n"); 515 rc = -EIO; 516 goto out_err; 517 } 518 519 tpm_cr50_release_locality(chip, false); 520 return cur; 521 522 out_err: 523 /* Abort current transaction if still pending */ 524 if (tpm_cr50_i2c_tis_status(chip) & TPM_STS_COMMAND_READY) 525 tpm_cr50_i2c_tis_set_ready(chip); 526 527 tpm_cr50_release_locality(chip, false); 528 return rc; 529 } 530 531 /** 532 * tpm_cr50_i2c_tis_send() - TPM transmission callback. 533 * @chip: A TPM chip. 534 * @buf: Buffer to send. 535 * @len: Buffer length. 536 * 537 * Return: 538 * - 0: Success. 539 * - -errno: A POSIX error code. 540 */ 541 static int tpm_cr50_i2c_tis_send(struct tpm_chip *chip, u8 *buf, size_t len) 542 { 543 size_t burstcnt, limit, sent = 0; 544 u8 tpm_go[4] = { TPM_STS_GO }; 545 unsigned long stop; 546 u32 status; 547 int rc; 548 549 rc = tpm_cr50_request_locality(chip); 550 if (rc < 0) 551 return rc; 552 553 /* Wait until TPM is ready for a command */ 554 stop = jiffies + chip->timeout_b; 555 while (!(tpm_cr50_i2c_tis_status(chip) & TPM_STS_COMMAND_READY)) { 556 if (time_after(jiffies, stop)) { 557 rc = -ETIMEDOUT; 558 goto out_err; 559 } 560 561 tpm_cr50_i2c_tis_set_ready(chip); 562 } 563 564 while (len > 0) { 565 u8 mask = TPM_STS_VALID; 566 567 /* Wait for data if this is not the first chunk */ 568 if (sent > 0) 569 mask |= TPM_STS_DATA_EXPECT; 570 571 /* Read burst count and check status */ 572 rc = tpm_cr50_i2c_get_burst_and_status(chip, mask, &burstcnt, &status); 573 if (rc < 0) 574 goto out_err; 575 576 /* 577 * Use burstcnt - 1 to account for the address byte 578 * that is inserted by tpm_cr50_i2c_write() 579 */ 580 limit = min_t(size_t, burstcnt - 1, len); 581 rc = tpm_cr50_i2c_write(chip, TPM_I2C_DATA_FIFO(0), &buf[sent], limit); 582 if (rc < 0) { 583 dev_err(&chip->dev, "Write failed\n"); 584 goto out_err; 585 } 586 587 sent += limit; 588 len -= limit; 589 } 590 591 /* Ensure TPM is not expecting more data */ 592 rc = tpm_cr50_i2c_get_burst_and_status(chip, TPM_STS_VALID, &burstcnt, &status); 593 if (rc < 0) 594 goto out_err; 595 if (status & TPM_STS_DATA_EXPECT) { 596 dev_err(&chip->dev, "Data still expected\n"); 597 rc = -EIO; 598 goto out_err; 599 } 600 601 /* Start the TPM command */ 602 rc = tpm_cr50_i2c_write(chip, TPM_I2C_STS(0), tpm_go, 603 sizeof(tpm_go)); 604 if (rc < 0) { 605 dev_err(&chip->dev, "Start command failed\n"); 606 goto out_err; 607 } 608 return 0; 609 610 out_err: 611 /* Abort current transaction if still pending */ 612 if (tpm_cr50_i2c_tis_status(chip) & TPM_STS_COMMAND_READY) 613 tpm_cr50_i2c_tis_set_ready(chip); 614 615 tpm_cr50_release_locality(chip, false); 616 return rc; 617 } 618 619 /** 620 * tpm_cr50_i2c_req_canceled() - Callback to notify a request cancel. 621 * @chip: A TPM chip. 622 * @status: Status given by the cancel callback. 623 * 624 * Return: 625 * True if command is ready, False otherwise. 626 */ 627 static bool tpm_cr50_i2c_req_canceled(struct tpm_chip *chip, u8 status) 628 { 629 return status == TPM_STS_COMMAND_READY; 630 } 631 632 static bool tpm_cr50_i2c_is_firmware_power_managed(struct device *dev) 633 { 634 u8 val; 635 int ret; 636 637 /* This flag should default true when the device property is not present */ 638 ret = device_property_read_u8(dev, "firmware-power-managed", &val); 639 if (ret) 640 return true; 641 642 return val; 643 } 644 645 static const struct tpm_class_ops cr50_i2c = { 646 .flags = TPM_OPS_AUTO_STARTUP, 647 .status = &tpm_cr50_i2c_tis_status, 648 .recv = &tpm_cr50_i2c_tis_recv, 649 .send = &tpm_cr50_i2c_tis_send, 650 .cancel = &tpm_cr50_i2c_tis_set_ready, 651 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 652 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 653 .req_canceled = &tpm_cr50_i2c_req_canceled, 654 }; 655 656 #ifdef CONFIG_ACPI 657 static const struct acpi_device_id cr50_i2c_acpi_id[] = { 658 { "GOOG0005", 0 }, 659 {} 660 }; 661 MODULE_DEVICE_TABLE(acpi, cr50_i2c_acpi_id); 662 #endif 663 664 #ifdef CONFIG_OF 665 static const struct of_device_id of_cr50_i2c_match[] = { 666 { .compatible = "google,cr50", }, 667 {} 668 }; 669 MODULE_DEVICE_TABLE(of, of_cr50_i2c_match); 670 #endif 671 672 /** 673 * tpm_cr50_i2c_probe() - Driver probe function. 674 * @client: I2C client information. 675 * @id: I2C device id. 676 * 677 * Return: 678 * - 0: Success. 679 * - -errno: A POSIX error code. 680 */ 681 static int tpm_cr50_i2c_probe(struct i2c_client *client) 682 { 683 struct tpm_i2c_cr50_priv_data *priv; 684 struct device *dev = &client->dev; 685 struct tpm_chip *chip; 686 u32 vendor; 687 u8 buf[4]; 688 int rc; 689 690 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) 691 return -ENODEV; 692 693 chip = tpmm_chip_alloc(dev, &cr50_i2c); 694 if (IS_ERR(chip)) 695 return PTR_ERR(chip); 696 697 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 698 if (!priv) 699 return -ENOMEM; 700 701 /* cr50 is a TPM 2.0 chip */ 702 chip->flags |= TPM_CHIP_FLAG_TPM2; 703 if (tpm_cr50_i2c_is_firmware_power_managed(dev)) 704 chip->flags |= TPM_CHIP_FLAG_FIRMWARE_POWER_MANAGED; 705 706 /* Default timeouts */ 707 chip->timeout_a = msecs_to_jiffies(TIS_SHORT_TIMEOUT); 708 chip->timeout_b = msecs_to_jiffies(TIS_LONG_TIMEOUT); 709 chip->timeout_c = msecs_to_jiffies(TIS_SHORT_TIMEOUT); 710 chip->timeout_d = msecs_to_jiffies(TIS_SHORT_TIMEOUT); 711 712 dev_set_drvdata(&chip->dev, priv); 713 init_completion(&priv->tpm_ready); 714 715 if (client->irq > 0) { 716 rc = devm_request_irq(dev, client->irq, tpm_cr50_i2c_int_handler, 717 IRQF_TRIGGER_FALLING | IRQF_ONESHOT | 718 IRQF_NO_AUTOEN, 719 dev->driver->name, chip); 720 if (rc < 0) { 721 dev_err(dev, "Failed to probe IRQ %d\n", client->irq); 722 return rc; 723 } 724 725 priv->irq = client->irq; 726 } else { 727 dev_warn(dev, "No IRQ, will use %ums delay for TPM ready\n", 728 TPM_CR50_TIMEOUT_NOIRQ_MS); 729 } 730 731 rc = tpm_cr50_request_locality(chip); 732 if (rc < 0) { 733 dev_err(dev, "Could not request locality\n"); 734 return rc; 735 } 736 737 /* Read four bytes from DID_VID register */ 738 rc = tpm_cr50_i2c_read(chip, TPM_I2C_DID_VID(0), buf, sizeof(buf)); 739 if (rc < 0) { 740 dev_err(dev, "Could not read vendor id\n"); 741 tpm_cr50_release_locality(chip, true); 742 return rc; 743 } 744 745 vendor = le32_to_cpup((__le32 *)buf); 746 if (vendor != TPM_CR50_I2C_DID_VID && vendor != TPM_TI50_I2C_DID_VID) { 747 dev_err(dev, "Vendor ID did not match! ID was %08x\n", vendor); 748 tpm_cr50_release_locality(chip, true); 749 return -ENODEV; 750 } 751 752 dev_info(dev, "%s TPM 2.0 (i2c 0x%02x irq %d id 0x%x)\n", 753 vendor == TPM_TI50_I2C_DID_VID ? "ti50" : "cr50", 754 client->addr, client->irq, vendor >> 16); 755 return tpm_chip_register(chip); 756 } 757 758 /** 759 * tpm_cr50_i2c_remove() - Driver remove function. 760 * @client: I2C client information. 761 * 762 * Return: 763 * - 0: Success. 764 * - -errno: A POSIX error code. 765 */ 766 static int tpm_cr50_i2c_remove(struct i2c_client *client) 767 { 768 struct tpm_chip *chip = i2c_get_clientdata(client); 769 struct device *dev = &client->dev; 770 771 if (!chip) { 772 dev_crit(dev, "Could not get client data at remove, memory corruption ahead\n"); 773 return 0; 774 } 775 776 tpm_chip_unregister(chip); 777 tpm_cr50_release_locality(chip, true); 778 779 return 0; 780 } 781 782 static SIMPLE_DEV_PM_OPS(cr50_i2c_pm, tpm_pm_suspend, tpm_pm_resume); 783 784 static struct i2c_driver cr50_i2c_driver = { 785 .probe_new = tpm_cr50_i2c_probe, 786 .remove = tpm_cr50_i2c_remove, 787 .driver = { 788 .name = "cr50_i2c", 789 .pm = &cr50_i2c_pm, 790 .acpi_match_table = ACPI_PTR(cr50_i2c_acpi_id), 791 .of_match_table = of_match_ptr(of_cr50_i2c_match), 792 }, 793 }; 794 795 module_i2c_driver(cr50_i2c_driver); 796 797 MODULE_DESCRIPTION("cr50 TPM I2C Driver"); 798 MODULE_LICENSE("GPL"); 799