1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2005, 2006 IBM Corporation 4 * Copyright (C) 2014, 2015 Intel Corporation 5 * 6 * Authors: 7 * Leendert van Doorn <leendert@watson.ibm.com> 8 * Kylene Hall <kjhall@us.ibm.com> 9 * 10 * Maintained by: <tpmdd-devel@lists.sourceforge.net> 11 * 12 * Device driver for TCG/TCPA TPM (trusted platform module). 13 * Specifications at www.trustedcomputinggroup.org 14 * 15 * This device driver implements the TPM interface as defined in 16 * the TCG TPM Interface Spec version 1.2, revision 1.0. 17 */ 18 #include <linux/init.h> 19 #include <linux/module.h> 20 #include <linux/moduleparam.h> 21 #include <linux/pnp.h> 22 #include <linux/slab.h> 23 #include <linux/interrupt.h> 24 #include <linux/wait.h> 25 #include <linux/acpi.h> 26 #include <linux/freezer.h> 27 #include "tpm.h" 28 #include "tpm_tis_core.h" 29 30 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value); 31 32 static bool wait_for_tpm_stat_cond(struct tpm_chip *chip, u8 mask, 33 bool check_cancel, bool *canceled) 34 { 35 u8 status = chip->ops->status(chip); 36 37 *canceled = false; 38 if ((status & mask) == mask) 39 return true; 40 if (check_cancel && chip->ops->req_canceled(chip, status)) { 41 *canceled = true; 42 return true; 43 } 44 return false; 45 } 46 47 static int wait_for_tpm_stat(struct tpm_chip *chip, u8 mask, 48 unsigned long timeout, wait_queue_head_t *queue, 49 bool check_cancel) 50 { 51 unsigned long stop; 52 long rc; 53 u8 status; 54 bool canceled = false; 55 56 /* check current status */ 57 status = chip->ops->status(chip); 58 if ((status & mask) == mask) 59 return 0; 60 61 stop = jiffies + timeout; 62 63 if (chip->flags & TPM_CHIP_FLAG_IRQ) { 64 again: 65 timeout = stop - jiffies; 66 if ((long)timeout <= 0) 67 return -ETIME; 68 rc = wait_event_interruptible_timeout(*queue, 69 wait_for_tpm_stat_cond(chip, mask, check_cancel, 70 &canceled), 71 timeout); 72 if (rc > 0) { 73 if (canceled) 74 return -ECANCELED; 75 return 0; 76 } 77 if (rc == -ERESTARTSYS && freezing(current)) { 78 clear_thread_flag(TIF_SIGPENDING); 79 goto again; 80 } 81 } else { 82 do { 83 usleep_range(TPM_TIMEOUT_USECS_MIN, 84 TPM_TIMEOUT_USECS_MAX); 85 status = chip->ops->status(chip); 86 if ((status & mask) == mask) 87 return 0; 88 } while (time_before(jiffies, stop)); 89 } 90 return -ETIME; 91 } 92 93 /* Before we attempt to access the TPM we must see that the valid bit is set. 94 * The specification says that this bit is 0 at reset and remains 0 until the 95 * 'TPM has gone through its self test and initialization and has established 96 * correct values in the other bits.' 97 */ 98 static int wait_startup(struct tpm_chip *chip, int l) 99 { 100 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 101 unsigned long stop = jiffies + chip->timeout_a; 102 103 do { 104 int rc; 105 u8 access; 106 107 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access); 108 if (rc < 0) 109 return rc; 110 111 if (access & TPM_ACCESS_VALID) 112 return 0; 113 tpm_msleep(TPM_TIMEOUT); 114 } while (time_before(jiffies, stop)); 115 return -1; 116 } 117 118 static bool check_locality(struct tpm_chip *chip, int l) 119 { 120 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 121 int rc; 122 u8 access; 123 124 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access); 125 if (rc < 0) 126 return false; 127 128 if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID 129 | TPM_ACCESS_REQUEST_USE)) == 130 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) { 131 priv->locality = l; 132 return true; 133 } 134 135 return false; 136 } 137 138 static int release_locality(struct tpm_chip *chip, int l) 139 { 140 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 141 142 tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY); 143 144 return 0; 145 } 146 147 static int request_locality(struct tpm_chip *chip, int l) 148 { 149 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 150 unsigned long stop, timeout; 151 long rc; 152 153 if (check_locality(chip, l)) 154 return l; 155 156 rc = tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE); 157 if (rc < 0) 158 return rc; 159 160 stop = jiffies + chip->timeout_a; 161 162 if (chip->flags & TPM_CHIP_FLAG_IRQ) { 163 again: 164 timeout = stop - jiffies; 165 if ((long)timeout <= 0) 166 return -1; 167 rc = wait_event_interruptible_timeout(priv->int_queue, 168 (check_locality 169 (chip, l)), 170 timeout); 171 if (rc > 0) 172 return l; 173 if (rc == -ERESTARTSYS && freezing(current)) { 174 clear_thread_flag(TIF_SIGPENDING); 175 goto again; 176 } 177 } else { 178 /* wait for burstcount */ 179 do { 180 if (check_locality(chip, l)) 181 return l; 182 tpm_msleep(TPM_TIMEOUT); 183 } while (time_before(jiffies, stop)); 184 } 185 return -1; 186 } 187 188 static u8 tpm_tis_status(struct tpm_chip *chip) 189 { 190 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 191 int rc; 192 u8 status; 193 194 rc = tpm_tis_read8(priv, TPM_STS(priv->locality), &status); 195 if (rc < 0) 196 return 0; 197 198 if (unlikely((status & TPM_STS_READ_ZERO) != 0)) { 199 /* 200 * If this trips, the chances are the read is 201 * returning 0xff because the locality hasn't been 202 * acquired. Usually because tpm_try_get_ops() hasn't 203 * been called before doing a TPM operation. 204 */ 205 WARN_ONCE(1, "TPM returned invalid status\n"); 206 return 0; 207 } 208 209 return status; 210 } 211 212 static void tpm_tis_ready(struct tpm_chip *chip) 213 { 214 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 215 216 /* this causes the current command to be aborted */ 217 tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_COMMAND_READY); 218 } 219 220 static int get_burstcount(struct tpm_chip *chip) 221 { 222 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 223 unsigned long stop; 224 int burstcnt, rc; 225 u32 value; 226 227 /* wait for burstcount */ 228 if (chip->flags & TPM_CHIP_FLAG_TPM2) 229 stop = jiffies + chip->timeout_a; 230 else 231 stop = jiffies + chip->timeout_d; 232 do { 233 rc = tpm_tis_read32(priv, TPM_STS(priv->locality), &value); 234 if (rc < 0) 235 return rc; 236 237 burstcnt = (value >> 8) & 0xFFFF; 238 if (burstcnt) 239 return burstcnt; 240 usleep_range(TPM_TIMEOUT_USECS_MIN, TPM_TIMEOUT_USECS_MAX); 241 } while (time_before(jiffies, stop)); 242 return -EBUSY; 243 } 244 245 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count) 246 { 247 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 248 int size = 0, burstcnt, rc; 249 250 while (size < count) { 251 rc = wait_for_tpm_stat(chip, 252 TPM_STS_DATA_AVAIL | TPM_STS_VALID, 253 chip->timeout_c, 254 &priv->read_queue, true); 255 if (rc < 0) 256 return rc; 257 burstcnt = get_burstcount(chip); 258 if (burstcnt < 0) { 259 dev_err(&chip->dev, "Unable to read burstcount\n"); 260 return burstcnt; 261 } 262 burstcnt = min_t(int, burstcnt, count - size); 263 264 rc = tpm_tis_read_bytes(priv, TPM_DATA_FIFO(priv->locality), 265 burstcnt, buf + size); 266 if (rc < 0) 267 return rc; 268 269 size += burstcnt; 270 } 271 return size; 272 } 273 274 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count) 275 { 276 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 277 int size = 0; 278 int status; 279 u32 expected; 280 281 if (count < TPM_HEADER_SIZE) { 282 size = -EIO; 283 goto out; 284 } 285 286 size = recv_data(chip, buf, TPM_HEADER_SIZE); 287 /* read first 10 bytes, including tag, paramsize, and result */ 288 if (size < TPM_HEADER_SIZE) { 289 dev_err(&chip->dev, "Unable to read header\n"); 290 goto out; 291 } 292 293 expected = be32_to_cpu(*(__be32 *) (buf + 2)); 294 if (expected > count || expected < TPM_HEADER_SIZE) { 295 size = -EIO; 296 goto out; 297 } 298 299 size += recv_data(chip, &buf[TPM_HEADER_SIZE], 300 expected - TPM_HEADER_SIZE); 301 if (size < expected) { 302 dev_err(&chip->dev, "Unable to read remainder of result\n"); 303 size = -ETIME; 304 goto out; 305 } 306 307 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c, 308 &priv->int_queue, false) < 0) { 309 size = -ETIME; 310 goto out; 311 } 312 status = tpm_tis_status(chip); 313 if (status & TPM_STS_DATA_AVAIL) { /* retry? */ 314 dev_err(&chip->dev, "Error left over data\n"); 315 size = -EIO; 316 goto out; 317 } 318 319 out: 320 tpm_tis_ready(chip); 321 return size; 322 } 323 324 /* 325 * If interrupts are used (signaled by an irq set in the vendor structure) 326 * tpm.c can skip polling for the data to be available as the interrupt is 327 * waited for here 328 */ 329 static int tpm_tis_send_data(struct tpm_chip *chip, const u8 *buf, size_t len) 330 { 331 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 332 int rc, status, burstcnt; 333 size_t count = 0; 334 bool itpm = priv->flags & TPM_TIS_ITPM_WORKAROUND; 335 336 status = tpm_tis_status(chip); 337 if ((status & TPM_STS_COMMAND_READY) == 0) { 338 tpm_tis_ready(chip); 339 if (wait_for_tpm_stat 340 (chip, TPM_STS_COMMAND_READY, chip->timeout_b, 341 &priv->int_queue, false) < 0) { 342 rc = -ETIME; 343 goto out_err; 344 } 345 } 346 347 while (count < len - 1) { 348 burstcnt = get_burstcount(chip); 349 if (burstcnt < 0) { 350 dev_err(&chip->dev, "Unable to read burstcount\n"); 351 rc = burstcnt; 352 goto out_err; 353 } 354 burstcnt = min_t(int, burstcnt, len - count - 1); 355 rc = tpm_tis_write_bytes(priv, TPM_DATA_FIFO(priv->locality), 356 burstcnt, buf + count); 357 if (rc < 0) 358 goto out_err; 359 360 count += burstcnt; 361 362 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c, 363 &priv->int_queue, false) < 0) { 364 rc = -ETIME; 365 goto out_err; 366 } 367 status = tpm_tis_status(chip); 368 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) { 369 rc = -EIO; 370 goto out_err; 371 } 372 } 373 374 /* write last byte */ 375 rc = tpm_tis_write8(priv, TPM_DATA_FIFO(priv->locality), buf[count]); 376 if (rc < 0) 377 goto out_err; 378 379 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c, 380 &priv->int_queue, false) < 0) { 381 rc = -ETIME; 382 goto out_err; 383 } 384 status = tpm_tis_status(chip); 385 if (!itpm && (status & TPM_STS_DATA_EXPECT) != 0) { 386 rc = -EIO; 387 goto out_err; 388 } 389 390 return 0; 391 392 out_err: 393 tpm_tis_ready(chip); 394 return rc; 395 } 396 397 static void disable_interrupts(struct tpm_chip *chip) 398 { 399 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 400 u32 intmask; 401 int rc; 402 403 if (priv->irq == 0) 404 return; 405 406 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask); 407 if (rc < 0) 408 intmask = 0; 409 410 intmask &= ~TPM_GLOBAL_INT_ENABLE; 411 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask); 412 413 devm_free_irq(chip->dev.parent, priv->irq, chip); 414 priv->irq = 0; 415 chip->flags &= ~TPM_CHIP_FLAG_IRQ; 416 } 417 418 /* 419 * If interrupts are used (signaled by an irq set in the vendor structure) 420 * tpm.c can skip polling for the data to be available as the interrupt is 421 * waited for here 422 */ 423 static int tpm_tis_send_main(struct tpm_chip *chip, const u8 *buf, size_t len) 424 { 425 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 426 int rc; 427 u32 ordinal; 428 unsigned long dur; 429 430 rc = tpm_tis_send_data(chip, buf, len); 431 if (rc < 0) 432 return rc; 433 434 /* go and do it */ 435 rc = tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_GO); 436 if (rc < 0) 437 goto out_err; 438 439 if (chip->flags & TPM_CHIP_FLAG_IRQ) { 440 ordinal = be32_to_cpu(*((__be32 *) (buf + 6))); 441 442 dur = tpm_calc_ordinal_duration(chip, ordinal); 443 if (wait_for_tpm_stat 444 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur, 445 &priv->read_queue, false) < 0) { 446 rc = -ETIME; 447 goto out_err; 448 } 449 } 450 return 0; 451 out_err: 452 tpm_tis_ready(chip); 453 return rc; 454 } 455 456 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len) 457 { 458 int rc, irq; 459 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 460 461 if (!(chip->flags & TPM_CHIP_FLAG_IRQ) || priv->irq_tested) 462 return tpm_tis_send_main(chip, buf, len); 463 464 /* Verify receipt of the expected IRQ */ 465 irq = priv->irq; 466 priv->irq = 0; 467 chip->flags &= ~TPM_CHIP_FLAG_IRQ; 468 rc = tpm_tis_send_main(chip, buf, len); 469 priv->irq = irq; 470 chip->flags |= TPM_CHIP_FLAG_IRQ; 471 if (!priv->irq_tested) 472 tpm_msleep(1); 473 if (!priv->irq_tested) 474 disable_interrupts(chip); 475 priv->irq_tested = true; 476 return rc; 477 } 478 479 struct tis_vendor_durations_override { 480 u32 did_vid; 481 struct tpm1_version version; 482 unsigned long durations[3]; 483 }; 484 485 static const struct tis_vendor_durations_override vendor_dur_overrides[] = { 486 /* STMicroelectronics 0x104a */ 487 { 0x0000104a, 488 { 1, 2, 8, 28 }, 489 { (2 * 60 * HZ), (2 * 60 * HZ), (2 * 60 * HZ) } }, 490 }; 491 492 static void tpm_tis_update_durations(struct tpm_chip *chip, 493 unsigned long *duration_cap) 494 { 495 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 496 struct tpm1_version *version; 497 u32 did_vid; 498 int i, rc; 499 cap_t cap; 500 501 chip->duration_adjusted = false; 502 503 if (chip->ops->clk_enable != NULL) 504 chip->ops->clk_enable(chip, true); 505 506 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid); 507 if (rc < 0) { 508 dev_warn(&chip->dev, "%s: failed to read did_vid. %d\n", 509 __func__, rc); 510 goto out; 511 } 512 513 /* Try to get a TPM version 1.2 or 1.1 TPM_CAP_VERSION_INFO */ 514 rc = tpm1_getcap(chip, TPM_CAP_VERSION_1_2, &cap, 515 "attempting to determine the 1.2 version", 516 sizeof(cap.version2)); 517 if (!rc) { 518 version = &cap.version2.version; 519 } else { 520 rc = tpm1_getcap(chip, TPM_CAP_VERSION_1_1, &cap, 521 "attempting to determine the 1.1 version", 522 sizeof(cap.version1)); 523 524 if (rc) 525 goto out; 526 527 version = &cap.version1; 528 } 529 530 for (i = 0; i != ARRAY_SIZE(vendor_dur_overrides); i++) { 531 if (vendor_dur_overrides[i].did_vid != did_vid) 532 continue; 533 534 if ((version->major == 535 vendor_dur_overrides[i].version.major) && 536 (version->minor == 537 vendor_dur_overrides[i].version.minor) && 538 (version->rev_major == 539 vendor_dur_overrides[i].version.rev_major) && 540 (version->rev_minor == 541 vendor_dur_overrides[i].version.rev_minor)) { 542 543 memcpy(duration_cap, 544 vendor_dur_overrides[i].durations, 545 sizeof(vendor_dur_overrides[i].durations)); 546 547 chip->duration_adjusted = true; 548 goto out; 549 } 550 } 551 552 out: 553 if (chip->ops->clk_enable != NULL) 554 chip->ops->clk_enable(chip, false); 555 } 556 557 struct tis_vendor_timeout_override { 558 u32 did_vid; 559 unsigned long timeout_us[4]; 560 }; 561 562 static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = { 563 /* Atmel 3204 */ 564 { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000), 565 (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } }, 566 }; 567 568 static void tpm_tis_update_timeouts(struct tpm_chip *chip, 569 unsigned long *timeout_cap) 570 { 571 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 572 int i, rc; 573 u32 did_vid; 574 575 chip->timeout_adjusted = false; 576 577 if (chip->ops->clk_enable != NULL) 578 chip->ops->clk_enable(chip, true); 579 580 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid); 581 if (rc < 0) { 582 dev_warn(&chip->dev, "%s: failed to read did_vid: %d\n", 583 __func__, rc); 584 goto out; 585 } 586 587 for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) { 588 if (vendor_timeout_overrides[i].did_vid != did_vid) 589 continue; 590 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us, 591 sizeof(vendor_timeout_overrides[i].timeout_us)); 592 chip->timeout_adjusted = true; 593 } 594 595 out: 596 if (chip->ops->clk_enable != NULL) 597 chip->ops->clk_enable(chip, false); 598 599 return; 600 } 601 602 /* 603 * Early probing for iTPM with STS_DATA_EXPECT flaw. 604 * Try sending command without itpm flag set and if that 605 * fails, repeat with itpm flag set. 606 */ 607 static int probe_itpm(struct tpm_chip *chip) 608 { 609 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 610 int rc = 0; 611 static const u8 cmd_getticks[] = { 612 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a, 613 0x00, 0x00, 0x00, 0xf1 614 }; 615 size_t len = sizeof(cmd_getticks); 616 u16 vendor; 617 618 if (priv->flags & TPM_TIS_ITPM_WORKAROUND) 619 return 0; 620 621 rc = tpm_tis_read16(priv, TPM_DID_VID(0), &vendor); 622 if (rc < 0) 623 return rc; 624 625 /* probe only iTPMS */ 626 if (vendor != TPM_VID_INTEL) 627 return 0; 628 629 if (request_locality(chip, 0) != 0) 630 return -EBUSY; 631 632 rc = tpm_tis_send_data(chip, cmd_getticks, len); 633 if (rc == 0) 634 goto out; 635 636 tpm_tis_ready(chip); 637 638 priv->flags |= TPM_TIS_ITPM_WORKAROUND; 639 640 rc = tpm_tis_send_data(chip, cmd_getticks, len); 641 if (rc == 0) 642 dev_info(&chip->dev, "Detected an iTPM.\n"); 643 else { 644 priv->flags &= ~TPM_TIS_ITPM_WORKAROUND; 645 rc = -EFAULT; 646 } 647 648 out: 649 tpm_tis_ready(chip); 650 release_locality(chip, priv->locality); 651 652 return rc; 653 } 654 655 static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status) 656 { 657 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 658 659 switch (priv->manufacturer_id) { 660 case TPM_VID_WINBOND: 661 return ((status == TPM_STS_VALID) || 662 (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY))); 663 case TPM_VID_STM: 664 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)); 665 default: 666 return (status == TPM_STS_COMMAND_READY); 667 } 668 } 669 670 static irqreturn_t tis_int_handler(int dummy, void *dev_id) 671 { 672 struct tpm_chip *chip = dev_id; 673 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 674 u32 interrupt; 675 int i, rc; 676 677 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt); 678 if (rc < 0) 679 return IRQ_NONE; 680 681 if (interrupt == 0) 682 return IRQ_NONE; 683 684 priv->irq_tested = true; 685 if (interrupt & TPM_INTF_DATA_AVAIL_INT) 686 wake_up_interruptible(&priv->read_queue); 687 if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT) 688 for (i = 0; i < 5; i++) 689 if (check_locality(chip, i)) 690 break; 691 if (interrupt & 692 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT | 693 TPM_INTF_CMD_READY_INT)) 694 wake_up_interruptible(&priv->int_queue); 695 696 /* Clear interrupts handled with TPM_EOI */ 697 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), interrupt); 698 if (rc < 0) 699 return IRQ_NONE; 700 701 tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt); 702 return IRQ_HANDLED; 703 } 704 705 static int tpm_tis_gen_interrupt(struct tpm_chip *chip) 706 { 707 const char *desc = "attempting to generate an interrupt"; 708 u32 cap2; 709 cap_t cap; 710 int ret; 711 712 ret = request_locality(chip, 0); 713 if (ret < 0) 714 return ret; 715 716 if (chip->flags & TPM_CHIP_FLAG_TPM2) 717 ret = tpm2_get_tpm_pt(chip, 0x100, &cap2, desc); 718 else 719 ret = tpm1_getcap(chip, TPM_CAP_PROP_TIS_TIMEOUT, &cap, desc, 0); 720 721 release_locality(chip, 0); 722 723 return ret; 724 } 725 726 /* Register the IRQ and issue a command that will cause an interrupt. If an 727 * irq is seen then leave the chip setup for IRQ operation, otherwise reverse 728 * everything and leave in polling mode. Returns 0 on success. 729 */ 730 static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask, 731 int flags, int irq) 732 { 733 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 734 u8 original_int_vec; 735 int rc; 736 u32 int_status; 737 738 if (devm_request_irq(chip->dev.parent, irq, tis_int_handler, flags, 739 dev_name(&chip->dev), chip) != 0) { 740 dev_info(&chip->dev, "Unable to request irq: %d for probe\n", 741 irq); 742 return -1; 743 } 744 priv->irq = irq; 745 746 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality), 747 &original_int_vec); 748 if (rc < 0) 749 return rc; 750 751 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), irq); 752 if (rc < 0) 753 return rc; 754 755 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &int_status); 756 if (rc < 0) 757 return rc; 758 759 /* Clear all existing */ 760 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), int_status); 761 if (rc < 0) 762 return rc; 763 764 /* Turn on */ 765 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), 766 intmask | TPM_GLOBAL_INT_ENABLE); 767 if (rc < 0) 768 return rc; 769 770 priv->irq_tested = false; 771 772 /* Generate an interrupt by having the core call through to 773 * tpm_tis_send 774 */ 775 rc = tpm_tis_gen_interrupt(chip); 776 if (rc < 0) 777 return rc; 778 779 /* tpm_tis_send will either confirm the interrupt is working or it 780 * will call disable_irq which undoes all of the above. 781 */ 782 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) { 783 rc = tpm_tis_write8(priv, original_int_vec, 784 TPM_INT_VECTOR(priv->locality)); 785 if (rc < 0) 786 return rc; 787 788 return 1; 789 } 790 791 return 0; 792 } 793 794 /* Try to find the IRQ the TPM is using. This is for legacy x86 systems that 795 * do not have ACPI/etc. We typically expect the interrupt to be declared if 796 * present. 797 */ 798 static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask) 799 { 800 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 801 u8 original_int_vec; 802 int i, rc; 803 804 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality), 805 &original_int_vec); 806 if (rc < 0) 807 return; 808 809 if (!original_int_vec) { 810 if (IS_ENABLED(CONFIG_X86)) 811 for (i = 3; i <= 15; i++) 812 if (!tpm_tis_probe_irq_single(chip, intmask, 0, 813 i)) 814 return; 815 } else if (!tpm_tis_probe_irq_single(chip, intmask, 0, 816 original_int_vec)) 817 return; 818 } 819 820 void tpm_tis_remove(struct tpm_chip *chip) 821 { 822 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 823 u32 reg = TPM_INT_ENABLE(priv->locality); 824 u32 interrupt; 825 int rc; 826 827 tpm_tis_clkrun_enable(chip, true); 828 829 rc = tpm_tis_read32(priv, reg, &interrupt); 830 if (rc < 0) 831 interrupt = 0; 832 833 tpm_tis_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt); 834 835 tpm_tis_clkrun_enable(chip, false); 836 837 if (priv->ilb_base_addr) 838 iounmap(priv->ilb_base_addr); 839 } 840 EXPORT_SYMBOL_GPL(tpm_tis_remove); 841 842 /** 843 * tpm_tis_clkrun_enable() - Keep clkrun protocol disabled for entire duration 844 * of a single TPM command 845 * @chip: TPM chip to use 846 * @value: 1 - Disable CLKRUN protocol, so that clocks are free running 847 * 0 - Enable CLKRUN protocol 848 * Call this function directly in tpm_tis_remove() in error or driver removal 849 * path, since the chip->ops is set to NULL in tpm_chip_unregister(). 850 */ 851 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value) 852 { 853 struct tpm_tis_data *data = dev_get_drvdata(&chip->dev); 854 u32 clkrun_val; 855 856 if (!IS_ENABLED(CONFIG_X86) || !is_bsw() || 857 !data->ilb_base_addr) 858 return; 859 860 if (value) { 861 data->clkrun_enabled++; 862 if (data->clkrun_enabled > 1) 863 return; 864 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET); 865 866 /* Disable LPC CLKRUN# */ 867 clkrun_val &= ~LPC_CLKRUN_EN; 868 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET); 869 870 /* 871 * Write any random value on port 0x80 which is on LPC, to make 872 * sure LPC clock is running before sending any TPM command. 873 */ 874 outb(0xCC, 0x80); 875 } else { 876 data->clkrun_enabled--; 877 if (data->clkrun_enabled) 878 return; 879 880 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET); 881 882 /* Enable LPC CLKRUN# */ 883 clkrun_val |= LPC_CLKRUN_EN; 884 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET); 885 886 /* 887 * Write any random value on port 0x80 which is on LPC, to make 888 * sure LPC clock is running before sending any TPM command. 889 */ 890 outb(0xCC, 0x80); 891 } 892 } 893 894 static const struct tpm_class_ops tpm_tis = { 895 .flags = TPM_OPS_AUTO_STARTUP, 896 .status = tpm_tis_status, 897 .recv = tpm_tis_recv, 898 .send = tpm_tis_send, 899 .cancel = tpm_tis_ready, 900 .update_timeouts = tpm_tis_update_timeouts, 901 .update_durations = tpm_tis_update_durations, 902 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 903 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 904 .req_canceled = tpm_tis_req_canceled, 905 .request_locality = request_locality, 906 .relinquish_locality = release_locality, 907 .clk_enable = tpm_tis_clkrun_enable, 908 }; 909 910 int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq, 911 const struct tpm_tis_phy_ops *phy_ops, 912 acpi_handle acpi_dev_handle) 913 { 914 u32 vendor; 915 u32 intfcaps; 916 u32 intmask; 917 u32 clkrun_val; 918 u8 rid; 919 int rc, probe; 920 struct tpm_chip *chip; 921 922 chip = tpmm_chip_alloc(dev, &tpm_tis); 923 if (IS_ERR(chip)) 924 return PTR_ERR(chip); 925 926 #ifdef CONFIG_ACPI 927 chip->acpi_dev_handle = acpi_dev_handle; 928 #endif 929 930 chip->hwrng.quality = priv->rng_quality; 931 932 /* Maximum timeouts */ 933 chip->timeout_a = msecs_to_jiffies(TIS_TIMEOUT_A_MAX); 934 chip->timeout_b = msecs_to_jiffies(TIS_TIMEOUT_B_MAX); 935 chip->timeout_c = msecs_to_jiffies(TIS_TIMEOUT_C_MAX); 936 chip->timeout_d = msecs_to_jiffies(TIS_TIMEOUT_D_MAX); 937 priv->phy_ops = phy_ops; 938 dev_set_drvdata(&chip->dev, priv); 939 940 if (is_bsw()) { 941 priv->ilb_base_addr = ioremap(INTEL_LEGACY_BLK_BASE_ADDR, 942 ILB_REMAP_SIZE); 943 if (!priv->ilb_base_addr) 944 return -ENOMEM; 945 946 clkrun_val = ioread32(priv->ilb_base_addr + LPC_CNTRL_OFFSET); 947 /* Check if CLKRUN# is already not enabled in the LPC bus */ 948 if (!(clkrun_val & LPC_CLKRUN_EN)) { 949 iounmap(priv->ilb_base_addr); 950 priv->ilb_base_addr = NULL; 951 } 952 } 953 954 if (chip->ops->clk_enable != NULL) 955 chip->ops->clk_enable(chip, true); 956 957 if (wait_startup(chip, 0) != 0) { 958 rc = -ENODEV; 959 goto out_err; 960 } 961 962 /* Take control of the TPM's interrupt hardware and shut it off */ 963 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask); 964 if (rc < 0) 965 goto out_err; 966 967 intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT | 968 TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT; 969 intmask &= ~TPM_GLOBAL_INT_ENABLE; 970 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask); 971 972 rc = tpm_chip_start(chip); 973 if (rc) 974 goto out_err; 975 rc = tpm2_probe(chip); 976 tpm_chip_stop(chip); 977 if (rc) 978 goto out_err; 979 980 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &vendor); 981 if (rc < 0) 982 goto out_err; 983 984 priv->manufacturer_id = vendor; 985 986 rc = tpm_tis_read8(priv, TPM_RID(0), &rid); 987 if (rc < 0) 988 goto out_err; 989 990 dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n", 991 (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2", 992 vendor >> 16, rid); 993 994 probe = probe_itpm(chip); 995 if (probe < 0) { 996 rc = -ENODEV; 997 goto out_err; 998 } 999 1000 /* Figure out the capabilities */ 1001 rc = tpm_tis_read32(priv, TPM_INTF_CAPS(priv->locality), &intfcaps); 1002 if (rc < 0) 1003 goto out_err; 1004 1005 dev_dbg(dev, "TPM interface capabilities (0x%x):\n", 1006 intfcaps); 1007 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC) 1008 dev_dbg(dev, "\tBurst Count Static\n"); 1009 if (intfcaps & TPM_INTF_CMD_READY_INT) 1010 dev_dbg(dev, "\tCommand Ready Int Support\n"); 1011 if (intfcaps & TPM_INTF_INT_EDGE_FALLING) 1012 dev_dbg(dev, "\tInterrupt Edge Falling\n"); 1013 if (intfcaps & TPM_INTF_INT_EDGE_RISING) 1014 dev_dbg(dev, "\tInterrupt Edge Rising\n"); 1015 if (intfcaps & TPM_INTF_INT_LEVEL_LOW) 1016 dev_dbg(dev, "\tInterrupt Level Low\n"); 1017 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH) 1018 dev_dbg(dev, "\tInterrupt Level High\n"); 1019 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT) 1020 dev_dbg(dev, "\tLocality Change Int Support\n"); 1021 if (intfcaps & TPM_INTF_STS_VALID_INT) 1022 dev_dbg(dev, "\tSts Valid Int Support\n"); 1023 if (intfcaps & TPM_INTF_DATA_AVAIL_INT) 1024 dev_dbg(dev, "\tData Avail Int Support\n"); 1025 1026 /* INTERRUPT Setup */ 1027 init_waitqueue_head(&priv->read_queue); 1028 init_waitqueue_head(&priv->int_queue); 1029 if (irq != -1) { 1030 /* 1031 * Before doing irq testing issue a command to the TPM in polling mode 1032 * to make sure it works. May as well use that command to set the 1033 * proper timeouts for the driver. 1034 */ 1035 1036 rc = request_locality(chip, 0); 1037 if (rc < 0) 1038 goto out_err; 1039 1040 rc = tpm_get_timeouts(chip); 1041 1042 release_locality(chip, 0); 1043 1044 if (rc) { 1045 dev_err(dev, "Could not get TPM timeouts and durations\n"); 1046 rc = -ENODEV; 1047 goto out_err; 1048 } 1049 1050 if (irq) { 1051 tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED, 1052 irq); 1053 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) { 1054 dev_err(&chip->dev, FW_BUG 1055 "TPM interrupt not working, polling instead\n"); 1056 1057 disable_interrupts(chip); 1058 } 1059 } else { 1060 tpm_tis_probe_irq(chip, intmask); 1061 } 1062 } 1063 1064 rc = tpm_chip_register(chip); 1065 if (rc) 1066 goto out_err; 1067 1068 if (chip->ops->clk_enable != NULL) 1069 chip->ops->clk_enable(chip, false); 1070 1071 return 0; 1072 out_err: 1073 if (chip->ops->clk_enable != NULL) 1074 chip->ops->clk_enable(chip, false); 1075 1076 tpm_tis_remove(chip); 1077 1078 return rc; 1079 } 1080 EXPORT_SYMBOL_GPL(tpm_tis_core_init); 1081 1082 #ifdef CONFIG_PM_SLEEP 1083 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip) 1084 { 1085 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 1086 u32 intmask; 1087 int rc; 1088 1089 if (chip->ops->clk_enable != NULL) 1090 chip->ops->clk_enable(chip, true); 1091 1092 /* reenable interrupts that device may have lost or 1093 * BIOS/firmware may have disabled 1094 */ 1095 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), priv->irq); 1096 if (rc < 0) 1097 goto out; 1098 1099 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask); 1100 if (rc < 0) 1101 goto out; 1102 1103 intmask |= TPM_INTF_CMD_READY_INT 1104 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT 1105 | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE; 1106 1107 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask); 1108 1109 out: 1110 if (chip->ops->clk_enable != NULL) 1111 chip->ops->clk_enable(chip, false); 1112 1113 return; 1114 } 1115 1116 int tpm_tis_resume(struct device *dev) 1117 { 1118 struct tpm_chip *chip = dev_get_drvdata(dev); 1119 int ret; 1120 1121 if (chip->flags & TPM_CHIP_FLAG_IRQ) 1122 tpm_tis_reenable_interrupts(chip); 1123 1124 ret = tpm_pm_resume(dev); 1125 if (ret) 1126 return ret; 1127 1128 /* 1129 * TPM 1.2 requires self-test on resume. This function actually returns 1130 * an error code but for unknown reason it isn't handled. 1131 */ 1132 if (!(chip->flags & TPM_CHIP_FLAG_TPM2)) { 1133 ret = request_locality(chip, 0); 1134 if (ret < 0) 1135 return ret; 1136 1137 tpm1_do_selftest(chip); 1138 1139 release_locality(chip, 0); 1140 } 1141 1142 return 0; 1143 } 1144 EXPORT_SYMBOL_GPL(tpm_tis_resume); 1145 #endif 1146 1147 MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)"); 1148 MODULE_DESCRIPTION("TPM Driver"); 1149 MODULE_VERSION("2.0"); 1150 MODULE_LICENSE("GPL"); 1151